diff options
author | Alastair D'Silva <alastair@d-silva.org> | 2019-03-27 01:31:36 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-05-02 12:55:02 -0400 |
commit | 7e462c2a8a6d00d3c240cac9f5626eff96d8e641 (patch) | |
tree | 69ce15c8454f9a2f5f4f660e6f483b4cb07d6f09 /include/misc | |
parent | 060146614643ddc5978c73ffac0329762b4651c9 (diff) |
ocxl: Provide global MMIO accessors for external drivers
External drivers that communicate via OpenCAPI will need to make
MMIO calls to interact with the devices.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'include/misc')
-rw-r--r-- | include/misc/ocxl.h | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index dea93885a839..5c4b4916e6be 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h | |||
@@ -45,6 +45,12 @@ struct ocxl_fn_config { | |||
45 | s8 max_afu_index; | 45 | s8 max_afu_index; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | enum ocxl_endian { | ||
49 | OCXL_BIG_ENDIAN = 0, /**< AFU data is big-endian */ | ||
50 | OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */ | ||
51 | OCXL_HOST_ENDIAN = 2, /**< AFU data is the same endianness as the host */ | ||
52 | }; | ||
53 | |||
48 | // These are opaque outside the ocxl driver | 54 | // These are opaque outside the ocxl driver |
49 | struct ocxl_afu; | 55 | struct ocxl_afu; |
50 | struct ocxl_fn; | 56 | struct ocxl_fn; |
@@ -230,6 +236,110 @@ void ocxl_afu_set_private(struct ocxl_afu *afu, void *private); | |||
230 | */ | 236 | */ |
231 | void *ocxl_afu_get_private(struct ocxl_afu *dev); | 237 | void *ocxl_afu_get_private(struct ocxl_afu *dev); |
232 | 238 | ||
239 | // Global MMIO | ||
240 | /** | ||
241 | * Read a 32 bit value from global MMIO | ||
242 | * | ||
243 | * @afu: The AFU | ||
244 | * @offset: The Offset from the start of MMIO | ||
245 | * @endian: the endianness that the MMIO data is in | ||
246 | * @val: returns the value | ||
247 | * | ||
248 | * Returns 0 for success, negative on error | ||
249 | */ | ||
250 | int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, | ||
251 | enum ocxl_endian endian, u32 *val); | ||
252 | |||
253 | /** | ||
254 | * Read a 64 bit value from global MMIO | ||
255 | * | ||
256 | * @afu: The AFU | ||
257 | * @offset: The Offset from the start of MMIO | ||
258 | * @endian: the endianness that the MMIO data is in | ||
259 | * @val: returns the value | ||
260 | * | ||
261 | * Returns 0 for success, negative on error | ||
262 | */ | ||
263 | int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, | ||
264 | enum ocxl_endian endian, u64 *val); | ||
265 | |||
266 | /** | ||
267 | * Write a 32 bit value to global MMIO | ||
268 | * | ||
269 | * @afu: The AFU | ||
270 | * @offset: The Offset from the start of MMIO | ||
271 | * @endian: the endianness that the MMIO data is in | ||
272 | * @val: The value to write | ||
273 | * | ||
274 | * Returns 0 for success, negative on error | ||
275 | */ | ||
276 | int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, | ||
277 | enum ocxl_endian endian, u32 val); | ||
278 | |||
279 | /** | ||
280 | * Write a 64 bit value to global MMIO | ||
281 | * | ||
282 | * @afu: The AFU | ||
283 | * @offset: The Offset from the start of MMIO | ||
284 | * @endian: the endianness that the MMIO data is in | ||
285 | * @val: The value to write | ||
286 | * | ||
287 | * Returns 0 for success, negative on error | ||
288 | */ | ||
289 | int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset, | ||
290 | enum ocxl_endian endian, u64 val); | ||
291 | |||
292 | /** | ||
293 | * Set bits in a 32 bit global MMIO register | ||
294 | * | ||
295 | * @afu: The AFU | ||
296 | * @offset: The Offset from the start of MMIO | ||
297 | * @endian: the endianness that the MMIO data is in | ||
298 | * @mask: a mask of the bits to set | ||
299 | * | ||
300 | * Returns 0 for success, negative on error | ||
301 | */ | ||
302 | int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset, | ||
303 | enum ocxl_endian endian, u32 mask); | ||
304 | |||
305 | /** | ||
306 | * Set bits in a 64 bit global MMIO register | ||
307 | * | ||
308 | * @afu: The AFU | ||
309 | * @offset: The Offset from the start of MMIO | ||
310 | * @endian: the endianness that the MMIO data is in | ||
311 | * @mask: a mask of the bits to set | ||
312 | * | ||
313 | * Returns 0 for success, negative on error | ||
314 | */ | ||
315 | int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset, | ||
316 | enum ocxl_endian endian, u64 mask); | ||
317 | |||
318 | /** | ||
319 | * Set bits in a 32 bit global MMIO register | ||
320 | * | ||
321 | * @afu: The AFU | ||
322 | * @offset: The Offset from the start of MMIO | ||
323 | * @endian: the endianness that the MMIO data is in | ||
324 | * @mask: a mask of the bits to set | ||
325 | * | ||
326 | * Returns 0 for success, negative on error | ||
327 | */ | ||
328 | int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, | ||
329 | enum ocxl_endian endian, u32 mask); | ||
330 | |||
331 | /** | ||
332 | * Set bits in a 64 bit global MMIO register | ||
333 | * | ||
334 | * @afu: The AFU | ||
335 | * @offset: The Offset from the start of MMIO | ||
336 | * @endian: the endianness that the MMIO data is in | ||
337 | * @mask: a mask of the bits to set | ||
338 | * | ||
339 | * Returns 0 for success, negative on error | ||
340 | */ | ||
341 | int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset, | ||
342 | enum ocxl_endian endian, u64 mask); | ||
233 | 343 | ||
234 | // Functions left here are for compatibility with the cxlflash driver | 344 | // Functions left here are for compatibility with the cxlflash driver |
235 | 345 | ||