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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-03-21 15:21:07 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-11 10:56:07 -0400
commitb0610bb82abd1c4ac97c33f0312cd7fd72eaa325 (patch)
tree50ec6478042e3662058e47d96a9192f822011403 /include/linux/edac.h
parentfd687502dc8037aa5a4b84c570ada971106574ee (diff)
edac: use Documentation-nano format for some data structs
No functional changes. Just comment improvements. Reviewed-by: Aristeu Rozanski <arozansk@redhat.com> Cc: Doug Thompson <norsk5@yahoo.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'include/linux/edac.h')
-rw-r--r--include/linux/edac.h82
1 files changed, 59 insertions, 23 deletions
diff --git a/include/linux/edac.h b/include/linux/edac.h
index ec1b5278b4cc..4e32e8d31e0a 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -49,7 +49,19 @@ static inline void opstate_init(void)
49#define EDAC_MC_LABEL_LEN 31 49#define EDAC_MC_LABEL_LEN 31
50#define MC_PROC_NAME_MAX_LEN 7 50#define MC_PROC_NAME_MAX_LEN 7
51 51
52/* memory devices */ 52/**
53 * enum dev_type - describe the type of memory DRAM chips used at the stick
54 * @DEV_UNKNOWN: Can't be determined, or MC doesn't support detect it
55 * @DEV_X1: 1 bit for data
56 * @DEV_X2: 2 bits for data
57 * @DEV_X4: 4 bits for data
58 * @DEV_X8: 8 bits for data
59 * @DEV_X16: 16 bits for data
60 * @DEV_X32: 32 bits for data
61 * @DEV_X64: 64 bits for data
62 *
63 * Typical values are x4 and x8.
64 */
53enum dev_type { 65enum dev_type {
54 DEV_UNKNOWN = 0, 66 DEV_UNKNOWN = 0,
55 DEV_X1, 67 DEV_X1,
@@ -167,18 +179,30 @@ enum mem_type {
167#define MEM_FLAG_DDR3 BIT(MEM_DDR3) 179#define MEM_FLAG_DDR3 BIT(MEM_DDR3)
168#define MEM_FLAG_RDDR3 BIT(MEM_RDDR3) 180#define MEM_FLAG_RDDR3 BIT(MEM_RDDR3)
169 181
170/* chipset Error Detection and Correction capabilities and mode */ 182/**
183 * enum edac-type - Error Detection and Correction capabilities and mode
184 * @EDAC_UNKNOWN: Unknown if ECC is available
185 * @EDAC_NONE: Doesn't support ECC
186 * @EDAC_RESERVED: Reserved ECC type
187 * @EDAC_PARITY: Detects parity errors
188 * @EDAC_EC: Error Checking - no correction
189 * @EDAC_SECDED: Single bit error correction, Double detection
190 * @EDAC_S2ECD2ED: Chipkill x2 devices - do these exist?
191 * @EDAC_S4ECD4ED: Chipkill x4 devices
192 * @EDAC_S8ECD8ED: Chipkill x8 devices
193 * @EDAC_S16ECD16ED: Chipkill x16 devices
194 */
171enum edac_type { 195enum edac_type {
172 EDAC_UNKNOWN = 0, /* Unknown if ECC is available */ 196 EDAC_UNKNOWN = 0,
173 EDAC_NONE, /* Doesn't support ECC */ 197 EDAC_NONE,
174 EDAC_RESERVED, /* Reserved ECC type */ 198 EDAC_RESERVED,
175 EDAC_PARITY, /* Detects parity errors */ 199 EDAC_PARITY,
176 EDAC_EC, /* Error Checking - no correction */ 200 EDAC_EC,
177 EDAC_SECDED, /* Single bit error correction, Double detection */ 201 EDAC_SECDED,
178 EDAC_S2ECD2ED, /* Chipkill x2 devices - do these exist? */ 202 EDAC_S2ECD2ED,
179 EDAC_S4ECD4ED, /* Chipkill x4 devices */ 203 EDAC_S4ECD4ED,
180 EDAC_S8ECD8ED, /* Chipkill x8 devices */ 204 EDAC_S8ECD8ED,
181 EDAC_S16ECD16ED, /* Chipkill x16 devices */ 205 EDAC_S16ECD16ED,
182}; 206};
183 207
184#define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN) 208#define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN)
@@ -191,18 +215,30 @@ enum edac_type {
191#define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED) 215#define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED)
192#define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED) 216#define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED)
193 217
194/* scrubbing capabilities */ 218/**
219 * enum scrub_type - scrubbing capabilities
220 * @SCRUB_UNKNOWN Unknown if scrubber is available
221 * @SCRUB_NONE: No scrubber
222 * @SCRUB_SW_PROG: SW progressive (sequential) scrubbing
223 * @SCRUB_SW_SRC: Software scrub only errors
224 * @SCRUB_SW_PROG_SRC: Progressive software scrub from an error
225 * @SCRUB_SW_TUNABLE: Software scrub frequency is tunable
226 * @SCRUB_HW_PROG: HW progressive (sequential) scrubbing
227 * @SCRUB_HW_SRC: Hardware scrub only errors
228 * @SCRUB_HW_PROG_SRC: Progressive hardware scrub from an error
229 * SCRUB_HW_TUNABLE: Hardware scrub frequency is tunable
230 */
195enum scrub_type { 231enum scrub_type {
196 SCRUB_UNKNOWN = 0, /* Unknown if scrubber is available */ 232 SCRUB_UNKNOWN = 0,
197 SCRUB_NONE, /* No scrubber */ 233 SCRUB_NONE,
198 SCRUB_SW_PROG, /* SW progressive (sequential) scrubbing */ 234 SCRUB_SW_PROG,
199 SCRUB_SW_SRC, /* Software scrub only errors */ 235 SCRUB_SW_SRC,
200 SCRUB_SW_PROG_SRC, /* Progressive software scrub from an error */ 236 SCRUB_SW_PROG_SRC,
201 SCRUB_SW_TUNABLE, /* Software scrub frequency is tunable */ 237 SCRUB_SW_TUNABLE,
202 SCRUB_HW_PROG, /* HW progressive (sequential) scrubbing */ 238 SCRUB_HW_PROG,
203 SCRUB_HW_SRC, /* Hardware scrub only errors */ 239 SCRUB_HW_SRC,
204 SCRUB_HW_PROG_SRC, /* Progressive hardware scrub from an error */ 240 SCRUB_HW_PROG_SRC,
205 SCRUB_HW_TUNABLE /* Hardware scrub frequency is tunable */ 241 SCRUB_HW_TUNABLE
206}; 242};
207 243
208#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG) 244#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)