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authorVinod Koul <vinod.koul@intel.com>2016-03-14 01:48:12 -0400
committerVinod Koul <vinod.koul@intel.com>2016-03-14 01:48:12 -0400
commit8bce4c87657af3dc4625e873ec1201205e44375b (patch)
treec98b33258b433a2bcb9d71b9544031e26d6aef63 /include/linux/dmaengine.h
parent805dd3508b2398ca339f5dd3b2d11ac82ef41b5c (diff)
parent0a18f9b268dd66c84c806a74b3bc0be6438e7ba7 (diff)
Merge branch 'topic/pl330' into for-linus
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r--include/linux/dmaengine.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index d85ecd20af50..017433712833 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -401,6 +401,7 @@ enum dma_residue_granularity {
401 * since the enum dma_transfer_direction is not defined as bits for each 401 * since the enum dma_transfer_direction is not defined as bits for each
402 * type of direction, the dma controller should fill (1 << <TYPE>) and same 402 * type of direction, the dma controller should fill (1 << <TYPE>) and same
403 * should be checked by controller as well 403 * should be checked by controller as well
404 * @max_burst: max burst capability per-transfer
404 * @cmd_pause: true, if pause and thereby resume is supported 405 * @cmd_pause: true, if pause and thereby resume is supported
405 * @cmd_terminate: true, if terminate cmd is supported 406 * @cmd_terminate: true, if terminate cmd is supported
406 * @residue_granularity: granularity of the reported transfer residue 407 * @residue_granularity: granularity of the reported transfer residue
@@ -411,6 +412,7 @@ struct dma_slave_caps {
411 u32 src_addr_widths; 412 u32 src_addr_widths;
412 u32 dst_addr_widths; 413 u32 dst_addr_widths;
413 u32 directions; 414 u32 directions;
415 u32 max_burst;
414 bool cmd_pause; 416 bool cmd_pause;
415 bool cmd_terminate; 417 bool cmd_terminate;
416 enum dma_residue_granularity residue_granularity; 418 enum dma_residue_granularity residue_granularity;
@@ -654,6 +656,7 @@ struct dma_filter {
654 * the enum dma_transfer_direction is not defined as bits for 656 * the enum dma_transfer_direction is not defined as bits for
655 * each type of direction, the dma controller should fill (1 << 657 * each type of direction, the dma controller should fill (1 <<
656 * <TYPE>) and same should be checked by controller as well 658 * <TYPE>) and same should be checked by controller as well
659 * @max_burst: max burst capability per-transfer
657 * @residue_granularity: granularity of the transfer residue reported 660 * @residue_granularity: granularity of the transfer residue reported
658 * by tx_status 661 * by tx_status
659 * @device_alloc_chan_resources: allocate resources and return the 662 * @device_alloc_chan_resources: allocate resources and return the
@@ -712,6 +715,7 @@ struct dma_device {
712 u32 src_addr_widths; 715 u32 src_addr_widths;
713 u32 dst_addr_widths; 716 u32 dst_addr_widths;
714 u32 directions; 717 u32 directions;
718 u32 max_burst;
715 bool descriptor_reuse; 719 bool descriptor_reuse;
716 enum dma_residue_granularity residue_granularity; 720 enum dma_residue_granularity residue_granularity;
717 721