diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2013-09-05 17:07:39 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-09-23 19:40:45 -0400 |
commit | 7dab9ef4f0823072a3c9afdb3b373c9f2f38848b (patch) | |
tree | d57293c7b2705bd34812c073a2919904c194d359 /include/linux/acpi.h | |
parent | 335b15097d571007b125eb9fe4ef1f84e61bd31d (diff) |
PCI/ACPI: Name _OSC #defines more consistently
Make PCI Host Bridge _OSC #defines more consistent. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/linux/acpi.h')
-rw-r--r-- | include/linux/acpi.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/linux/acpi.h b/include/linux/acpi.h index bb4e7701b26b..e2e52cf53224 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h | |||
@@ -325,19 +325,19 @@ acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context); | |||
325 | extern bool osc_sb_apei_support_acked; | 325 | extern bool osc_sb_apei_support_acked; |
326 | 326 | ||
327 | /* PCI Host Bridge _OSC: Capabilities DWORD 2: Support Field */ | 327 | /* PCI Host Bridge _OSC: Capabilities DWORD 2: Support Field */ |
328 | #define OSC_EXT_PCI_CONFIG_SUPPORT 0x00000001 | 328 | #define OSC_PCI_EXT_CONFIG_SUPPORT 0x00000001 |
329 | #define OSC_ACTIVE_STATE_PWR_SUPPORT 0x00000002 | 329 | #define OSC_PCI_ASPM_SUPPORT 0x00000002 |
330 | #define OSC_CLOCK_PWR_CAPABILITY_SUPPORT 0x00000004 | 330 | #define OSC_PCI_CLOCK_PM_SUPPORT 0x00000004 |
331 | #define OSC_PCI_SEGMENT_GROUPS_SUPPORT 0x00000008 | 331 | #define OSC_PCI_SEGMENT_GROUPS_SUPPORT 0x00000008 |
332 | #define OSC_MSI_SUPPORT 0x00000010 | 332 | #define OSC_PCI_MSI_SUPPORT 0x00000010 |
333 | #define OSC_PCI_SUPPORT_MASKS 0x0000001f | 333 | #define OSC_PCI_SUPPORT_MASKS 0x0000001f |
334 | 334 | ||
335 | /* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */ | 335 | /* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */ |
336 | #define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 0x00000001 | 336 | #define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 0x00000001 |
337 | #define OSC_SHPC_NATIVE_HP_CONTROL 0x00000002 | 337 | #define OSC_PCI_SHPC_NATIVE_HP_CONTROL 0x00000002 |
338 | #define OSC_PCI_EXPRESS_PME_CONTROL 0x00000004 | 338 | #define OSC_PCI_EXPRESS_PME_CONTROL 0x00000004 |
339 | #define OSC_PCI_EXPRESS_AER_CONTROL 0x00000008 | 339 | #define OSC_PCI_EXPRESS_AER_CONTROL 0x00000008 |
340 | #define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL 0x00000010 | 340 | #define OSC_PCI_EXPRESS_CAPABILITY_CONTROL 0x00000010 |
341 | #define OSC_PCI_CONTROL_MASKS 0x0000001f | 341 | #define OSC_PCI_CONTROL_MASKS 0x0000001f |
342 | 342 | ||
343 | extern acpi_status acpi_pci_osc_control_set(acpi_handle handle, | 343 | extern acpi_status acpi_pci_osc_control_set(acpi_handle handle, |