diff options
author | Kevin Hilman <khilman@baylibre.com> | 2019-08-29 19:12:46 -0400 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2019-08-29 19:12:46 -0400 |
commit | b8b1c9ad1c20cb1373baaed87aebe4f944a65e83 (patch) | |
tree | b925c1919d6c70a3e7b82ec4cf00a8bee0400663 /include/dt-bindings | |
parent | 77657b805b926b44b2545a352b209d85c0932e0b (diff) | |
parent | cda4569137b90f200bee4922d894ca49d4188681 (diff) |
Merge tag 'clk-meson-dt-v5.4-3' of git://github.com/BayLibre/clk-meson into v5.4/dt64-2
Amlogic clk dt bindings changes for v5.4 - 3rd round
* add sm1 peripheral controller bindings
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/g12a-clkc.h | 5 | ||||
-rw-r--r-- | include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h | 38 |
2 files changed, 43 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 8ccc29ac7a72..0837c1a7ae49 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h | |||
@@ -138,5 +138,10 @@ | |||
138 | #define CLKID_VDEC_HEVCF 210 | 138 | #define CLKID_VDEC_HEVCF 210 |
139 | #define CLKID_TS 212 | 139 | #define CLKID_TS 212 |
140 | #define CLKID_CPUB_CLK 224 | 140 | #define CLKID_CPUB_CLK 224 |
141 | #define CLKID_GP1_PLL 243 | ||
142 | #define CLKID_DSU_CLK 252 | ||
143 | #define CLKID_CPU1_CLK 253 | ||
144 | #define CLKID_CPU2_CLK 254 | ||
145 | #define CLKID_CPU3_CLK 255 | ||
141 | 146 | ||
142 | #endif /* __G12A_CLKC_H */ | 147 | #endif /* __G12A_CLKC_H */ |
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h new file mode 100644 index 000000000000..14b78dabed0e --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h | |||
@@ -0,0 +1,38 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * Copyright (c) 2019 BayLibre, SAS. | ||
4 | * Author: Jerome Brunet <jbrunet@baylibre.com> | ||
5 | * | ||
6 | */ | ||
7 | |||
8 | #ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H | ||
9 | #define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H | ||
10 | |||
11 | #define AUD_RESET_PDM 0 | ||
12 | #define AUD_RESET_TDMIN_A 1 | ||
13 | #define AUD_RESET_TDMIN_B 2 | ||
14 | #define AUD_RESET_TDMIN_C 3 | ||
15 | #define AUD_RESET_TDMIN_LB 4 | ||
16 | #define AUD_RESET_LOOPBACK 5 | ||
17 | #define AUD_RESET_TODDR_A 6 | ||
18 | #define AUD_RESET_TODDR_B 7 | ||
19 | #define AUD_RESET_TODDR_C 8 | ||
20 | #define AUD_RESET_FRDDR_A 9 | ||
21 | #define AUD_RESET_FRDDR_B 10 | ||
22 | #define AUD_RESET_FRDDR_C 11 | ||
23 | #define AUD_RESET_TDMOUT_A 12 | ||
24 | #define AUD_RESET_TDMOUT_B 13 | ||
25 | #define AUD_RESET_TDMOUT_C 14 | ||
26 | #define AUD_RESET_SPDIFOUT 15 | ||
27 | #define AUD_RESET_SPDIFOUT_B 16 | ||
28 | #define AUD_RESET_SPDIFIN 17 | ||
29 | #define AUD_RESET_EQDRC 18 | ||
30 | #define AUD_RESET_RESAMPLE 19 | ||
31 | #define AUD_RESET_DDRARB 20 | ||
32 | #define AUD_RESET_POWDET 21 | ||
33 | #define AUD_RESET_TORAM 22 | ||
34 | #define AUD_RESET_TOACODEC 23 | ||
35 | #define AUD_RESET_TOHDMITX 24 | ||
36 | #define AUD_RESET_CLKTREE 25 | ||
37 | |||
38 | #endif | ||