Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

   - A driver for SCU (system control) on NXP i.MX8QXP

   - Qualcomm Always-on Subsystem messaging driver (AOSS QMP)

   - Qualcomm PM support for MSM8998

   - Support for a newer version of DRAM PHY driver for Broadcom (DPFE)

   - Reset controller support for Bitmain BM1880

   - TI SCI (System Control Interface) support for CPU control on AM654
     processors

   - More TI sysc refactoring and rework"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits)
  reset: remove redundant null check on pointer dev
  soc: rockchip: work around clang warning
  dt-bindings: reset: imx7: Fix the spelling of 'indices'
  soc: imx: Add i.MX8MN SoC driver support
  soc: aspeed: lpc-ctrl: Fix probe error handling
  soc: qcom: geni: Add support for ACPI
  firmware: ti_sci: Fix gcc unused-but-set-variable warning
  firmware: ti_sci: Use the correct style for SPDX License Identifier
  soc: imx8: Use existing of_root directly
  soc: imx8: Fix potential kernel dump in error path
  firmware/psci: psci_checker: Park kthreads before stopping them
  memory: move jedec_ddr.h from include/memory to drivers/memory/
  memory: move jedec_ddr_data.c from lib/ to drivers/memory/
  MAINTAINERS: Remove myself as qcom maintainer
  soc: aspeed: lpc-ctrl: make parameter optional
  soc: qcom: apr: Don't use reg for domain id
  soc: qcom: fix QCOM_AOSS_QMP dependency and build errors
  memory: tegra: Fix -Wunused-const-variable
  firmware: tegra: Early resume BPMP
  soc/tegra: Select pinctrl for Tegra194
  ...

3 files changed, 99 insertions, 0 deletions

diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h
new file mode 100644
index 000000000000..ec336d31dee4
--- /dev/null
+++ b/include/dt-bindings/power/qcom-aoss-qmp.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018, Linaro Ltd. */
+
+#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
+#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
+
+#define AOSS_QMP_LS_CDSP                0
+#define AOSS_QMP_LS_LPASS       1
+#define AOSS_QMP_LS_MODEM       2
+#define AOSS_QMP_LS_SLPI                3
+#define AOSS_QMP_LS_SPSS                4
+#define AOSS_QMP_LS_VENUS       5
+
+#endif
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index 87d9c6611682..93e36d011527 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -36,4 +36,38 @@
 #define MSM8996_VDDSSCX         5
 #define MSM8996_VDDSSCX_VFC     6
 
+/* MSM8998 Power Domain Indexes */
+#define MSM8998_VDDCX           0
+#define MSM8998_VDDCX_AO        1
+#define MSM8998_VDDCX_VFL       2
+#define MSM8998_VDDMX           3
+#define MSM8998_VDDMX_AO        4
+#define MSM8998_VDDMX_VFL       5
+#define MSM8998_SSCCX           6
+#define MSM8998_SSCCX_VFL       7
+#define MSM8998_SSCMX           8
+#define MSM8998_SSCMX_VFL       9
+
+/* QCS404 Power Domains */
+#define QCS404_VDDMX            0
+#define QCS404_VDDMX_AO         1
+#define QCS404_VDDMX_VFL        2
+#define QCS404_LPICX            3
+#define QCS404_LPICX_VFL        4
+#define QCS404_LPIMX            5
+#define QCS404_LPIMX_VFL        6
+
+/* RPM SMD Power Domain performance levels */
+#define RPM_SMD_LEVEL_RETENTION       16
+#define RPM_SMD_LEVEL_RETENTION_PLUS  32
+#define RPM_SMD_LEVEL_MIN_SVS         48
+#define RPM_SMD_LEVEL_LOW_SVS         64
+#define RPM_SMD_LEVEL_SVS             128
+#define RPM_SMD_LEVEL_SVS_PLUS        192
+#define RPM_SMD_LEVEL_NOM             256
+#define RPM_SMD_LEVEL_NOM_PLUS        320
+#define RPM_SMD_LEVEL_TURBO           384
+#define RPM_SMD_LEVEL_TURBO_NO_CPR    416
+#define RPM_SMD_LEVEL_BINNING         512
+
 #endif
diff --git a/include/dt-bindings/reset/bitmain,bm1880-reset.h b/include/dt-bindings/reset/bitmain,bm1880-reset.h
new file mode 100644
index 000000000000..4c0de5223773
--- /dev/null
+++ b/include/dt-bindings/reset/bitmain,bm1880-reset.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2018 Bitmain Ltd.
+ * Copyright (c) 2019 Linaro Ltd.
+ */
+
+#ifndef _DT_BINDINGS_BM1880_RESET_H
+#define _DT_BINDINGS_BM1880_RESET_H
+
+#define BM1880_RST_MAIN_AP              0
+#define BM1880_RST_SECOND_AP            1
+#define BM1880_RST_DDR                  2
+#define BM1880_RST_VIDEO                3
+#define BM1880_RST_JPEG                 4
+#define BM1880_RST_VPP                  5
+#define BM1880_RST_GDMA                 6
+#define BM1880_RST_AXI_SRAM             7
+#define BM1880_RST_TPU                  8
+#define BM1880_RST_USB                  9
+#define BM1880_RST_ETH0                 10
+#define BM1880_RST_ETH1                 11
+#define BM1880_RST_NAND                 12
+#define BM1880_RST_EMMC                 13
+#define BM1880_RST_SD                   14
+#define BM1880_RST_SDMA                 15
+#define BM1880_RST_I2S0                 16
+#define BM1880_RST_I2S1                 17
+#define BM1880_RST_UART0_1_CLK          18
+#define BM1880_RST_UART0_1_ACLK         19
+#define BM1880_RST_UART2_3_CLK          20
+#define BM1880_RST_UART2_3_ACLK         21
+#define BM1880_RST_MINER                22
+#define BM1880_RST_I2C0                 23
+#define BM1880_RST_I2C1                 24
+#define BM1880_RST_I2C2                 25
+#define BM1880_RST_I2C3                 26
+#define BM1880_RST_I2C4                 27
+#define BM1880_RST_PWM0                 28
+#define BM1880_RST_PWM1                 29
+#define BM1880_RST_PWM2                 30
+#define BM1880_RST_PWM3                 31
+#define BM1880_RST_SPI                  32
+#define BM1880_RST_GPIO0                33
+#define BM1880_RST_GPIO1                34
+#define BM1880_RST_GPIO2                35
+#define BM1880_RST_EFUSE                36
+#define BM1880_RST_WDT                  37
+#define BM1880_RST_AHB_ROM              38
+#define BM1880_RST_SPIC                 39
+
+#endif /* _DT_BINDINGS_BM1880_RESET_H */