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authorArnd Bergmann <arnd@arndb.de>2014-11-28 09:01:57 -0500
committerArnd Bergmann <arnd@arndb.de>2014-11-28 09:01:57 -0500
commit6b7f0570b1f0a7f65d90d6b5d4ddf84c2a13e91b (patch)
treef685bc0bda07a9036f76c4e9c342eacb6354fe8a /include/dt-bindings
parentea4409cc44e8f0f36182fcc22eb48b15ed61dd16 (diff)
parent96acf9dfe1ba59e99eafcf26478118edd195d924 (diff)
Merge tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "The i.MX device tree changes for 3.19" from Shawn Guo: - Device additions for board vf610-colibri, pwm, backlight, I2C, RTC, ADC etc. - Update i.MX6 phyFLEX board to include PCIe, CAN and audio support - Improve SSI clocks description for i.MX5 platforms - Add ENET2 support for imx6sx-sdb board - Add device tree source for LS1021A SoC, board QDS and TWR - Enable cpufreq support for i.MX53 - Enable VPU device support for i.MX6QDL - Enable poweroff support for i.MX6 SoCs - Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q - Create generic base device trees for Vybrid and add support for Colibri VF50 Note: the change set is built on top of imx-soc-3.19 to resolve the dependency that "ARM: dts: imx53: add cpufreq-dt support" uses the clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM clock". * tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (51 commits) ARM: dts: imx6q-tbs2910: Enable snvs-poweroff ARM: dts: imx6: add pm_power_off support for i.mx6 chips ARM: dts: vf-colibri: add USB regulators ARM: dts: imx6: phyFLEX: Add CAN support ARM: dts: imx6: phyFLEX: Add PCIe ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic ARM: dts: imx6: phyFLEX: Enable gpmi in module file ARM: dts: imx6: phyFLEX: set nodes in alphabetical order ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC ARM: dts: vf-colibri: Add I2C support ARM: dts: imx6qdl: Enable CODA960 VPU ARM: dts: imx6q-tbs2910: Remove unneeded 'fsl,mode' property ARM: dts: vf610: enable USB misc/phy nodes where necessary ARM: dts: vf610: use new GPIO support ARM: dts: pbab01: enable I2S audio on phyFLEX-i.MX6 boards ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02 ARM: dts: vf500-colibri: add Colibri VF50 support ARM: dts: vf610: create generic base device trees ARM: dts: vf610: assign oscillator to clock module dt-bindings: arm: add Freescale LS1021A SoC device tree binding ... Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/imx5-clock.h5
-rw-r--r--include/dt-bindings/clock/vf610-clock.h39
2 files changed, 35 insertions, 9 deletions
diff --git a/include/dt-bindings/clock/imx5-clock.h b/include/dt-bindings/clock/imx5-clock.h
index 5f2667ecd98e..f4b7478e23c8 100644
--- a/include/dt-bindings/clock/imx5-clock.h
+++ b/include/dt-bindings/clock/imx5-clock.h
@@ -198,6 +198,9 @@
198#define IMX5_CLK_OCRAM 186 198#define IMX5_CLK_OCRAM 186
199#define IMX5_CLK_SAHARA_IPG_GATE 187 199#define IMX5_CLK_SAHARA_IPG_GATE 187
200#define IMX5_CLK_SATA_REF 188 200#define IMX5_CLK_SATA_REF 188
201#define IMX5_CLK_END 189 201#define IMX5_CLK_STEP_SEL 189
202#define IMX5_CLK_CPU_PODF_SEL 190
203#define IMX5_CLK_ARM 191
204#define IMX5_CLK_END 192
202 205
203#endif /* __DT_BINDINGS_CLOCK_IMX5_H */ 206#endif /* __DT_BINDINGS_CLOCK_IMX5_H */
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index d6b56b21539b..801c0ac50c47 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -21,24 +21,24 @@
21#define VF610_CLK_FASK_CLK_SEL 8 21#define VF610_CLK_FASK_CLK_SEL 8
22#define VF610_CLK_AUDIO_EXT 9 22#define VF610_CLK_AUDIO_EXT 9
23#define VF610_CLK_ENET_EXT 10 23#define VF610_CLK_ENET_EXT 10
24#define VF610_CLK_PLL1_MAIN 11 24#define VF610_CLK_PLL1_SYS 11
25#define VF610_CLK_PLL1_PFD1 12 25#define VF610_CLK_PLL1_PFD1 12
26#define VF610_CLK_PLL1_PFD2 13 26#define VF610_CLK_PLL1_PFD2 13
27#define VF610_CLK_PLL1_PFD3 14 27#define VF610_CLK_PLL1_PFD3 14
28#define VF610_CLK_PLL1_PFD4 15 28#define VF610_CLK_PLL1_PFD4 15
29#define VF610_CLK_PLL2_MAIN 16 29#define VF610_CLK_PLL2_BUS 16
30#define VF610_CLK_PLL2_PFD1 17 30#define VF610_CLK_PLL2_PFD1 17
31#define VF610_CLK_PLL2_PFD2 18 31#define VF610_CLK_PLL2_PFD2 18
32#define VF610_CLK_PLL2_PFD3 19 32#define VF610_CLK_PLL2_PFD3 19
33#define VF610_CLK_PLL2_PFD4 20 33#define VF610_CLK_PLL2_PFD4 20
34#define VF610_CLK_PLL3_MAIN 21 34#define VF610_CLK_PLL3_USB_OTG 21
35#define VF610_CLK_PLL3_PFD1 22 35#define VF610_CLK_PLL3_PFD1 22
36#define VF610_CLK_PLL3_PFD2 23 36#define VF610_CLK_PLL3_PFD2 23
37#define VF610_CLK_PLL3_PFD3 24 37#define VF610_CLK_PLL3_PFD3 24
38#define VF610_CLK_PLL3_PFD4 25 38#define VF610_CLK_PLL3_PFD4 25
39#define VF610_CLK_PLL4_MAIN 26 39#define VF610_CLK_PLL4_AUDIO 26
40#define VF610_CLK_PLL5_MAIN 27 40#define VF610_CLK_PLL5_ENET 27
41#define VF610_CLK_PLL6_MAIN 28 41#define VF610_CLK_PLL6_VIDEO 28
42#define VF610_CLK_PLL3_MAIN_DIV 29 42#define VF610_CLK_PLL3_MAIN_DIV 29
43#define VF610_CLK_PLL4_MAIN_DIV 30 43#define VF610_CLK_PLL4_MAIN_DIV 30
44#define VF610_CLK_PLL6_MAIN_DIV 31 44#define VF610_CLK_PLL6_MAIN_DIV 31
@@ -166,9 +166,32 @@
166#define VF610_CLK_DMAMUX3 153 166#define VF610_CLK_DMAMUX3 153
167#define VF610_CLK_FLEXCAN0_EN 154 167#define VF610_CLK_FLEXCAN0_EN 154
168#define VF610_CLK_FLEXCAN1_EN 155 168#define VF610_CLK_FLEXCAN1_EN 155
169#define VF610_CLK_PLL7_MAIN 156 169#define VF610_CLK_PLL7_USB_HOST 156
170#define VF610_CLK_USBPHY0 157 170#define VF610_CLK_USBPHY0 157
171#define VF610_CLK_USBPHY1 158 171#define VF610_CLK_USBPHY1 158
172#define VF610_CLK_END 159 172#define VF610_CLK_LVDS1_IN 159
173#define VF610_CLK_ANACLK1 160
174#define VF610_CLK_PLL1_BYPASS_SRC 161
175#define VF610_CLK_PLL2_BYPASS_SRC 162
176#define VF610_CLK_PLL3_BYPASS_SRC 163
177#define VF610_CLK_PLL4_BYPASS_SRC 164
178#define VF610_CLK_PLL5_BYPASS_SRC 165
179#define VF610_CLK_PLL6_BYPASS_SRC 166
180#define VF610_CLK_PLL7_BYPASS_SRC 167
181#define VF610_CLK_PLL1 168
182#define VF610_CLK_PLL2 169
183#define VF610_CLK_PLL3 170
184#define VF610_CLK_PLL4 171
185#define VF610_CLK_PLL5 172
186#define VF610_CLK_PLL6 173
187#define VF610_CLK_PLL7 174
188#define VF610_PLL1_BYPASS 175
189#define VF610_PLL2_BYPASS 176
190#define VF610_PLL3_BYPASS 177
191#define VF610_PLL4_BYPASS 178
192#define VF610_PLL5_BYPASS 179
193#define VF610_PLL6_BYPASS 180
194#define VF610_PLL7_BYPASS 181
195#define VF610_CLK_END 182
173 196
174#endif /* __DT_BINDINGS_CLOCK_VF610_H */ 197#endif /* __DT_BINDINGS_CLOCK_VF610_H */