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authorJerome Brunet <jbrunet@baylibre.com>2019-08-12 08:32:52 -0400
committerJerome Brunet <jbrunet@baylibre.com>2019-08-20 05:50:30 -0400
commit0688587a71200911721a0cb025fe805ddc0404b6 (patch)
tree32d49d3eec149646da1c793940ac1976db29c734 /include/dt-bindings
parent85ab9d954698961960240622de4fad85c7d8a61e (diff)
dt-bindings: clock: meson: add resets to the audio clock controller
Add the documentation and bindings for the resets provided by the g12a audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
new file mode 100644
index 000000000000..14b78dabed0e
--- /dev/null
+++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
@@ -0,0 +1,38 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2019 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 *
6 */
7
8#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
9#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
10
11#define AUD_RESET_PDM 0
12#define AUD_RESET_TDMIN_A 1
13#define AUD_RESET_TDMIN_B 2
14#define AUD_RESET_TDMIN_C 3
15#define AUD_RESET_TDMIN_LB 4
16#define AUD_RESET_LOOPBACK 5
17#define AUD_RESET_TODDR_A 6
18#define AUD_RESET_TODDR_B 7
19#define AUD_RESET_TODDR_C 8
20#define AUD_RESET_FRDDR_A 9
21#define AUD_RESET_FRDDR_B 10
22#define AUD_RESET_FRDDR_C 11
23#define AUD_RESET_TDMOUT_A 12
24#define AUD_RESET_TDMOUT_B 13
25#define AUD_RESET_TDMOUT_C 14
26#define AUD_RESET_SPDIFOUT 15
27#define AUD_RESET_SPDIFOUT_B 16
28#define AUD_RESET_SPDIFIN 17
29#define AUD_RESET_EQDRC 18
30#define AUD_RESET_RESAMPLE 19
31#define AUD_RESET_DDRARB 20
32#define AUD_RESET_POWDET 21
33#define AUD_RESET_TORAM 22
34#define AUD_RESET_TOACODEC 23
35#define AUD_RESET_TOHDMITX 24
36#define AUD_RESET_CLKTREE 25
37
38#endif