diff options
author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2019-03-26 03:40:56 -0400 |
---|---|---|
committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2019-04-01 12:15:22 -0400 |
commit | 4ae61358cc1ad537973b242cf390163a2f7b15b2 (patch) | |
tree | e0511bda913cce8b4755f7d5b7076e1da475de44 /include/drm | |
parent | e08891a5b7e6d8b66c09bd6b0a1d3544083461c4 (diff) |
drm/i915: Split some PCI ids into separate groups
This will enable the following patch to consolidate most device ids into
i915_pciids.h.
While cross-referencing the ids listed in i915_drv.h, with the ones listed
in i915_pciids.h, and also the comments in the latter, a bug for bug
approach was used. This means two things:
1.
Some ids are only present in i915_drv.h - obviously this means those parts
would not have been probed at all so they were not added to i915_pciids.h
2.
Some part type comments in i915_pciids.h were in disagreement with
i915_drv.h. For instance parts labeled as ULT or ULX were not considered
as such in i915_drv.h. The existing behaviour takes precedence here.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190326074057.27833-4-tvrtko.ursulin@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/i915_pciids.h | 173 |
1 files changed, 124 insertions, 49 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index cb9b5b35aa2c..6477da22af28 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h | |||
@@ -168,7 +168,18 @@ | |||
168 | #define INTEL_IVB_Q_IDS(info) \ | 168 | #define INTEL_IVB_Q_IDS(info) \ |
169 | INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ | 169 | INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ |
170 | 170 | ||
171 | #define INTEL_HSW_ULT_GT1_IDS(info) \ | ||
172 | INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ | ||
173 | INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ | ||
174 | INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ | ||
175 | INTEL_VGA_DEVICE(0x0A06, info) /* ULT GT1 mobile */ | ||
176 | |||
177 | #define INTEL_HSW_ULX_GT1_IDS(info) \ | ||
178 | INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */ | ||
179 | |||
171 | #define INTEL_HSW_GT1_IDS(info) \ | 180 | #define INTEL_HSW_GT1_IDS(info) \ |
181 | INTEL_HSW_ULT_GT1_IDS(info), \ | ||
182 | INTEL_HSW_ULX_GT1_IDS(info), \ | ||
172 | INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ | 183 | INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ |
173 | INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ | 184 | INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ |
174 | INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ | 185 | INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ |
@@ -177,20 +188,26 @@ | |||
177 | INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ | 188 | INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ |
178 | INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ | 189 | INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ |
179 | INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ | 190 | INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ |
180 | INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ | ||
181 | INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ | ||
182 | INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ | ||
183 | INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ | 191 | INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ |
184 | INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ | 192 | INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ |
185 | INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ | 193 | INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ |
186 | INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ | 194 | INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ |
187 | INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ | 195 | INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ |
188 | INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ | 196 | INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ |
189 | INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ | ||
190 | INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ | ||
191 | INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ | 197 | INTEL_VGA_DEVICE(0x0D06, info) /* CRW GT1 mobile */ |
192 | 198 | ||
199 | #define INTEL_HSW_ULT_GT2_IDS(info) \ | ||
200 | INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ | ||
201 | INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ | ||
202 | INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ | ||
203 | INTEL_VGA_DEVICE(0x0A16, info) /* ULT GT2 mobile */ | ||
204 | |||
205 | #define INTEL_HSW_ULX_GT2_IDS(info) \ | ||
206 | INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \ | ||
207 | |||
193 | #define INTEL_HSW_GT2_IDS(info) \ | 208 | #define INTEL_HSW_GT2_IDS(info) \ |
209 | INTEL_HSW_ULT_GT2_IDS(info), \ | ||
210 | INTEL_HSW_ULX_GT2_IDS(info), \ | ||
194 | INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ | 211 | INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ |
195 | INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ | 212 | INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ |
196 | INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ | 213 | INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ |
@@ -199,9 +216,6 @@ | |||
199 | INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ | 216 | INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ |
200 | INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ | 217 | INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ |
201 | INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ | 218 | INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ |
202 | INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ | ||
203 | INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ | ||
204 | INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ | ||
205 | INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ | 219 | INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ |
206 | INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ | 220 | INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ |
207 | INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ | 221 | INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ |
@@ -209,11 +223,17 @@ | |||
209 | INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ | 223 | INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ |
210 | INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ | 224 | INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ |
211 | INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ | 225 | INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ |
212 | INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ | ||
213 | INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ | ||
214 | INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ | 226 | INTEL_VGA_DEVICE(0x0D16, info) /* CRW GT2 mobile */ |
215 | 227 | ||
228 | #define INTEL_HSW_ULT_GT3_IDS(info) \ | ||
229 | INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ | ||
230 | INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ | ||
231 | INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ | ||
232 | INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ | ||
233 | INTEL_VGA_DEVICE(0x0A2E, info) /* ULT GT3 reserved */ | ||
234 | |||
216 | #define INTEL_HSW_GT3_IDS(info) \ | 235 | #define INTEL_HSW_GT3_IDS(info) \ |
236 | INTEL_HSW_ULT_GT3_IDS(info), \ | ||
217 | INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ | 237 | INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ |
218 | INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ | 238 | INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ |
219 | INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ | 239 | INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ |
@@ -222,16 +242,11 @@ | |||
222 | INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ | 242 | INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ |
223 | INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ | 243 | INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ |
224 | INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ | 244 | INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ |
225 | INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ | ||
226 | INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ | ||
227 | INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ | ||
228 | INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ | 245 | INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ |
229 | INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ | 246 | INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ |
230 | INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ | 247 | INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ |
231 | INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ | 248 | INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \ |
232 | INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ | 249 | INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ |
233 | INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ | ||
234 | INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ | ||
235 | INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ | 250 | INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ |
236 | 251 | ||
237 | #define INTEL_HSW_IDS(info) \ | 252 | #define INTEL_HSW_IDS(info) \ |
@@ -247,35 +262,59 @@ | |||
247 | INTEL_VGA_DEVICE(0x0157, info), \ | 262 | INTEL_VGA_DEVICE(0x0157, info), \ |
248 | INTEL_VGA_DEVICE(0x0155, info) | 263 | INTEL_VGA_DEVICE(0x0155, info) |
249 | 264 | ||
250 | #define INTEL_BDW_GT1_IDS(info) \ | 265 | #define INTEL_BDW_ULT_GT1_IDS(info) \ |
251 | INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ | ||
252 | INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ | 266 | INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \ |
253 | INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \ | 267 | INTEL_VGA_DEVICE(0x160B, info) /* GT1 Iris */ |
254 | INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \ | 268 | |
269 | #define INTEL_BDW_ULX_GT1_IDS(info) \ | ||
270 | INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */ | ||
271 | |||
272 | #define INTEL_BDW_GT1_IDS(info) \ | ||
273 | INTEL_BDW_ULT_GT1_IDS(info), \ | ||
274 | INTEL_BDW_ULX_GT1_IDS(info), \ | ||
275 | INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \ | ||
255 | INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ | 276 | INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \ |
256 | INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */ | 277 | INTEL_VGA_DEVICE(0x160D, info) /* GT1 Workstation */ |
257 | 278 | ||
258 | #define INTEL_BDW_GT2_IDS(info) \ | 279 | #define INTEL_BDW_ULT_GT2_IDS(info) \ |
259 | INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ | ||
260 | INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ | 280 | INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \ |
261 | INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \ | 281 | INTEL_VGA_DEVICE(0x161B, info) /* GT2 ULT */ |
262 | INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \ | 282 | |
283 | #define INTEL_BDW_ULX_GT2_IDS(info) \ | ||
284 | INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */ | ||
285 | |||
286 | #define INTEL_BDW_GT2_IDS(info) \ | ||
287 | INTEL_BDW_ULT_GT2_IDS(info), \ | ||
288 | INTEL_BDW_ULX_GT2_IDS(info), \ | ||
289 | INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \ | ||
263 | INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ | 290 | INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \ |
264 | INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ | 291 | INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */ |
265 | 292 | ||
293 | #define INTEL_BDW_ULT_GT3_IDS(info) \ | ||
294 | INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \ | ||
295 | INTEL_VGA_DEVICE(0x162B, info) /* Iris */ \ | ||
296 | |||
297 | #define INTEL_BDW_ULX_GT3_IDS(info) \ | ||
298 | INTEL_VGA_DEVICE(0x162E, info) /* ULX */ | ||
299 | |||
266 | #define INTEL_BDW_GT3_IDS(info) \ | 300 | #define INTEL_BDW_GT3_IDS(info) \ |
301 | INTEL_BDW_ULT_GT3_IDS(info), \ | ||
302 | INTEL_BDW_ULX_GT3_IDS(info), \ | ||
267 | INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \ | 303 | INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \ |
268 | INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \ | ||
269 | INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \ | ||
270 | INTEL_VGA_DEVICE(0x162E, info), /* ULX */\ | ||
271 | INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ | 304 | INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ |
272 | INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ | 305 | INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ |
273 | 306 | ||
307 | #define INTEL_BDW_ULT_RSVD_IDS(info) \ | ||
308 | INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ | ||
309 | INTEL_VGA_DEVICE(0x163B, info) /* Iris */ | ||
310 | |||
311 | #define INTEL_BDW_ULX_RSVD_IDS(info) \ | ||
312 | INTEL_VGA_DEVICE(0x163E, info) /* ULX */ | ||
313 | |||
274 | #define INTEL_BDW_RSVD_IDS(info) \ | 314 | #define INTEL_BDW_RSVD_IDS(info) \ |
315 | INTEL_BDW_ULT_RSVD_IDS(info), \ | ||
316 | INTEL_BDW_ULX_RSVD_IDS(info), \ | ||
275 | INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ | 317 | INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ |
276 | INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ | ||
277 | INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \ | ||
278 | INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \ | ||
279 | INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ | 318 | INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ |
280 | INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ | 319 | INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ |
281 | 320 | ||
@@ -291,25 +330,40 @@ | |||
291 | INTEL_VGA_DEVICE(0x22b2, info), \ | 330 | INTEL_VGA_DEVICE(0x22b2, info), \ |
292 | INTEL_VGA_DEVICE(0x22b3, info) | 331 | INTEL_VGA_DEVICE(0x22b3, info) |
293 | 332 | ||
333 | #define INTEL_SKL_ULT_GT1_IDS(info) \ | ||
334 | INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */ | ||
335 | |||
336 | #define INTEL_SKL_ULX_GT1_IDS(info) \ | ||
337 | INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */ | ||
338 | |||
294 | #define INTEL_SKL_GT1_IDS(info) \ | 339 | #define INTEL_SKL_GT1_IDS(info) \ |
295 | INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ | 340 | INTEL_SKL_ULT_GT1_IDS(info), \ |
296 | INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ | 341 | INTEL_SKL_ULX_GT1_IDS(info), \ |
297 | INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ | 342 | INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ |
298 | INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ | 343 | INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ |
299 | INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ | 344 | INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */ |
300 | 345 | ||
301 | #define INTEL_SKL_GT2_IDS(info) \ | 346 | #define INTEL_SKL_ULT_GT2_IDS(info) \ |
302 | INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ | 347 | INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ |
303 | INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \ | 348 | INTEL_VGA_DEVICE(0x1921, info) /* ULT GT2F */ |
304 | INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \ | 349 | |
350 | #define INTEL_SKL_ULX_GT2_IDS(info) \ | ||
351 | INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */ | ||
352 | |||
353 | #define INTEL_SKL_GT2_IDS(info) \ | ||
354 | INTEL_SKL_ULT_GT2_IDS(info), \ | ||
355 | INTEL_SKL_ULX_GT2_IDS(info), \ | ||
305 | INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ | 356 | INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ |
306 | INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ | 357 | INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ |
307 | INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ | 358 | INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ |
308 | INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ | 359 | INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ |
309 | 360 | ||
361 | #define INTEL_SKL_ULT_GT3_IDS(info) \ | ||
362 | INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */ | ||
363 | |||
310 | #define INTEL_SKL_GT3_IDS(info) \ | 364 | #define INTEL_SKL_GT3_IDS(info) \ |
365 | INTEL_SKL_ULT_GT3_IDS(info), \ | ||
311 | INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ | 366 | INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \ |
312 | INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ | ||
313 | INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \ | 367 | INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \ |
314 | INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ | 368 | INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ |
315 | INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */ | 369 | INTEL_VGA_DEVICE(0x192D, info) /* SRV GT3 */ |
@@ -338,29 +392,44 @@ | |||
338 | INTEL_VGA_DEVICE(0x3184, info), \ | 392 | INTEL_VGA_DEVICE(0x3184, info), \ |
339 | INTEL_VGA_DEVICE(0x3185, info) | 393 | INTEL_VGA_DEVICE(0x3185, info) |
340 | 394 | ||
341 | #define INTEL_KBL_GT1_IDS(info) \ | 395 | #define INTEL_KBL_ULT_GT1_IDS(info) \ |
342 | INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \ | ||
343 | INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \ | ||
344 | INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ | 396 | INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ |
397 | INTEL_VGA_DEVICE(0x5913, info) /* ULT GT1.5 */ | ||
398 | |||
399 | #define INTEL_KBL_ULX_GT1_IDS(info) \ | ||
345 | INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ | 400 | INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ |
401 | INTEL_VGA_DEVICE(0x5915, info) /* ULX GT1.5 */ | ||
402 | |||
403 | #define INTEL_KBL_GT1_IDS(info) \ | ||
404 | INTEL_KBL_ULT_GT1_IDS(info), \ | ||
405 | INTEL_KBL_ULX_GT1_IDS(info), \ | ||
346 | INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ | 406 | INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ |
347 | INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \ | 407 | INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \ |
348 | INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \ | 408 | INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \ |
349 | INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */ | 409 | INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */ |
350 | 410 | ||
351 | #define INTEL_KBL_GT2_IDS(info) \ | 411 | #define INTEL_KBL_ULT_GT2_IDS(info) \ |
352 | INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ | 412 | INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ |
413 | INTEL_VGA_DEVICE(0x5921, info) /* ULT GT2F */ | ||
414 | |||
415 | #define INTEL_KBL_ULX_GT2_IDS(info) \ | ||
416 | INTEL_VGA_DEVICE(0x591E, info) /* ULX GT2 */ | ||
417 | |||
418 | #define INTEL_KBL_GT2_IDS(info) \ | ||
419 | INTEL_KBL_ULT_GT2_IDS(info), \ | ||
420 | INTEL_KBL_ULX_GT2_IDS(info), \ | ||
353 | INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ | 421 | INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \ |
354 | INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \ | ||
355 | INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \ | ||
356 | INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ | 422 | INTEL_VGA_DEVICE(0x5912, info), /* DT GT2 */ \ |
357 | INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \ | 423 | INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \ |
358 | INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \ | 424 | INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \ |
359 | INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */ | 425 | INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */ |
360 | 426 | ||
427 | #define INTEL_KBL_ULT_GT3_IDS(info) \ | ||
428 | INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */ | ||
429 | |||
361 | #define INTEL_KBL_GT3_IDS(info) \ | 430 | #define INTEL_KBL_GT3_IDS(info) \ |
431 | INTEL_KBL_ULT_GT3_IDS(info), \ | ||
362 | INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \ | 432 | INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \ |
363 | INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \ | ||
364 | INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */ | 433 | INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */ |
365 | 434 | ||
366 | #define INTEL_KBL_GT4_IDS(info) \ | 435 | #define INTEL_KBL_GT4_IDS(info) \ |
@@ -467,7 +536,14 @@ | |||
467 | INTEL_CML_GT2_IDS(info) | 536 | INTEL_CML_GT2_IDS(info) |
468 | 537 | ||
469 | /* CNL */ | 538 | /* CNL */ |
539 | #define INTEL_CNL_PORT_F_IDS(info) \ | ||
540 | INTEL_VGA_DEVICE(0x5A54, info), \ | ||
541 | INTEL_VGA_DEVICE(0x5A5C, info), \ | ||
542 | INTEL_VGA_DEVICE(0x5A44, info), \ | ||
543 | INTEL_VGA_DEVICE(0x5A4C, info) | ||
544 | |||
470 | #define INTEL_CNL_IDS(info) \ | 545 | #define INTEL_CNL_IDS(info) \ |
546 | INTEL_CNL_PORT_F_IDS(info), \ | ||
471 | INTEL_VGA_DEVICE(0x5A51, info), \ | 547 | INTEL_VGA_DEVICE(0x5A51, info), \ |
472 | INTEL_VGA_DEVICE(0x5A59, info), \ | 548 | INTEL_VGA_DEVICE(0x5A59, info), \ |
473 | INTEL_VGA_DEVICE(0x5A41, info), \ | 549 | INTEL_VGA_DEVICE(0x5A41, info), \ |
@@ -477,16 +553,11 @@ | |||
477 | INTEL_VGA_DEVICE(0x5A42, info), \ | 553 | INTEL_VGA_DEVICE(0x5A42, info), \ |
478 | INTEL_VGA_DEVICE(0x5A4A, info), \ | 554 | INTEL_VGA_DEVICE(0x5A4A, info), \ |
479 | INTEL_VGA_DEVICE(0x5A50, info), \ | 555 | INTEL_VGA_DEVICE(0x5A50, info), \ |
480 | INTEL_VGA_DEVICE(0x5A40, info), \ | 556 | INTEL_VGA_DEVICE(0x5A40, info) |
481 | INTEL_VGA_DEVICE(0x5A54, info), \ | ||
482 | INTEL_VGA_DEVICE(0x5A5C, info), \ | ||
483 | INTEL_VGA_DEVICE(0x5A44, info), \ | ||
484 | INTEL_VGA_DEVICE(0x5A4C, info) | ||
485 | 557 | ||
486 | /* ICL */ | 558 | /* ICL */ |
487 | #define INTEL_ICL_11_IDS(info) \ | 559 | #define INTEL_ICL_PORT_F_IDS(info) \ |
488 | INTEL_VGA_DEVICE(0x8A50, info), \ | 560 | INTEL_VGA_DEVICE(0x8A50, info), \ |
489 | INTEL_VGA_DEVICE(0x8A51, info), \ | ||
490 | INTEL_VGA_DEVICE(0x8A5C, info), \ | 561 | INTEL_VGA_DEVICE(0x8A5C, info), \ |
491 | INTEL_VGA_DEVICE(0x8A5D, info), \ | 562 | INTEL_VGA_DEVICE(0x8A5D, info), \ |
492 | INTEL_VGA_DEVICE(0x8A59, info), \ | 563 | INTEL_VGA_DEVICE(0x8A59, info), \ |
@@ -500,6 +571,10 @@ | |||
500 | INTEL_VGA_DEVICE(0x8A70, info), \ | 571 | INTEL_VGA_DEVICE(0x8A70, info), \ |
501 | INTEL_VGA_DEVICE(0x8A53, info) | 572 | INTEL_VGA_DEVICE(0x8A53, info) |
502 | 573 | ||
574 | #define INTEL_ICL_11_IDS(info) \ | ||
575 | INTEL_ICL_PORT_F_IDS(info), \ | ||
576 | INTEL_VGA_DEVICE(0x8A51, info) | ||
577 | |||
503 | /* EHL */ | 578 | /* EHL */ |
504 | #define INTEL_EHL_IDS(info) \ | 579 | #define INTEL_EHL_IDS(info) \ |
505 | INTEL_VGA_DEVICE(0x4500, info), \ | 580 | INTEL_VGA_DEVICE(0x4500, info), \ |