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authorLinus Torvalds <torvalds@linux-foundation.org>2018-02-14 20:02:15 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2018-02-14 20:02:15 -0500
commitd4667ca142610961c89ae7c41a823b3358fcdd0e (patch)
treeff43d39e20feaf477a1ceaf35eba841eebd7e0a6 /drivers
parent6556677a80400ca5744340d8ff6fbed22621293e (diff)
parente48657573481a5dff7cfdc3d57005c80aa816500 (diff)
Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 PTI and Spectre related fixes and updates from Ingo Molnar: "Here's the latest set of Spectre and PTI related fixes and updates: Spectre: - Add entry code register clearing to reduce the Spectre attack surface - Update the Spectre microcode blacklist - Inline the KVM Spectre helpers to get close to v4.14 performance again. - Fix indirect_branch_prediction_barrier() - Fix/improve Spectre related kernel messages - Fix array_index_nospec_mask() asm constraint - KVM: fix two MSR handling bugs PTI: - Fix a paranoid entry PTI CR3 handling bug - Fix comments objtool: - Fix paranoid_entry() frame pointer warning - Annotate WARN()-related UD2 as reachable - Various fixes - Add Add Peter Zijlstra as objtool co-maintainer Misc: - Various x86 entry code self-test fixes - Improve/simplify entry code stack frame generation and handling after recent heavy-handed PTI and Spectre changes. (There's two more WIP improvements expected here.) - Type fix for cache entries There's also some low risk non-fix changes I've included in this branch to reduce backporting conflicts: - rename a confusing x86_cpu field name - de-obfuscate the naming of single-TLB flushing primitives" * 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) x86/entry/64: Fix CR3 restore in paranoid_exit() x86/cpu: Change type of x86_cache_size variable to unsigned int x86/spectre: Fix an error message x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping selftests/x86/mpx: Fix incorrect bounds with old _sigfault x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[user|kernel]() x86/speculation: Add <asm/msr-index.h> dependency nospec: Move array_index_nospec() parameter checking into separate macro x86/speculation: Fix up array_index_nospec_mask() asm constraint x86/debug: Use UD2 for WARN() x86/debug, objtool: Annotate WARN()-related UD2 as reachable objtool: Fix segfault in ignore_unreachable_insn() selftests/x86: Disable tests requiring 32-bit support on pure 64-bit systems selftests/x86: Do not rely on "int $0x80" in single_step_syscall.c selftests/x86: Do not rely on "int $0x80" in test_mremap_vdso.c selftests/x86: Fix build bug caused by the 5lvl test which has been moved to the VM directory selftests/x86/pkeys: Remove unused functions selftests/x86: Clean up and document sscanf() usage selftests/x86: Fix vDSO selftest segfault for vsyscall=none x86/entry/64: Remove the unused 'icebp' macro ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/hw_random/via-rng.c2
-rw-r--r--drivers/cpufreq/acpi-cpufreq.c2
-rw-r--r--drivers/cpufreq/longhaul.c6
-rw-r--r--drivers/cpufreq/p4-clockmod.c2
-rw-r--r--drivers/cpufreq/powernow-k7.c2
-rw-r--r--drivers/cpufreq/speedstep-centrino.c4
-rw-r--r--drivers/cpufreq/speedstep-lib.c6
-rw-r--r--drivers/crypto/padlock-aes.c2
-rw-r--r--drivers/edac/amd64_edac.c2
-rw-r--r--drivers/hwmon/coretemp.c6
-rw-r--r--drivers/hwmon/hwmon-vid.c2
-rw-r--r--drivers/hwmon/k10temp.c2
-rw-r--r--drivers/hwmon/k8temp.c2
-rw-r--r--drivers/video/fbdev/geode/video_gx.c2
14 files changed, 21 insertions, 21 deletions
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index d1f5bb534e0e..6e9df558325b 100644
--- a/drivers/char/hw_random/via-rng.c
+++ b/drivers/char/hw_random/via-rng.c
@@ -162,7 +162,7 @@ static int via_rng_init(struct hwrng *rng)
162 /* Enable secondary noise source on CPUs where it is present. */ 162 /* Enable secondary noise source on CPUs where it is present. */
163 163
164 /* Nehemiah stepping 8 and higher */ 164 /* Nehemiah stepping 8 and higher */
165 if ((c->x86_model == 9) && (c->x86_mask > 7)) 165 if ((c->x86_model == 9) && (c->x86_stepping > 7))
166 lo |= VIA_NOISESRC2; 166 lo |= VIA_NOISESRC2;
167 167
168 /* Esther */ 168 /* Esther */
diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index 3a2ca0f79daf..d0c34df0529c 100644
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c
@@ -629,7 +629,7 @@ static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
629 if (c->x86_vendor == X86_VENDOR_INTEL) { 629 if (c->x86_vendor == X86_VENDOR_INTEL) {
630 if ((c->x86 == 15) && 630 if ((c->x86 == 15) &&
631 (c->x86_model == 6) && 631 (c->x86_model == 6) &&
632 (c->x86_mask == 8)) { 632 (c->x86_stepping == 8)) {
633 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); 633 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
634 return -ENODEV; 634 return -ENODEV;
635 } 635 }
diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c
index 942632a27b50..f730b6528c18 100644
--- a/drivers/cpufreq/longhaul.c
+++ b/drivers/cpufreq/longhaul.c
@@ -775,7 +775,7 @@ static int longhaul_cpu_init(struct cpufreq_policy *policy)
775 break; 775 break;
776 776
777 case 7: 777 case 7:
778 switch (c->x86_mask) { 778 switch (c->x86_stepping) {
779 case 0: 779 case 0:
780 longhaul_version = TYPE_LONGHAUL_V1; 780 longhaul_version = TYPE_LONGHAUL_V1;
781 cpu_model = CPU_SAMUEL2; 781 cpu_model = CPU_SAMUEL2;
@@ -787,7 +787,7 @@ static int longhaul_cpu_init(struct cpufreq_policy *policy)
787 break; 787 break;
788 case 1 ... 15: 788 case 1 ... 15:
789 longhaul_version = TYPE_LONGHAUL_V2; 789 longhaul_version = TYPE_LONGHAUL_V2;
790 if (c->x86_mask < 8) { 790 if (c->x86_stepping < 8) {
791 cpu_model = CPU_SAMUEL2; 791 cpu_model = CPU_SAMUEL2;
792 cpuname = "C3 'Samuel 2' [C5B]"; 792 cpuname = "C3 'Samuel 2' [C5B]";
793 } else { 793 } else {
@@ -814,7 +814,7 @@ static int longhaul_cpu_init(struct cpufreq_policy *policy)
814 numscales = 32; 814 numscales = 32;
815 memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults)); 815 memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
816 memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr)); 816 memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
817 switch (c->x86_mask) { 817 switch (c->x86_stepping) {
818 case 0 ... 1: 818 case 0 ... 1:
819 cpu_model = CPU_NEHEMIAH; 819 cpu_model = CPU_NEHEMIAH;
820 cpuname = "C3 'Nehemiah A' [C5XLOE]"; 820 cpuname = "C3 'Nehemiah A' [C5XLOE]";
diff --git a/drivers/cpufreq/p4-clockmod.c b/drivers/cpufreq/p4-clockmod.c
index fd77812313f3..a25741b1281b 100644
--- a/drivers/cpufreq/p4-clockmod.c
+++ b/drivers/cpufreq/p4-clockmod.c
@@ -168,7 +168,7 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
168#endif 168#endif
169 169
170 /* Errata workaround */ 170 /* Errata workaround */
171 cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask; 171 cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_stepping;
172 switch (cpuid) { 172 switch (cpuid) {
173 case 0x0f07: 173 case 0x0f07:
174 case 0x0f0a: 174 case 0x0f0a:
diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c
index 80ac313e6c59..302e9ce793a0 100644
--- a/drivers/cpufreq/powernow-k7.c
+++ b/drivers/cpufreq/powernow-k7.c
@@ -131,7 +131,7 @@ static int check_powernow(void)
131 return 0; 131 return 0;
132 } 132 }
133 133
134 if ((c->x86_model == 6) && (c->x86_mask == 0)) { 134 if ((c->x86_model == 6) && (c->x86_stepping == 0)) {
135 pr_info("K7 660[A0] core detected, enabling errata workarounds\n"); 135 pr_info("K7 660[A0] core detected, enabling errata workarounds\n");
136 have_a0 = 1; 136 have_a0 = 1;
137 } 137 }
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index 41bc5397f4bb..4fa5adf16c70 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -37,7 +37,7 @@ struct cpu_id
37{ 37{
38 __u8 x86; /* CPU family */ 38 __u8 x86; /* CPU family */
39 __u8 x86_model; /* model */ 39 __u8 x86_model; /* model */
40 __u8 x86_mask; /* stepping */ 40 __u8 x86_stepping; /* stepping */
41}; 41};
42 42
43enum { 43enum {
@@ -277,7 +277,7 @@ static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c,
277{ 277{
278 if ((c->x86 == x->x86) && 278 if ((c->x86 == x->x86) &&
279 (c->x86_model == x->x86_model) && 279 (c->x86_model == x->x86_model) &&
280 (c->x86_mask == x->x86_mask)) 280 (c->x86_stepping == x->x86_stepping))
281 return 1; 281 return 1;
282 return 0; 282 return 0;
283} 283}
diff --git a/drivers/cpufreq/speedstep-lib.c b/drivers/cpufreq/speedstep-lib.c
index 8085ec9000d1..e3a9962ee410 100644
--- a/drivers/cpufreq/speedstep-lib.c
+++ b/drivers/cpufreq/speedstep-lib.c
@@ -272,9 +272,9 @@ unsigned int speedstep_detect_processor(void)
272 ebx = cpuid_ebx(0x00000001); 272 ebx = cpuid_ebx(0x00000001);
273 ebx &= 0x000000FF; 273 ebx &= 0x000000FF;
274 274
275 pr_debug("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask); 275 pr_debug("ebx value is %x, x86_stepping is %x\n", ebx, c->x86_stepping);
276 276
277 switch (c->x86_mask) { 277 switch (c->x86_stepping) {
278 case 4: 278 case 4:
279 /* 279 /*
280 * B-stepping [M-P4-M] 280 * B-stepping [M-P4-M]
@@ -361,7 +361,7 @@ unsigned int speedstep_detect_processor(void)
361 msr_lo, msr_hi); 361 msr_lo, msr_hi);
362 if ((msr_hi & (1<<18)) && 362 if ((msr_hi & (1<<18)) &&
363 (relaxed_check ? 1 : (msr_hi & (3<<24)))) { 363 (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
364 if (c->x86_mask == 0x01) { 364 if (c->x86_stepping == 0x01) {
365 pr_debug("early PIII version\n"); 365 pr_debug("early PIII version\n");
366 return SPEEDSTEP_CPU_PIII_C_EARLY; 366 return SPEEDSTEP_CPU_PIII_C_EARLY;
367 } else 367 } else
diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index 4b6642a25df5..1c6cbda56afe 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -512,7 +512,7 @@ static int __init padlock_init(void)
512 512
513 printk(KERN_NOTICE PFX "Using VIA PadLock ACE for AES algorithm.\n"); 513 printk(KERN_NOTICE PFX "Using VIA PadLock ACE for AES algorithm.\n");
514 514
515 if (c->x86 == 6 && c->x86_model == 15 && c->x86_mask == 2) { 515 if (c->x86 == 6 && c->x86_model == 15 && c->x86_stepping == 2) {
516 ecb_fetch_blocks = MAX_ECB_FETCH_BLOCKS; 516 ecb_fetch_blocks = MAX_ECB_FETCH_BLOCKS;
517 cbc_fetch_blocks = MAX_CBC_FETCH_BLOCKS; 517 cbc_fetch_blocks = MAX_CBC_FETCH_BLOCKS;
518 printk(KERN_NOTICE PFX "VIA Nano stepping 2 detected: enabling workaround.\n"); 518 printk(KERN_NOTICE PFX "VIA Nano stepping 2 detected: enabling workaround.\n");
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 8b16ec595fa7..329cb96f886f 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3147,7 +3147,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
3147 struct amd64_family_type *fam_type = NULL; 3147 struct amd64_family_type *fam_type = NULL;
3148 3148
3149 pvt->ext_model = boot_cpu_data.x86_model >> 4; 3149 pvt->ext_model = boot_cpu_data.x86_model >> 4;
3150 pvt->stepping = boot_cpu_data.x86_mask; 3150 pvt->stepping = boot_cpu_data.x86_stepping;
3151 pvt->model = boot_cpu_data.x86_model; 3151 pvt->model = boot_cpu_data.x86_model;
3152 pvt->fam = boot_cpu_data.x86; 3152 pvt->fam = boot_cpu_data.x86;
3153 3153
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 4bdbf77f7197..72c338eb5fae 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -269,13 +269,13 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
269 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { 269 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
270 const struct tjmax_model *tm = &tjmax_model_table[i]; 270 const struct tjmax_model *tm = &tjmax_model_table[i];
271 if (c->x86_model == tm->model && 271 if (c->x86_model == tm->model &&
272 (tm->mask == ANY || c->x86_mask == tm->mask)) 272 (tm->mask == ANY || c->x86_stepping == tm->mask))
273 return tm->tjmax; 273 return tm->tjmax;
274 } 274 }
275 275
276 /* Early chips have no MSR for TjMax */ 276 /* Early chips have no MSR for TjMax */
277 277
278 if (c->x86_model == 0xf && c->x86_mask < 4) 278 if (c->x86_model == 0xf && c->x86_stepping < 4)
279 usemsr_ee = 0; 279 usemsr_ee = 0;
280 280
281 if (c->x86_model > 0xe && usemsr_ee) { 281 if (c->x86_model > 0xe && usemsr_ee) {
@@ -426,7 +426,7 @@ static int chk_ucode_version(unsigned int cpu)
426 * Readings might stop update when processor visited too deep sleep, 426 * Readings might stop update when processor visited too deep sleep,
427 * fixed for stepping D0 (6EC). 427 * fixed for stepping D0 (6EC).
428 */ 428 */
429 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { 429 if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
430 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); 430 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
431 return -ENODEV; 431 return -ENODEV;
432 } 432 }
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index ef91b8a67549..84e91286fc4f 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -293,7 +293,7 @@ u8 vid_which_vrm(void)
293 if (c->x86 < 6) /* Any CPU with family lower than 6 */ 293 if (c->x86 < 6) /* Any CPU with family lower than 6 */
294 return 0; /* doesn't have VID */ 294 return 0; /* doesn't have VID */
295 295
296 vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_mask, c->x86_vendor); 296 vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_stepping, c->x86_vendor);
297 if (vrm_ret == 134) 297 if (vrm_ret == 134)
298 vrm_ret = get_via_model_d_vrm(); 298 vrm_ret = get_via_model_d_vrm();
299 if (vrm_ret == 0) 299 if (vrm_ret == 0)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 06b4e1c78bd8..30303632fbb7 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -227,7 +227,7 @@ static bool has_erratum_319(struct pci_dev *pdev)
227 * and AM3 formats, but that's the best we can do. 227 * and AM3 formats, but that's the best we can do.
228 */ 228 */
229 return boot_cpu_data.x86_model < 4 || 229 return boot_cpu_data.x86_model < 4 ||
230 (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2); 230 (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_stepping <= 2);
231} 231}
232 232
233static int k10temp_probe(struct pci_dev *pdev, 233static int k10temp_probe(struct pci_dev *pdev,
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index 5a632bcf869b..e59f9113fb93 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -187,7 +187,7 @@ static int k8temp_probe(struct pci_dev *pdev,
187 return -ENOMEM; 187 return -ENOMEM;
188 188
189 model = boot_cpu_data.x86_model; 189 model = boot_cpu_data.x86_model;
190 stepping = boot_cpu_data.x86_mask; 190 stepping = boot_cpu_data.x86_stepping;
191 191
192 /* feature available since SH-C0, exclude older revisions */ 192 /* feature available since SH-C0, exclude older revisions */
193 if ((model == 4 && stepping == 0) || 193 if ((model == 4 && stepping == 0) ||
diff --git a/drivers/video/fbdev/geode/video_gx.c b/drivers/video/fbdev/geode/video_gx.c
index 6082f653c68a..67773e8bbb95 100644
--- a/drivers/video/fbdev/geode/video_gx.c
+++ b/drivers/video/fbdev/geode/video_gx.c
@@ -127,7 +127,7 @@ void gx_set_dclk_frequency(struct fb_info *info)
127 int timeout = 1000; 127 int timeout = 1000;
128 128
129 /* Rev. 1 Geode GXs use a 14 MHz reference clock instead of 48 MHz. */ 129 /* Rev. 1 Geode GXs use a 14 MHz reference clock instead of 48 MHz. */
130 if (cpu_data(0).x86_mask == 1) { 130 if (cpu_data(0).x86_stepping == 1) {
131 pll_table = gx_pll_table_14MHz; 131 pll_table = gx_pll_table_14MHz;
132 pll_table_len = ARRAY_SIZE(gx_pll_table_14MHz); 132 pll_table_len = ARRAY_SIZE(gx_pll_table_14MHz);
133 } else { 133 } else {