diff options
author | David S. Miller <davem@davemloft.net> | 2018-01-19 22:59:33 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2018-01-19 22:59:33 -0500 |
commit | 8565d26bcb2ff6df646e946d2913fcf706d46b66 (patch) | |
tree | 21ffaccc3cbac5e558d51c20cfbecbfec86a02c4 /drivers | |
parent | 85831e56a1d0c75a1560e61acbb8591e9f11c6b7 (diff) | |
parent | ec835f8104a21f4d4eeb9d316ee71d2b4a7f00de (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
The BPF verifier conflict was some minor contextual issue.
The TUN conflict was less trivial. Cong Wang fixed a memory leak of
tfile->tx_array in 'net'. This is an skb_array. But meanwhile in
net-next tun changed tfile->tx_arry into tfile->tx_ring which is a
ptr_ring.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
44 files changed, 561 insertions, 273 deletions
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 8193b38a1cae..3c09122bf038 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -4449,6 +4449,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4449 | * https://bugzilla.kernel.org/show_bug.cgi?id=121671 | 4449 | * https://bugzilla.kernel.org/show_bug.cgi?id=121671 |
4450 | */ | 4450 | */ |
4451 | { "LITEON CX1-JB*-HP", NULL, ATA_HORKAGE_MAX_SEC_1024 }, | 4451 | { "LITEON CX1-JB*-HP", NULL, ATA_HORKAGE_MAX_SEC_1024 }, |
4452 | { "LITEON EP1-*", NULL, ATA_HORKAGE_MAX_SEC_1024 }, | ||
4452 | 4453 | ||
4453 | /* Devices we expect to fail diagnostics */ | 4454 | /* Devices we expect to fail diagnostics */ |
4454 | 4455 | ||
diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 02d78f6cecbb..ba8acca036df 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig | |||
@@ -55,7 +55,7 @@ config BCMA_DRIVER_PCI | |||
55 | 55 | ||
56 | config BCMA_DRIVER_PCI_HOSTMODE | 56 | config BCMA_DRIVER_PCI_HOSTMODE |
57 | bool "Driver for PCI core working in hostmode" | 57 | bool "Driver for PCI core working in hostmode" |
58 | depends on MIPS && BCMA_DRIVER_PCI | 58 | depends on MIPS && BCMA_DRIVER_PCI && PCI_DRIVERS_LEGACY |
59 | help | 59 | help |
60 | PCI core hostmode operation (external PCI bus). | 60 | PCI core hostmode operation (external PCI bus). |
61 | 61 | ||
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index f9042bcc27a4..7b14d6280e44 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c | |||
@@ -152,14 +152,13 @@ static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, | |||
152 | { | 152 | { |
153 | unsigned long get_mask = 0; | 153 | unsigned long get_mask = 0; |
154 | unsigned long set_mask = 0; | 154 | unsigned long set_mask = 0; |
155 | int bit = 0; | ||
156 | 155 | ||
157 | while ((bit = find_next_bit(mask, gc->ngpio, bit)) != gc->ngpio) { | 156 | /* Make sure we first clear any bits that are zero when we read the register */ |
158 | if (gc->bgpio_dir & BIT(bit)) | 157 | *bits &= ~*mask; |
159 | set_mask |= BIT(bit); | 158 | |
160 | else | 159 | /* Exploit the fact that we know which directions are set */ |
161 | get_mask |= BIT(bit); | 160 | set_mask = *mask & gc->bgpio_dir; |
162 | } | 161 | get_mask = *mask & ~gc->bgpio_dir; |
163 | 162 | ||
164 | if (set_mask) | 163 | if (set_mask) |
165 | *bits |= gc->read_reg(gc->reg_set) & set_mask; | 164 | *bits |= gc->read_reg(gc->reg_set) & set_mask; |
@@ -176,13 +175,13 @@ static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) | |||
176 | 175 | ||
177 | /* | 176 | /* |
178 | * This only works if the bits in the GPIO register are in native endianness. | 177 | * This only works if the bits in the GPIO register are in native endianness. |
179 | * It is dirt simple and fast in this case. (Also the most common case.) | ||
180 | */ | 178 | */ |
181 | static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, | 179 | static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, |
182 | unsigned long *bits) | 180 | unsigned long *bits) |
183 | { | 181 | { |
184 | 182 | /* Make sure we first clear any bits that are zero when we read the register */ | |
185 | *bits = gc->read_reg(gc->reg_dat) & *mask; | 183 | *bits &= ~*mask; |
184 | *bits |= gc->read_reg(gc->reg_dat) & *mask; | ||
186 | return 0; | 185 | return 0; |
187 | } | 186 | } |
188 | 187 | ||
@@ -196,9 +195,12 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, | |||
196 | unsigned long val; | 195 | unsigned long val; |
197 | int bit; | 196 | int bit; |
198 | 197 | ||
198 | /* Make sure we first clear any bits that are zero when we read the register */ | ||
199 | *bits &= ~*mask; | ||
200 | |||
199 | /* Create a mirrored mask */ | 201 | /* Create a mirrored mask */ |
200 | bit = 0; | 202 | bit = -1; |
201 | while ((bit = find_next_bit(mask, gc->ngpio, bit)) != gc->ngpio) | 203 | while ((bit = find_next_bit(mask, gc->ngpio, bit + 1)) < gc->ngpio) |
202 | readmask |= bgpio_line2mask(gc, bit); | 204 | readmask |= bgpio_line2mask(gc, bit); |
203 | 205 | ||
204 | /* Read the register */ | 206 | /* Read the register */ |
@@ -208,8 +210,8 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, | |||
208 | * Mirror the result into the "bits" result, this will give line 0 | 210 | * Mirror the result into the "bits" result, this will give line 0 |
209 | * in bit 0 ... line 31 in bit 31 for a 32bit register. | 211 | * in bit 0 ... line 31 in bit 31 for a 32bit register. |
210 | */ | 212 | */ |
211 | bit = 0; | 213 | bit = -1; |
212 | while ((bit = find_next_bit(&val, gc->ngpio, bit)) != gc->ngpio) | 214 | while ((bit = find_next_bit(&val, gc->ngpio, bit + 1)) < gc->ngpio) |
213 | *bits |= bgpio_line2mask(gc, bit); | 215 | *bits |= bgpio_line2mask(gc, bit); |
214 | 216 | ||
215 | return 0; | 217 | return 0; |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 123585eeb87d..50f8443641b8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1211,23 +1211,6 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
1211 | pipe_name(pipe)); | 1211 | pipe_name(pipe)); |
1212 | } | 1212 | } |
1213 | 1213 | ||
1214 | static void assert_cursor(struct drm_i915_private *dev_priv, | ||
1215 | enum pipe pipe, bool state) | ||
1216 | { | ||
1217 | bool cur_state; | ||
1218 | |||
1219 | if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) | ||
1220 | cur_state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE; | ||
1221 | else | ||
1222 | cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; | ||
1223 | |||
1224 | I915_STATE_WARN(cur_state != state, | ||
1225 | "cursor on pipe %c assertion failure (expected %s, current %s)\n", | ||
1226 | pipe_name(pipe), onoff(state), onoff(cur_state)); | ||
1227 | } | ||
1228 | #define assert_cursor_enabled(d, p) assert_cursor(d, p, true) | ||
1229 | #define assert_cursor_disabled(d, p) assert_cursor(d, p, false) | ||
1230 | |||
1231 | void assert_pipe(struct drm_i915_private *dev_priv, | 1214 | void assert_pipe(struct drm_i915_private *dev_priv, |
1232 | enum pipe pipe, bool state) | 1215 | enum pipe pipe, bool state) |
1233 | { | 1216 | { |
@@ -1255,77 +1238,25 @@ void assert_pipe(struct drm_i915_private *dev_priv, | |||
1255 | pipe_name(pipe), onoff(state), onoff(cur_state)); | 1238 | pipe_name(pipe), onoff(state), onoff(cur_state)); |
1256 | } | 1239 | } |
1257 | 1240 | ||
1258 | static void assert_plane(struct drm_i915_private *dev_priv, | 1241 | static void assert_plane(struct intel_plane *plane, bool state) |
1259 | enum plane plane, bool state) | ||
1260 | { | 1242 | { |
1261 | u32 val; | 1243 | bool cur_state = plane->get_hw_state(plane); |
1262 | bool cur_state; | ||
1263 | 1244 | ||
1264 | val = I915_READ(DSPCNTR(plane)); | ||
1265 | cur_state = !!(val & DISPLAY_PLANE_ENABLE); | ||
1266 | I915_STATE_WARN(cur_state != state, | 1245 | I915_STATE_WARN(cur_state != state, |
1267 | "plane %c assertion failure (expected %s, current %s)\n", | 1246 | "%s assertion failure (expected %s, current %s)\n", |
1268 | plane_name(plane), onoff(state), onoff(cur_state)); | 1247 | plane->base.name, onoff(state), onoff(cur_state)); |
1269 | } | 1248 | } |
1270 | 1249 | ||
1271 | #define assert_plane_enabled(d, p) assert_plane(d, p, true) | 1250 | #define assert_plane_enabled(p) assert_plane(p, true) |
1272 | #define assert_plane_disabled(d, p) assert_plane(d, p, false) | 1251 | #define assert_plane_disabled(p) assert_plane(p, false) |
1273 | |||
1274 | static void assert_planes_disabled(struct drm_i915_private *dev_priv, | ||
1275 | enum pipe pipe) | ||
1276 | { | ||
1277 | int i; | ||
1278 | |||
1279 | /* Primary planes are fixed to pipes on gen4+ */ | ||
1280 | if (INTEL_GEN(dev_priv) >= 4) { | ||
1281 | u32 val = I915_READ(DSPCNTR(pipe)); | ||
1282 | I915_STATE_WARN(val & DISPLAY_PLANE_ENABLE, | ||
1283 | "plane %c assertion failure, should be disabled but not\n", | ||
1284 | plane_name(pipe)); | ||
1285 | return; | ||
1286 | } | ||
1287 | 1252 | ||
1288 | /* Need to check both planes against the pipe */ | 1253 | static void assert_planes_disabled(struct intel_crtc *crtc) |
1289 | for_each_pipe(dev_priv, i) { | ||
1290 | u32 val = I915_READ(DSPCNTR(i)); | ||
1291 | enum pipe cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >> | ||
1292 | DISPPLANE_SEL_PIPE_SHIFT; | ||
1293 | I915_STATE_WARN((val & DISPLAY_PLANE_ENABLE) && pipe == cur_pipe, | ||
1294 | "plane %c assertion failure, should be off on pipe %c but is still active\n", | ||
1295 | plane_name(i), pipe_name(pipe)); | ||
1296 | } | ||
1297 | } | ||
1298 | |||
1299 | static void assert_sprites_disabled(struct drm_i915_private *dev_priv, | ||
1300 | enum pipe pipe) | ||
1301 | { | 1254 | { |
1302 | int sprite; | 1255 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
1256 | struct intel_plane *plane; | ||
1303 | 1257 | ||
1304 | if (INTEL_GEN(dev_priv) >= 9) { | 1258 | for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) |
1305 | for_each_sprite(dev_priv, pipe, sprite) { | 1259 | assert_plane_disabled(plane); |
1306 | u32 val = I915_READ(PLANE_CTL(pipe, sprite)); | ||
1307 | I915_STATE_WARN(val & PLANE_CTL_ENABLE, | ||
1308 | "plane %d assertion failure, should be off on pipe %c but is still active\n", | ||
1309 | sprite, pipe_name(pipe)); | ||
1310 | } | ||
1311 | } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { | ||
1312 | for_each_sprite(dev_priv, pipe, sprite) { | ||
1313 | u32 val = I915_READ(SPCNTR(pipe, PLANE_SPRITE0 + sprite)); | ||
1314 | I915_STATE_WARN(val & SP_ENABLE, | ||
1315 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | ||
1316 | sprite_name(pipe, sprite), pipe_name(pipe)); | ||
1317 | } | ||
1318 | } else if (INTEL_GEN(dev_priv) >= 7) { | ||
1319 | u32 val = I915_READ(SPRCTL(pipe)); | ||
1320 | I915_STATE_WARN(val & SPRITE_ENABLE, | ||
1321 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | ||
1322 | plane_name(pipe), pipe_name(pipe)); | ||
1323 | } else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) { | ||
1324 | u32 val = I915_READ(DVSCNTR(pipe)); | ||
1325 | I915_STATE_WARN(val & DVS_ENABLE, | ||
1326 | "sprite %c assertion failure, should be off on pipe %c but is still active\n", | ||
1327 | plane_name(pipe), pipe_name(pipe)); | ||
1328 | } | ||
1329 | } | 1260 | } |
1330 | 1261 | ||
1331 | static void assert_vblank_disabled(struct drm_crtc *crtc) | 1262 | static void assert_vblank_disabled(struct drm_crtc *crtc) |
@@ -1918,9 +1849,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc) | |||
1918 | 1849 | ||
1919 | DRM_DEBUG_KMS("enabling pipe %c\n", pipe_name(pipe)); | 1850 | DRM_DEBUG_KMS("enabling pipe %c\n", pipe_name(pipe)); |
1920 | 1851 | ||
1921 | assert_planes_disabled(dev_priv, pipe); | 1852 | assert_planes_disabled(crtc); |
1922 | assert_cursor_disabled(dev_priv, pipe); | ||
1923 | assert_sprites_disabled(dev_priv, pipe); | ||
1924 | 1853 | ||
1925 | /* | 1854 | /* |
1926 | * A pipe without a PLL won't actually be able to drive bits from | 1855 | * A pipe without a PLL won't actually be able to drive bits from |
@@ -1989,9 +1918,7 @@ static void intel_disable_pipe(struct intel_crtc *crtc) | |||
1989 | * Make sure planes won't keep trying to pump pixels to us, | 1918 | * Make sure planes won't keep trying to pump pixels to us, |
1990 | * or we might hang the display. | 1919 | * or we might hang the display. |
1991 | */ | 1920 | */ |
1992 | assert_planes_disabled(dev_priv, pipe); | 1921 | assert_planes_disabled(crtc); |
1993 | assert_cursor_disabled(dev_priv, pipe); | ||
1994 | assert_sprites_disabled(dev_priv, pipe); | ||
1995 | 1922 | ||
1996 | reg = PIPECONF(cpu_transcoder); | 1923 | reg = PIPECONF(cpu_transcoder); |
1997 | val = I915_READ(reg); | 1924 | val = I915_READ(reg); |
@@ -2820,6 +2747,23 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, | |||
2820 | crtc_state->active_planes); | 2747 | crtc_state->active_planes); |
2821 | } | 2748 | } |
2822 | 2749 | ||
2750 | static void intel_plane_disable_noatomic(struct intel_crtc *crtc, | ||
2751 | struct intel_plane *plane) | ||
2752 | { | ||
2753 | struct intel_crtc_state *crtc_state = | ||
2754 | to_intel_crtc_state(crtc->base.state); | ||
2755 | struct intel_plane_state *plane_state = | ||
2756 | to_intel_plane_state(plane->base.state); | ||
2757 | |||
2758 | intel_set_plane_visible(crtc_state, plane_state, false); | ||
2759 | |||
2760 | if (plane->id == PLANE_PRIMARY) | ||
2761 | intel_pre_disable_primary_noatomic(&crtc->base); | ||
2762 | |||
2763 | trace_intel_disable_plane(&plane->base, crtc); | ||
2764 | plane->disable_plane(plane, crtc); | ||
2765 | } | ||
2766 | |||
2823 | static void | 2767 | static void |
2824 | intel_find_initial_plane_obj(struct intel_crtc *intel_crtc, | 2768 | intel_find_initial_plane_obj(struct intel_crtc *intel_crtc, |
2825 | struct intel_initial_plane_config *plane_config) | 2769 | struct intel_initial_plane_config *plane_config) |
@@ -2877,12 +2821,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc, | |||
2877 | * simplest solution is to just disable the primary plane now and | 2821 | * simplest solution is to just disable the primary plane now and |
2878 | * pretend the BIOS never had it enabled. | 2822 | * pretend the BIOS never had it enabled. |
2879 | */ | 2823 | */ |
2880 | intel_set_plane_visible(to_intel_crtc_state(crtc_state), | 2824 | intel_plane_disable_noatomic(intel_crtc, intel_plane); |
2881 | to_intel_plane_state(plane_state), | ||
2882 | false); | ||
2883 | intel_pre_disable_primary_noatomic(&intel_crtc->base); | ||
2884 | trace_intel_disable_plane(primary, intel_crtc); | ||
2885 | intel_plane->disable_plane(intel_plane, intel_crtc); | ||
2886 | 2825 | ||
2887 | return; | 2826 | return; |
2888 | 2827 | ||
@@ -3385,6 +3324,31 @@ static void i9xx_disable_primary_plane(struct intel_plane *primary, | |||
3385 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 3324 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
3386 | } | 3325 | } |
3387 | 3326 | ||
3327 | static bool i9xx_plane_get_hw_state(struct intel_plane *primary) | ||
3328 | { | ||
3329 | |||
3330 | struct drm_i915_private *dev_priv = to_i915(primary->base.dev); | ||
3331 | enum intel_display_power_domain power_domain; | ||
3332 | enum plane plane = primary->plane; | ||
3333 | enum pipe pipe = primary->pipe; | ||
3334 | bool ret; | ||
3335 | |||
3336 | /* | ||
3337 | * Not 100% correct for planes that can move between pipes, | ||
3338 | * but that's only the case for gen2-4 which don't have any | ||
3339 | * display power wells. | ||
3340 | */ | ||
3341 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
3342 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
3343 | return false; | ||
3344 | |||
3345 | ret = I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE; | ||
3346 | |||
3347 | intel_display_power_put(dev_priv, power_domain); | ||
3348 | |||
3349 | return ret; | ||
3350 | } | ||
3351 | |||
3388 | static u32 | 3352 | static u32 |
3389 | intel_fb_stride_alignment(const struct drm_framebuffer *fb, int plane) | 3353 | intel_fb_stride_alignment(const struct drm_framebuffer *fb, int plane) |
3390 | { | 3354 | { |
@@ -4866,7 +4830,8 @@ void hsw_enable_ips(struct intel_crtc *crtc) | |||
4866 | * a vblank wait. | 4830 | * a vblank wait. |
4867 | */ | 4831 | */ |
4868 | 4832 | ||
4869 | assert_plane_enabled(dev_priv, crtc->plane); | 4833 | assert_plane_enabled(to_intel_plane(crtc->base.primary)); |
4834 | |||
4870 | if (IS_BROADWELL(dev_priv)) { | 4835 | if (IS_BROADWELL(dev_priv)) { |
4871 | mutex_lock(&dev_priv->pcu_lock); | 4836 | mutex_lock(&dev_priv->pcu_lock); |
4872 | WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, | 4837 | WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, |
@@ -4899,7 +4864,8 @@ void hsw_disable_ips(struct intel_crtc *crtc) | |||
4899 | if (!crtc->config->ips_enabled) | 4864 | if (!crtc->config->ips_enabled) |
4900 | return; | 4865 | return; |
4901 | 4866 | ||
4902 | assert_plane_enabled(dev_priv, crtc->plane); | 4867 | assert_plane_enabled(to_intel_plane(crtc->base.primary)); |
4868 | |||
4903 | if (IS_BROADWELL(dev_priv)) { | 4869 | if (IS_BROADWELL(dev_priv)) { |
4904 | mutex_lock(&dev_priv->pcu_lock); | 4870 | mutex_lock(&dev_priv->pcu_lock); |
4905 | WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0)); | 4871 | WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0)); |
@@ -5899,6 +5865,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc, | |||
5899 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 5865 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
5900 | struct drm_i915_private *dev_priv = to_i915(crtc->dev); | 5866 | struct drm_i915_private *dev_priv = to_i915(crtc->dev); |
5901 | enum intel_display_power_domain domain; | 5867 | enum intel_display_power_domain domain; |
5868 | struct intel_plane *plane; | ||
5902 | u64 domains; | 5869 | u64 domains; |
5903 | struct drm_atomic_state *state; | 5870 | struct drm_atomic_state *state; |
5904 | struct intel_crtc_state *crtc_state; | 5871 | struct intel_crtc_state *crtc_state; |
@@ -5907,11 +5874,12 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc, | |||
5907 | if (!intel_crtc->active) | 5874 | if (!intel_crtc->active) |
5908 | return; | 5875 | return; |
5909 | 5876 | ||
5910 | if (crtc->primary->state->visible) { | 5877 | for_each_intel_plane_on_crtc(&dev_priv->drm, intel_crtc, plane) { |
5911 | intel_pre_disable_primary_noatomic(crtc); | 5878 | const struct intel_plane_state *plane_state = |
5879 | to_intel_plane_state(plane->base.state); | ||
5912 | 5880 | ||
5913 | intel_crtc_disable_planes(crtc, 1 << drm_plane_index(crtc->primary)); | 5881 | if (plane_state->base.visible) |
5914 | crtc->primary->state->visible = false; | 5882 | intel_plane_disable_noatomic(intel_crtc, plane); |
5915 | } | 5883 | } |
5916 | 5884 | ||
5917 | state = drm_atomic_state_alloc(crtc->dev); | 5885 | state = drm_atomic_state_alloc(crtc->dev); |
@@ -9477,6 +9445,23 @@ static void i845_disable_cursor(struct intel_plane *plane, | |||
9477 | i845_update_cursor(plane, NULL, NULL); | 9445 | i845_update_cursor(plane, NULL, NULL); |
9478 | } | 9446 | } |
9479 | 9447 | ||
9448 | static bool i845_cursor_get_hw_state(struct intel_plane *plane) | ||
9449 | { | ||
9450 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
9451 | enum intel_display_power_domain power_domain; | ||
9452 | bool ret; | ||
9453 | |||
9454 | power_domain = POWER_DOMAIN_PIPE(PIPE_A); | ||
9455 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
9456 | return false; | ||
9457 | |||
9458 | ret = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE; | ||
9459 | |||
9460 | intel_display_power_put(dev_priv, power_domain); | ||
9461 | |||
9462 | return ret; | ||
9463 | } | ||
9464 | |||
9480 | static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, | 9465 | static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state, |
9481 | const struct intel_plane_state *plane_state) | 9466 | const struct intel_plane_state *plane_state) |
9482 | { | 9467 | { |
@@ -9670,6 +9655,28 @@ static void i9xx_disable_cursor(struct intel_plane *plane, | |||
9670 | i9xx_update_cursor(plane, NULL, NULL); | 9655 | i9xx_update_cursor(plane, NULL, NULL); |
9671 | } | 9656 | } |
9672 | 9657 | ||
9658 | static bool i9xx_cursor_get_hw_state(struct intel_plane *plane) | ||
9659 | { | ||
9660 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
9661 | enum intel_display_power_domain power_domain; | ||
9662 | enum pipe pipe = plane->pipe; | ||
9663 | bool ret; | ||
9664 | |||
9665 | /* | ||
9666 | * Not 100% correct for planes that can move between pipes, | ||
9667 | * but that's only the case for gen2-3 which don't have any | ||
9668 | * display power wells. | ||
9669 | */ | ||
9670 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
9671 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
9672 | return false; | ||
9673 | |||
9674 | ret = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; | ||
9675 | |||
9676 | intel_display_power_put(dev_priv, power_domain); | ||
9677 | |||
9678 | return ret; | ||
9679 | } | ||
9673 | 9680 | ||
9674 | /* VESA 640x480x72Hz mode to set on the pipe */ | 9681 | /* VESA 640x480x72Hz mode to set on the pipe */ |
9675 | static const struct drm_display_mode load_detect_mode = { | 9682 | static const struct drm_display_mode load_detect_mode = { |
@@ -13205,6 +13212,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13205 | 13212 | ||
13206 | primary->update_plane = skl_update_plane; | 13213 | primary->update_plane = skl_update_plane; |
13207 | primary->disable_plane = skl_disable_plane; | 13214 | primary->disable_plane = skl_disable_plane; |
13215 | primary->get_hw_state = skl_plane_get_hw_state; | ||
13208 | } else if (INTEL_GEN(dev_priv) >= 9) { | 13216 | } else if (INTEL_GEN(dev_priv) >= 9) { |
13209 | intel_primary_formats = skl_primary_formats; | 13217 | intel_primary_formats = skl_primary_formats; |
13210 | num_formats = ARRAY_SIZE(skl_primary_formats); | 13218 | num_formats = ARRAY_SIZE(skl_primary_formats); |
@@ -13215,6 +13223,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13215 | 13223 | ||
13216 | primary->update_plane = skl_update_plane; | 13224 | primary->update_plane = skl_update_plane; |
13217 | primary->disable_plane = skl_disable_plane; | 13225 | primary->disable_plane = skl_disable_plane; |
13226 | primary->get_hw_state = skl_plane_get_hw_state; | ||
13218 | } else if (INTEL_GEN(dev_priv) >= 4) { | 13227 | } else if (INTEL_GEN(dev_priv) >= 4) { |
13219 | intel_primary_formats = i965_primary_formats; | 13228 | intel_primary_formats = i965_primary_formats; |
13220 | num_formats = ARRAY_SIZE(i965_primary_formats); | 13229 | num_formats = ARRAY_SIZE(i965_primary_formats); |
@@ -13222,6 +13231,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13222 | 13231 | ||
13223 | primary->update_plane = i9xx_update_primary_plane; | 13232 | primary->update_plane = i9xx_update_primary_plane; |
13224 | primary->disable_plane = i9xx_disable_primary_plane; | 13233 | primary->disable_plane = i9xx_disable_primary_plane; |
13234 | primary->get_hw_state = i9xx_plane_get_hw_state; | ||
13225 | } else { | 13235 | } else { |
13226 | intel_primary_formats = i8xx_primary_formats; | 13236 | intel_primary_formats = i8xx_primary_formats; |
13227 | num_formats = ARRAY_SIZE(i8xx_primary_formats); | 13237 | num_formats = ARRAY_SIZE(i8xx_primary_formats); |
@@ -13229,6 +13239,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
13229 | 13239 | ||
13230 | primary->update_plane = i9xx_update_primary_plane; | 13240 | primary->update_plane = i9xx_update_primary_plane; |
13231 | primary->disable_plane = i9xx_disable_primary_plane; | 13241 | primary->disable_plane = i9xx_disable_primary_plane; |
13242 | primary->get_hw_state = i9xx_plane_get_hw_state; | ||
13232 | } | 13243 | } |
13233 | 13244 | ||
13234 | if (INTEL_GEN(dev_priv) >= 9) | 13245 | if (INTEL_GEN(dev_priv) >= 9) |
@@ -13318,10 +13329,12 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, | |||
13318 | if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) { | 13329 | if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) { |
13319 | cursor->update_plane = i845_update_cursor; | 13330 | cursor->update_plane = i845_update_cursor; |
13320 | cursor->disable_plane = i845_disable_cursor; | 13331 | cursor->disable_plane = i845_disable_cursor; |
13332 | cursor->get_hw_state = i845_cursor_get_hw_state; | ||
13321 | cursor->check_plane = i845_check_cursor; | 13333 | cursor->check_plane = i845_check_cursor; |
13322 | } else { | 13334 | } else { |
13323 | cursor->update_plane = i9xx_update_cursor; | 13335 | cursor->update_plane = i9xx_update_cursor; |
13324 | cursor->disable_plane = i9xx_disable_cursor; | 13336 | cursor->disable_plane = i9xx_disable_cursor; |
13337 | cursor->get_hw_state = i9xx_cursor_get_hw_state; | ||
13325 | cursor->check_plane = i9xx_check_cursor; | 13338 | cursor->check_plane = i9xx_check_cursor; |
13326 | } | 13339 | } |
13327 | 13340 | ||
@@ -14671,8 +14684,11 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
14671 | DRM_DEBUG_KMS("disabling pipe %c due to force quirk\n", | 14684 | DRM_DEBUG_KMS("disabling pipe %c due to force quirk\n", |
14672 | pipe_name(pipe)); | 14685 | pipe_name(pipe)); |
14673 | 14686 | ||
14674 | assert_plane_disabled(dev_priv, PLANE_A); | 14687 | WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE); |
14675 | assert_plane_disabled(dev_priv, PLANE_B); | 14688 | WARN_ON(I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE); |
14689 | WARN_ON(I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE); | ||
14690 | WARN_ON(I915_READ(CURCNTR(PIPE_A)) & CURSOR_MODE); | ||
14691 | WARN_ON(I915_READ(CURCNTR(PIPE_B)) & CURSOR_MODE); | ||
14676 | 14692 | ||
14677 | I915_WRITE(PIPECONF(pipe), 0); | 14693 | I915_WRITE(PIPECONF(pipe), 0); |
14678 | POSTING_READ(PIPECONF(pipe)); | 14694 | POSTING_READ(PIPECONF(pipe)); |
@@ -14683,22 +14699,36 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
14683 | POSTING_READ(DPLL(pipe)); | 14699 | POSTING_READ(DPLL(pipe)); |
14684 | } | 14700 | } |
14685 | 14701 | ||
14686 | static bool | 14702 | static bool intel_plane_mapping_ok(struct intel_crtc *crtc, |
14687 | intel_check_plane_mapping(struct intel_crtc *crtc) | 14703 | struct intel_plane *primary) |
14688 | { | 14704 | { |
14689 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); | 14705 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
14690 | u32 val; | 14706 | enum plane plane = primary->plane; |
14707 | u32 val = I915_READ(DSPCNTR(plane)); | ||
14691 | 14708 | ||
14692 | if (INTEL_INFO(dev_priv)->num_pipes == 1) | 14709 | return (val & DISPLAY_PLANE_ENABLE) == 0 || |
14693 | return true; | 14710 | (val & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE(crtc->pipe); |
14711 | } | ||
14694 | 14712 | ||
14695 | val = I915_READ(DSPCNTR(!crtc->plane)); | 14713 | static void |
14714 | intel_sanitize_plane_mapping(struct drm_i915_private *dev_priv) | ||
14715 | { | ||
14716 | struct intel_crtc *crtc; | ||
14696 | 14717 | ||
14697 | if ((val & DISPLAY_PLANE_ENABLE) && | 14718 | if (INTEL_GEN(dev_priv) >= 4) |
14698 | (!!(val & DISPPLANE_SEL_PIPE_MASK) == crtc->pipe)) | 14719 | return; |
14699 | return false; | ||
14700 | 14720 | ||
14701 | return true; | 14721 | for_each_intel_crtc(&dev_priv->drm, crtc) { |
14722 | struct intel_plane *plane = | ||
14723 | to_intel_plane(crtc->base.primary); | ||
14724 | |||
14725 | if (intel_plane_mapping_ok(crtc, plane)) | ||
14726 | continue; | ||
14727 | |||
14728 | DRM_DEBUG_KMS("%s attached to the wrong pipe, disabling plane\n", | ||
14729 | plane->base.name); | ||
14730 | intel_plane_disable_noatomic(crtc, plane); | ||
14731 | } | ||
14702 | } | 14732 | } |
14703 | 14733 | ||
14704 | static bool intel_crtc_has_encoders(struct intel_crtc *crtc) | 14734 | static bool intel_crtc_has_encoders(struct intel_crtc *crtc) |
@@ -14754,33 +14784,15 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc, | |||
14754 | 14784 | ||
14755 | /* Disable everything but the primary plane */ | 14785 | /* Disable everything but the primary plane */ |
14756 | for_each_intel_plane_on_crtc(dev, crtc, plane) { | 14786 | for_each_intel_plane_on_crtc(dev, crtc, plane) { |
14757 | if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) | 14787 | const struct intel_plane_state *plane_state = |
14758 | continue; | 14788 | to_intel_plane_state(plane->base.state); |
14759 | 14789 | ||
14760 | trace_intel_disable_plane(&plane->base, crtc); | 14790 | if (plane_state->base.visible && |
14761 | plane->disable_plane(plane, crtc); | 14791 | plane->base.type != DRM_PLANE_TYPE_PRIMARY) |
14792 | intel_plane_disable_noatomic(crtc, plane); | ||
14762 | } | 14793 | } |
14763 | } | 14794 | } |
14764 | 14795 | ||
14765 | /* We need to sanitize the plane -> pipe mapping first because this will | ||
14766 | * disable the crtc (and hence change the state) if it is wrong. Note | ||
14767 | * that gen4+ has a fixed plane -> pipe mapping. */ | ||
14768 | if (INTEL_GEN(dev_priv) < 4 && !intel_check_plane_mapping(crtc)) { | ||
14769 | bool plane; | ||
14770 | |||
14771 | DRM_DEBUG_KMS("[CRTC:%d:%s] wrong plane connection detected!\n", | ||
14772 | crtc->base.base.id, crtc->base.name); | ||
14773 | |||
14774 | /* Pipe has the wrong plane attached and the plane is active. | ||
14775 | * Temporarily change the plane mapping and disable everything | ||
14776 | * ... */ | ||
14777 | plane = crtc->plane; | ||
14778 | crtc->base.primary->state->visible = true; | ||
14779 | crtc->plane = !plane; | ||
14780 | intel_crtc_disable_noatomic(&crtc->base, ctx); | ||
14781 | crtc->plane = plane; | ||
14782 | } | ||
14783 | |||
14784 | /* Adjust the state of the output pipe according to whether we | 14796 | /* Adjust the state of the output pipe according to whether we |
14785 | * have active connectors/encoders. */ | 14797 | * have active connectors/encoders. */ |
14786 | if (crtc->active && !intel_crtc_has_encoders(crtc)) | 14798 | if (crtc->active && !intel_crtc_has_encoders(crtc)) |
@@ -14885,24 +14897,21 @@ void i915_redisable_vga(struct drm_i915_private *dev_priv) | |||
14885 | intel_display_power_put(dev_priv, POWER_DOMAIN_VGA); | 14897 | intel_display_power_put(dev_priv, POWER_DOMAIN_VGA); |
14886 | } | 14898 | } |
14887 | 14899 | ||
14888 | static bool primary_get_hw_state(struct intel_plane *plane) | ||
14889 | { | ||
14890 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
14891 | |||
14892 | return I915_READ(DSPCNTR(plane->plane)) & DISPLAY_PLANE_ENABLE; | ||
14893 | } | ||
14894 | |||
14895 | /* FIXME read out full plane state for all planes */ | 14900 | /* FIXME read out full plane state for all planes */ |
14896 | static void readout_plane_state(struct intel_crtc *crtc) | 14901 | static void readout_plane_state(struct intel_crtc *crtc) |
14897 | { | 14902 | { |
14898 | struct intel_plane *primary = to_intel_plane(crtc->base.primary); | 14903 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
14899 | bool visible; | 14904 | struct intel_crtc_state *crtc_state = |
14905 | to_intel_crtc_state(crtc->base.state); | ||
14906 | struct intel_plane *plane; | ||
14900 | 14907 | ||
14901 | visible = crtc->active && primary_get_hw_state(primary); | 14908 | for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { |
14909 | struct intel_plane_state *plane_state = | ||
14910 | to_intel_plane_state(plane->base.state); | ||
14911 | bool visible = plane->get_hw_state(plane); | ||
14902 | 14912 | ||
14903 | intel_set_plane_visible(to_intel_crtc_state(crtc->base.state), | 14913 | intel_set_plane_visible(crtc_state, plane_state, visible); |
14904 | to_intel_plane_state(primary->base.state), | 14914 | } |
14905 | visible); | ||
14906 | } | 14915 | } |
14907 | 14916 | ||
14908 | static void intel_modeset_readout_hw_state(struct drm_device *dev) | 14917 | static void intel_modeset_readout_hw_state(struct drm_device *dev) |
@@ -15100,6 +15109,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev, | |||
15100 | /* HW state is read out, now we need to sanitize this mess. */ | 15109 | /* HW state is read out, now we need to sanitize this mess. */ |
15101 | get_encoder_power_domains(dev_priv); | 15110 | get_encoder_power_domains(dev_priv); |
15102 | 15111 | ||
15112 | intel_sanitize_plane_mapping(dev_priv); | ||
15113 | |||
15103 | for_each_intel_encoder(dev, encoder) { | 15114 | for_each_intel_encoder(dev, encoder) { |
15104 | intel_sanitize_encoder(encoder); | 15115 | intel_sanitize_encoder(encoder); |
15105 | } | 15116 | } |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 6c7f8bca574e..5d77f75a9f9c 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -862,6 +862,7 @@ struct intel_plane { | |||
862 | const struct intel_plane_state *plane_state); | 862 | const struct intel_plane_state *plane_state); |
863 | void (*disable_plane)(struct intel_plane *plane, | 863 | void (*disable_plane)(struct intel_plane *plane, |
864 | struct intel_crtc *crtc); | 864 | struct intel_crtc *crtc); |
865 | bool (*get_hw_state)(struct intel_plane *plane); | ||
865 | int (*check_plane)(struct intel_plane *plane, | 866 | int (*check_plane)(struct intel_plane *plane, |
866 | struct intel_crtc_state *crtc_state, | 867 | struct intel_crtc_state *crtc_state, |
867 | struct intel_plane_state *state); | 868 | struct intel_plane_state *state); |
@@ -1924,6 +1925,7 @@ void skl_update_plane(struct intel_plane *plane, | |||
1924 | const struct intel_crtc_state *crtc_state, | 1925 | const struct intel_crtc_state *crtc_state, |
1925 | const struct intel_plane_state *plane_state); | 1926 | const struct intel_plane_state *plane_state); |
1926 | void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc); | 1927 | void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc); |
1928 | bool skl_plane_get_hw_state(struct intel_plane *plane); | ||
1927 | 1929 | ||
1928 | /* intel_tv.c */ | 1930 | /* intel_tv.c */ |
1929 | void intel_tv_init(struct drm_i915_private *dev_priv); | 1931 | void intel_tv_init(struct drm_i915_private *dev_priv); |
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 4fcf80ca91dd..4a8a5d918a83 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c | |||
@@ -329,6 +329,26 @@ skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) | |||
329 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 329 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
330 | } | 330 | } |
331 | 331 | ||
332 | bool | ||
333 | skl_plane_get_hw_state(struct intel_plane *plane) | ||
334 | { | ||
335 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
336 | enum intel_display_power_domain power_domain; | ||
337 | enum plane_id plane_id = plane->id; | ||
338 | enum pipe pipe = plane->pipe; | ||
339 | bool ret; | ||
340 | |||
341 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
342 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
343 | return false; | ||
344 | |||
345 | ret = I915_READ(PLANE_CTL(pipe, plane_id)) & PLANE_CTL_ENABLE; | ||
346 | |||
347 | intel_display_power_put(dev_priv, power_domain); | ||
348 | |||
349 | return ret; | ||
350 | } | ||
351 | |||
332 | static void | 352 | static void |
333 | chv_update_csc(struct intel_plane *plane, uint32_t format) | 353 | chv_update_csc(struct intel_plane *plane, uint32_t format) |
334 | { | 354 | { |
@@ -506,6 +526,26 @@ vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) | |||
506 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 526 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
507 | } | 527 | } |
508 | 528 | ||
529 | static bool | ||
530 | vlv_plane_get_hw_state(struct intel_plane *plane) | ||
531 | { | ||
532 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
533 | enum intel_display_power_domain power_domain; | ||
534 | enum plane_id plane_id = plane->id; | ||
535 | enum pipe pipe = plane->pipe; | ||
536 | bool ret; | ||
537 | |||
538 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
539 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
540 | return false; | ||
541 | |||
542 | ret = I915_READ(SPCNTR(pipe, plane_id)) & SP_ENABLE; | ||
543 | |||
544 | intel_display_power_put(dev_priv, power_domain); | ||
545 | |||
546 | return ret; | ||
547 | } | ||
548 | |||
509 | static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state, | 549 | static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state, |
510 | const struct intel_plane_state *plane_state) | 550 | const struct intel_plane_state *plane_state) |
511 | { | 551 | { |
@@ -646,6 +686,25 @@ ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) | |||
646 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 686 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
647 | } | 687 | } |
648 | 688 | ||
689 | static bool | ||
690 | ivb_plane_get_hw_state(struct intel_plane *plane) | ||
691 | { | ||
692 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
693 | enum intel_display_power_domain power_domain; | ||
694 | enum pipe pipe = plane->pipe; | ||
695 | bool ret; | ||
696 | |||
697 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
698 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
699 | return false; | ||
700 | |||
701 | ret = I915_READ(SPRCTL(pipe)) & SPRITE_ENABLE; | ||
702 | |||
703 | intel_display_power_put(dev_priv, power_domain); | ||
704 | |||
705 | return ret; | ||
706 | } | ||
707 | |||
649 | static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, | 708 | static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, |
650 | const struct intel_plane_state *plane_state) | 709 | const struct intel_plane_state *plane_state) |
651 | { | 710 | { |
@@ -777,6 +836,25 @@ g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) | |||
777 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 836 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
778 | } | 837 | } |
779 | 838 | ||
839 | static bool | ||
840 | g4x_plane_get_hw_state(struct intel_plane *plane) | ||
841 | { | ||
842 | struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
843 | enum intel_display_power_domain power_domain; | ||
844 | enum pipe pipe = plane->pipe; | ||
845 | bool ret; | ||
846 | |||
847 | power_domain = POWER_DOMAIN_PIPE(pipe); | ||
848 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | ||
849 | return false; | ||
850 | |||
851 | ret = I915_READ(DVSCNTR(pipe)) & DVS_ENABLE; | ||
852 | |||
853 | intel_display_power_put(dev_priv, power_domain); | ||
854 | |||
855 | return ret; | ||
856 | } | ||
857 | |||
780 | static int | 858 | static int |
781 | intel_check_sprite_plane(struct intel_plane *plane, | 859 | intel_check_sprite_plane(struct intel_plane *plane, |
782 | struct intel_crtc_state *crtc_state, | 860 | struct intel_crtc_state *crtc_state, |
@@ -1232,6 +1310,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, | |||
1232 | 1310 | ||
1233 | intel_plane->update_plane = skl_update_plane; | 1311 | intel_plane->update_plane = skl_update_plane; |
1234 | intel_plane->disable_plane = skl_disable_plane; | 1312 | intel_plane->disable_plane = skl_disable_plane; |
1313 | intel_plane->get_hw_state = skl_plane_get_hw_state; | ||
1235 | 1314 | ||
1236 | plane_formats = skl_plane_formats; | 1315 | plane_formats = skl_plane_formats; |
1237 | num_plane_formats = ARRAY_SIZE(skl_plane_formats); | 1316 | num_plane_formats = ARRAY_SIZE(skl_plane_formats); |
@@ -1242,6 +1321,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, | |||
1242 | 1321 | ||
1243 | intel_plane->update_plane = skl_update_plane; | 1322 | intel_plane->update_plane = skl_update_plane; |
1244 | intel_plane->disable_plane = skl_disable_plane; | 1323 | intel_plane->disable_plane = skl_disable_plane; |
1324 | intel_plane->get_hw_state = skl_plane_get_hw_state; | ||
1245 | 1325 | ||
1246 | plane_formats = skl_plane_formats; | 1326 | plane_formats = skl_plane_formats; |
1247 | num_plane_formats = ARRAY_SIZE(skl_plane_formats); | 1327 | num_plane_formats = ARRAY_SIZE(skl_plane_formats); |
@@ -1252,6 +1332,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, | |||
1252 | 1332 | ||
1253 | intel_plane->update_plane = vlv_update_plane; | 1333 | intel_plane->update_plane = vlv_update_plane; |
1254 | intel_plane->disable_plane = vlv_disable_plane; | 1334 | intel_plane->disable_plane = vlv_disable_plane; |
1335 | intel_plane->get_hw_state = vlv_plane_get_hw_state; | ||
1255 | 1336 | ||
1256 | plane_formats = vlv_plane_formats; | 1337 | plane_formats = vlv_plane_formats; |
1257 | num_plane_formats = ARRAY_SIZE(vlv_plane_formats); | 1338 | num_plane_formats = ARRAY_SIZE(vlv_plane_formats); |
@@ -1267,6 +1348,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, | |||
1267 | 1348 | ||
1268 | intel_plane->update_plane = ivb_update_plane; | 1349 | intel_plane->update_plane = ivb_update_plane; |
1269 | intel_plane->disable_plane = ivb_disable_plane; | 1350 | intel_plane->disable_plane = ivb_disable_plane; |
1351 | intel_plane->get_hw_state = ivb_plane_get_hw_state; | ||
1270 | 1352 | ||
1271 | plane_formats = snb_plane_formats; | 1353 | plane_formats = snb_plane_formats; |
1272 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); | 1354 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); |
@@ -1277,6 +1359,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, | |||
1277 | 1359 | ||
1278 | intel_plane->update_plane = g4x_update_plane; | 1360 | intel_plane->update_plane = g4x_update_plane; |
1279 | intel_plane->disable_plane = g4x_disable_plane; | 1361 | intel_plane->disable_plane = g4x_disable_plane; |
1362 | intel_plane->get_hw_state = g4x_plane_get_hw_state; | ||
1280 | 1363 | ||
1281 | modifiers = i9xx_plane_format_modifiers; | 1364 | modifiers = i9xx_plane_format_modifiers; |
1282 | if (IS_GEN6(dev_priv)) { | 1365 | if (IS_GEN6(dev_priv)) { |
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h index 0760b93e9d1f..baab93398e54 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h | |||
@@ -121,6 +121,7 @@ int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | |||
121 | int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 121 | int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
122 | int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 122 | int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
123 | int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 123 | int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
124 | int mcp77_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | ||
124 | int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 125 | int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
125 | int gk104_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 126 | int gk104_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
126 | int gk20a_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); | 127 | int gk20a_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 435ff8662cfa..ef687414969e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -1447,11 +1447,13 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) | |||
1447 | args.nv50.ro = 0; | 1447 | args.nv50.ro = 0; |
1448 | args.nv50.kind = mem->kind; | 1448 | args.nv50.kind = mem->kind; |
1449 | args.nv50.comp = mem->comp; | 1449 | args.nv50.comp = mem->comp; |
1450 | argc = sizeof(args.nv50); | ||
1450 | break; | 1451 | break; |
1451 | case NVIF_CLASS_MEM_GF100: | 1452 | case NVIF_CLASS_MEM_GF100: |
1452 | args.gf100.version = 0; | 1453 | args.gf100.version = 0; |
1453 | args.gf100.ro = 0; | 1454 | args.gf100.ro = 0; |
1454 | args.gf100.kind = mem->kind; | 1455 | args.gf100.kind = mem->kind; |
1456 | argc = sizeof(args.gf100); | ||
1455 | break; | 1457 | break; |
1456 | default: | 1458 | default: |
1457 | WARN_ON(1); | 1459 | WARN_ON(1); |
@@ -1459,7 +1461,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) | |||
1459 | } | 1461 | } |
1460 | 1462 | ||
1461 | ret = nvif_object_map_handle(&mem->mem.object, | 1463 | ret = nvif_object_map_handle(&mem->mem.object, |
1462 | &argc, argc, | 1464 | &args, argc, |
1463 | &handle, &length); | 1465 | &handle, &length); |
1464 | if (ret != 1) | 1466 | if (ret != 1) |
1465 | return ret ? ret : -EINVAL; | 1467 | return ret ? ret : -EINVAL; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 00eeaaffeae5..08e77cd55e6e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | |||
@@ -1251,7 +1251,7 @@ nvaa_chipset = { | |||
1251 | .i2c = g94_i2c_new, | 1251 | .i2c = g94_i2c_new, |
1252 | .imem = nv50_instmem_new, | 1252 | .imem = nv50_instmem_new, |
1253 | .mc = g98_mc_new, | 1253 | .mc = g98_mc_new, |
1254 | .mmu = g84_mmu_new, | 1254 | .mmu = mcp77_mmu_new, |
1255 | .mxm = nv50_mxm_new, | 1255 | .mxm = nv50_mxm_new, |
1256 | .pci = g94_pci_new, | 1256 | .pci = g94_pci_new, |
1257 | .therm = g84_therm_new, | 1257 | .therm = g84_therm_new, |
@@ -1283,7 +1283,7 @@ nvac_chipset = { | |||
1283 | .i2c = g94_i2c_new, | 1283 | .i2c = g94_i2c_new, |
1284 | .imem = nv50_instmem_new, | 1284 | .imem = nv50_instmem_new, |
1285 | .mc = g98_mc_new, | 1285 | .mc = g98_mc_new, |
1286 | .mmu = g84_mmu_new, | 1286 | .mmu = mcp77_mmu_new, |
1287 | .mxm = nv50_mxm_new, | 1287 | .mxm = nv50_mxm_new, |
1288 | .pci = g94_pci_new, | 1288 | .pci = g94_pci_new, |
1289 | .therm = g84_therm_new, | 1289 | .therm = g84_therm_new, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c index 9646adec57cb..243f0a5c8a62 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c | |||
@@ -73,7 +73,8 @@ static int | |||
73 | nvkm_bar_fini(struct nvkm_subdev *subdev, bool suspend) | 73 | nvkm_bar_fini(struct nvkm_subdev *subdev, bool suspend) |
74 | { | 74 | { |
75 | struct nvkm_bar *bar = nvkm_bar(subdev); | 75 | struct nvkm_bar *bar = nvkm_bar(subdev); |
76 | bar->func->bar1.fini(bar); | 76 | if (bar->func->bar1.fini) |
77 | bar->func->bar1.fini(bar); | ||
77 | return 0; | 78 | return 0; |
78 | } | 79 | } |
79 | 80 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c index b10077d38839..35878fb538f2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c | |||
@@ -26,7 +26,6 @@ gk20a_bar_func = { | |||
26 | .dtor = gf100_bar_dtor, | 26 | .dtor = gf100_bar_dtor, |
27 | .oneinit = gf100_bar_oneinit, | 27 | .oneinit = gf100_bar_oneinit, |
28 | .bar1.init = gf100_bar_bar1_init, | 28 | .bar1.init = gf100_bar_bar1_init, |
29 | .bar1.fini = gf100_bar_bar1_fini, | ||
30 | .bar1.wait = gf100_bar_bar1_wait, | 29 | .bar1.wait = gf100_bar_bar1_wait, |
31 | .bar1.vmm = gf100_bar_bar1_vmm, | 30 | .bar1.vmm = gf100_bar_bar1_vmm, |
32 | .flush = g84_bar_flush, | 31 | .flush = g84_bar_flush, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild index 352a65f9371c..67ee983bb026 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild | |||
@@ -4,6 +4,7 @@ nvkm-y += nvkm/subdev/mmu/nv41.o | |||
4 | nvkm-y += nvkm/subdev/mmu/nv44.o | 4 | nvkm-y += nvkm/subdev/mmu/nv44.o |
5 | nvkm-y += nvkm/subdev/mmu/nv50.o | 5 | nvkm-y += nvkm/subdev/mmu/nv50.o |
6 | nvkm-y += nvkm/subdev/mmu/g84.o | 6 | nvkm-y += nvkm/subdev/mmu/g84.o |
7 | nvkm-y += nvkm/subdev/mmu/mcp77.o | ||
7 | nvkm-y += nvkm/subdev/mmu/gf100.o | 8 | nvkm-y += nvkm/subdev/mmu/gf100.o |
8 | nvkm-y += nvkm/subdev/mmu/gk104.o | 9 | nvkm-y += nvkm/subdev/mmu/gk104.o |
9 | nvkm-y += nvkm/subdev/mmu/gk20a.o | 10 | nvkm-y += nvkm/subdev/mmu/gk20a.o |
@@ -22,6 +23,7 @@ nvkm-y += nvkm/subdev/mmu/vmmnv04.o | |||
22 | nvkm-y += nvkm/subdev/mmu/vmmnv41.o | 23 | nvkm-y += nvkm/subdev/mmu/vmmnv41.o |
23 | nvkm-y += nvkm/subdev/mmu/vmmnv44.o | 24 | nvkm-y += nvkm/subdev/mmu/vmmnv44.o |
24 | nvkm-y += nvkm/subdev/mmu/vmmnv50.o | 25 | nvkm-y += nvkm/subdev/mmu/vmmnv50.o |
26 | nvkm-y += nvkm/subdev/mmu/vmmmcp77.o | ||
25 | nvkm-y += nvkm/subdev/mmu/vmmgf100.o | 27 | nvkm-y += nvkm/subdev/mmu/vmmgf100.o |
26 | nvkm-y += nvkm/subdev/mmu/vmmgk104.o | 28 | nvkm-y += nvkm/subdev/mmu/vmmgk104.o |
27 | nvkm-y += nvkm/subdev/mmu/vmmgk20a.o | 29 | nvkm-y += nvkm/subdev/mmu/vmmgk20a.o |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.c new file mode 100644 index 000000000000..0527b50730d9 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.c | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * Copyright 2017 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | #include "mem.h" | ||
23 | #include "vmm.h" | ||
24 | |||
25 | #include <nvif/class.h> | ||
26 | |||
27 | static const struct nvkm_mmu_func | ||
28 | mcp77_mmu = { | ||
29 | .dma_bits = 40, | ||
30 | .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV50}}, | ||
31 | .mem = {{ -1, 0, NVIF_CLASS_MEM_NV50}, nv50_mem_new, nv50_mem_map }, | ||
32 | .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, mcp77_vmm_new, false, 0x0200 }, | ||
33 | .kind = nv50_mmu_kind, | ||
34 | .kind_sys = true, | ||
35 | }; | ||
36 | |||
37 | int | ||
38 | mcp77_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu) | ||
39 | { | ||
40 | return nvkm_mmu_new_(&mcp77_mmu, device, index, pmmu); | ||
41 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h index 6d8f61ea467a..da06e64d8a7d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | |||
@@ -95,6 +95,9 @@ struct nvkm_vmm_desc { | |||
95 | const struct nvkm_vmm_desc_func *func; | 95 | const struct nvkm_vmm_desc_func *func; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | extern const struct nvkm_vmm_desc nv50_vmm_desc_12[]; | ||
99 | extern const struct nvkm_vmm_desc nv50_vmm_desc_16[]; | ||
100 | |||
98 | extern const struct nvkm_vmm_desc gk104_vmm_desc_16_12[]; | 101 | extern const struct nvkm_vmm_desc gk104_vmm_desc_16_12[]; |
99 | extern const struct nvkm_vmm_desc gk104_vmm_desc_16_16[]; | 102 | extern const struct nvkm_vmm_desc gk104_vmm_desc_16_16[]; |
100 | extern const struct nvkm_vmm_desc gk104_vmm_desc_17_12[]; | 103 | extern const struct nvkm_vmm_desc gk104_vmm_desc_17_12[]; |
@@ -169,6 +172,11 @@ int nv04_vmm_new_(const struct nvkm_vmm_func *, struct nvkm_mmu *, u32, | |||
169 | const char *, struct nvkm_vmm **); | 172 | const char *, struct nvkm_vmm **); |
170 | int nv04_vmm_valid(struct nvkm_vmm *, void *, u32, struct nvkm_vmm_map *); | 173 | int nv04_vmm_valid(struct nvkm_vmm *, void *, u32, struct nvkm_vmm_map *); |
171 | 174 | ||
175 | int nv50_vmm_join(struct nvkm_vmm *, struct nvkm_memory *); | ||
176 | void nv50_vmm_part(struct nvkm_vmm *, struct nvkm_memory *); | ||
177 | int nv50_vmm_valid(struct nvkm_vmm *, void *, u32, struct nvkm_vmm_map *); | ||
178 | void nv50_vmm_flush(struct nvkm_vmm *, int); | ||
179 | |||
172 | int gf100_vmm_new_(const struct nvkm_vmm_func *, const struct nvkm_vmm_func *, | 180 | int gf100_vmm_new_(const struct nvkm_vmm_func *, const struct nvkm_vmm_func *, |
173 | struct nvkm_mmu *, u64, u64, void *, u32, | 181 | struct nvkm_mmu *, u64, u64, void *, u32, |
174 | struct lock_class_key *, const char *, struct nvkm_vmm **); | 182 | struct lock_class_key *, const char *, struct nvkm_vmm **); |
@@ -200,6 +208,8 @@ int nv44_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, | |||
200 | struct lock_class_key *, const char *, struct nvkm_vmm **); | 208 | struct lock_class_key *, const char *, struct nvkm_vmm **); |
201 | int nv50_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, | 209 | int nv50_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, |
202 | struct lock_class_key *, const char *, struct nvkm_vmm **); | 210 | struct lock_class_key *, const char *, struct nvkm_vmm **); |
211 | int mcp77_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, | ||
212 | struct lock_class_key *, const char *, struct nvkm_vmm **); | ||
203 | int g84_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, | 213 | int g84_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, |
204 | struct lock_class_key *, const char *, struct nvkm_vmm **); | 214 | struct lock_class_key *, const char *, struct nvkm_vmm **); |
205 | int gf100_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, | 215 | int gf100_vmm_new(struct nvkm_mmu *, u64, u64, void *, u32, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.c new file mode 100644 index 000000000000..e63d984cbfd4 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Copyright 2017 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | #include "vmm.h" | ||
23 | |||
24 | static const struct nvkm_vmm_func | ||
25 | mcp77_vmm = { | ||
26 | .join = nv50_vmm_join, | ||
27 | .part = nv50_vmm_part, | ||
28 | .valid = nv50_vmm_valid, | ||
29 | .flush = nv50_vmm_flush, | ||
30 | .page_block = 1 << 29, | ||
31 | .page = { | ||
32 | { 16, &nv50_vmm_desc_16[0], NVKM_VMM_PAGE_xVxx }, | ||
33 | { 12, &nv50_vmm_desc_12[0], NVKM_VMM_PAGE_xVHx }, | ||
34 | {} | ||
35 | } | ||
36 | }; | ||
37 | |||
38 | int | ||
39 | mcp77_vmm_new(struct nvkm_mmu *mmu, u64 addr, u64 size, void *argv, u32 argc, | ||
40 | struct lock_class_key *key, const char *name, | ||
41 | struct nvkm_vmm **pvmm) | ||
42 | { | ||
43 | return nv04_vmm_new_(&mcp77_vmm, mmu, 0, addr, size, | ||
44 | argv, argc, key, name, pvmm); | ||
45 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c index 863a2edd9861..64f75d906202 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c | |||
@@ -32,7 +32,7 @@ static inline void | |||
32 | nv50_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, | 32 | nv50_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, |
33 | u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr) | 33 | u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr) |
34 | { | 34 | { |
35 | u64 next = addr | map->type, data; | 35 | u64 next = addr + map->type, data; |
36 | u32 pten; | 36 | u32 pten; |
37 | int log2blk; | 37 | int log2blk; |
38 | 38 | ||
@@ -69,7 +69,7 @@ nv50_vmm_pgt_dma(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, | |||
69 | VMM_SPAM(vmm, "DMAA %08x %08x PTE(s)", ptei, ptes); | 69 | VMM_SPAM(vmm, "DMAA %08x %08x PTE(s)", ptei, ptes); |
70 | nvkm_kmap(pt->memory); | 70 | nvkm_kmap(pt->memory); |
71 | while (ptes--) { | 71 | while (ptes--) { |
72 | const u64 data = *map->dma++ | map->type; | 72 | const u64 data = *map->dma++ + map->type; |
73 | VMM_WO064(pt, vmm, ptei++ * 8, data); | 73 | VMM_WO064(pt, vmm, ptei++ * 8, data); |
74 | map->type += map->ctag; | 74 | map->type += map->ctag; |
75 | } | 75 | } |
@@ -163,21 +163,21 @@ nv50_vmm_pgd = { | |||
163 | .pde = nv50_vmm_pgd_pde, | 163 | .pde = nv50_vmm_pgd_pde, |
164 | }; | 164 | }; |
165 | 165 | ||
166 | static const struct nvkm_vmm_desc | 166 | const struct nvkm_vmm_desc |
167 | nv50_vmm_desc_12[] = { | 167 | nv50_vmm_desc_12[] = { |
168 | { PGT, 17, 8, 0x1000, &nv50_vmm_pgt }, | 168 | { PGT, 17, 8, 0x1000, &nv50_vmm_pgt }, |
169 | { PGD, 11, 0, 0x0000, &nv50_vmm_pgd }, | 169 | { PGD, 11, 0, 0x0000, &nv50_vmm_pgd }, |
170 | {} | 170 | {} |
171 | }; | 171 | }; |
172 | 172 | ||
173 | static const struct nvkm_vmm_desc | 173 | const struct nvkm_vmm_desc |
174 | nv50_vmm_desc_16[] = { | 174 | nv50_vmm_desc_16[] = { |
175 | { PGT, 13, 8, 0x1000, &nv50_vmm_pgt }, | 175 | { PGT, 13, 8, 0x1000, &nv50_vmm_pgt }, |
176 | { PGD, 11, 0, 0x0000, &nv50_vmm_pgd }, | 176 | { PGD, 11, 0, 0x0000, &nv50_vmm_pgd }, |
177 | {} | 177 | {} |
178 | }; | 178 | }; |
179 | 179 | ||
180 | static void | 180 | void |
181 | nv50_vmm_flush(struct nvkm_vmm *vmm, int level) | 181 | nv50_vmm_flush(struct nvkm_vmm *vmm, int level) |
182 | { | 182 | { |
183 | struct nvkm_subdev *subdev = &vmm->mmu->subdev; | 183 | struct nvkm_subdev *subdev = &vmm->mmu->subdev; |
@@ -223,7 +223,7 @@ nv50_vmm_flush(struct nvkm_vmm *vmm, int level) | |||
223 | mutex_unlock(&subdev->mutex); | 223 | mutex_unlock(&subdev->mutex); |
224 | } | 224 | } |
225 | 225 | ||
226 | static int | 226 | int |
227 | nv50_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, | 227 | nv50_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, |
228 | struct nvkm_vmm_map *map) | 228 | struct nvkm_vmm_map *map) |
229 | { | 229 | { |
@@ -321,7 +321,7 @@ nv50_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, | |||
321 | return 0; | 321 | return 0; |
322 | } | 322 | } |
323 | 323 | ||
324 | static void | 324 | void |
325 | nv50_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst) | 325 | nv50_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst) |
326 | { | 326 | { |
327 | struct nvkm_vmm_join *join; | 327 | struct nvkm_vmm_join *join; |
@@ -335,7 +335,7 @@ nv50_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst) | |||
335 | } | 335 | } |
336 | } | 336 | } |
337 | 337 | ||
338 | static int | 338 | int |
339 | nv50_vmm_join(struct nvkm_vmm *vmm, struct nvkm_memory *inst) | 339 | nv50_vmm_join(struct nvkm_vmm *vmm, struct nvkm_memory *inst) |
340 | { | 340 | { |
341 | const u32 pd_offset = vmm->mmu->func->vmm.pd_offset; | 341 | const u32 pd_offset = vmm->mmu->func->vmm.pd_offset; |
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c index dc332ea56f6c..3ecffa52c814 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | |||
@@ -102,10 +102,13 @@ static int sun4i_tmds_determine_rate(struct clk_hw *hw, | |||
102 | goto out; | 102 | goto out; |
103 | } | 103 | } |
104 | 104 | ||
105 | if (abs(rate - rounded / i) < | 105 | if (!best_parent || |
106 | abs(rate - best_parent / best_div)) { | 106 | abs(rate - rounded / i / j) < |
107 | abs(rate - best_parent / best_half / | ||
108 | best_div)) { | ||
107 | best_parent = rounded; | 109 | best_parent = rounded; |
108 | best_div = i; | 110 | best_half = i; |
111 | best_div = j; | ||
109 | } | 112 | } |
110 | } | 113 | } |
111 | } | 114 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 641294aef165..fcd58145d0da 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | |||
@@ -1863,7 +1863,7 @@ u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe) | |||
1863 | */ | 1863 | */ |
1864 | int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe) | 1864 | int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe) |
1865 | { | 1865 | { |
1866 | return -ENOSYS; | 1866 | return -EINVAL; |
1867 | } | 1867 | } |
1868 | 1868 | ||
1869 | /** | 1869 | /** |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c index b8a09807c5de..3824595fece1 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | |||
@@ -266,8 +266,8 @@ static const struct drm_connector_funcs vmw_legacy_connector_funcs = { | |||
266 | .set_property = vmw_du_connector_set_property, | 266 | .set_property = vmw_du_connector_set_property, |
267 | .destroy = vmw_ldu_connector_destroy, | 267 | .destroy = vmw_ldu_connector_destroy, |
268 | .reset = vmw_du_connector_reset, | 268 | .reset = vmw_du_connector_reset, |
269 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, | 269 | .atomic_duplicate_state = vmw_du_connector_duplicate_state, |
270 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | 270 | .atomic_destroy_state = vmw_du_connector_destroy_state, |
271 | .atomic_set_property = vmw_du_connector_atomic_set_property, | 271 | .atomic_set_property = vmw_du_connector_atomic_set_property, |
272 | .atomic_get_property = vmw_du_connector_atomic_get_property, | 272 | .atomic_get_property = vmw_du_connector_atomic_get_property, |
273 | }; | 273 | }; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c index bc5f6026573d..63a4cd794b73 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | |||
@@ -420,8 +420,8 @@ static const struct drm_connector_funcs vmw_sou_connector_funcs = { | |||
420 | .set_property = vmw_du_connector_set_property, | 420 | .set_property = vmw_du_connector_set_property, |
421 | .destroy = vmw_sou_connector_destroy, | 421 | .destroy = vmw_sou_connector_destroy, |
422 | .reset = vmw_du_connector_reset, | 422 | .reset = vmw_du_connector_reset, |
423 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, | 423 | .atomic_duplicate_state = vmw_du_connector_duplicate_state, |
424 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | 424 | .atomic_destroy_state = vmw_du_connector_destroy_state, |
425 | .atomic_set_property = vmw_du_connector_atomic_set_property, | 425 | .atomic_set_property = vmw_du_connector_atomic_set_property, |
426 | .atomic_get_property = vmw_du_connector_atomic_get_property, | 426 | .atomic_get_property = vmw_du_connector_atomic_get_property, |
427 | }; | 427 | }; |
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 706164b4c5be..f7829a74140c 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c | |||
@@ -821,8 +821,12 @@ void i2c_unregister_device(struct i2c_client *client) | |||
821 | { | 821 | { |
822 | if (!client) | 822 | if (!client) |
823 | return; | 823 | return; |
824 | if (client->dev.of_node) | 824 | |
825 | if (client->dev.of_node) { | ||
825 | of_node_clear_flag(client->dev.of_node, OF_POPULATED); | 826 | of_node_clear_flag(client->dev.of_node, OF_POPULATED); |
827 | of_node_put(client->dev.of_node); | ||
828 | } | ||
829 | |||
826 | if (ACPI_COMPANION(&client->dev)) | 830 | if (ACPI_COMPANION(&client->dev)) |
827 | acpi_device_clear_enumerated(ACPI_COMPANION(&client->dev)); | 831 | acpi_device_clear_enumerated(ACPI_COMPANION(&client->dev)); |
828 | device_unregister(&client->dev); | 832 | device_unregister(&client->dev); |
diff --git a/drivers/i2c/i2c-core-smbus.c b/drivers/i2c/i2c-core-smbus.c index 4bb9927afd01..a1082c04ac5c 100644 --- a/drivers/i2c/i2c-core-smbus.c +++ b/drivers/i2c/i2c-core-smbus.c | |||
@@ -397,16 +397,17 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, | |||
397 | the underlying bus driver */ | 397 | the underlying bus driver */ |
398 | break; | 398 | break; |
399 | case I2C_SMBUS_I2C_BLOCK_DATA: | 399 | case I2C_SMBUS_I2C_BLOCK_DATA: |
400 | if (data->block[0] > I2C_SMBUS_BLOCK_MAX) { | ||
401 | dev_err(&adapter->dev, "Invalid block %s size %d\n", | ||
402 | read_write == I2C_SMBUS_READ ? "read" : "write", | ||
403 | data->block[0]); | ||
404 | return -EINVAL; | ||
405 | } | ||
406 | |||
400 | if (read_write == I2C_SMBUS_READ) { | 407 | if (read_write == I2C_SMBUS_READ) { |
401 | msg[1].len = data->block[0]; | 408 | msg[1].len = data->block[0]; |
402 | } else { | 409 | } else { |
403 | msg[0].len = data->block[0] + 1; | 410 | msg[0].len = data->block[0] + 1; |
404 | if (msg[0].len > I2C_SMBUS_BLOCK_MAX + 1) { | ||
405 | dev_err(&adapter->dev, | ||
406 | "Invalid block write size %d\n", | ||
407 | data->block[0]); | ||
408 | return -EINVAL; | ||
409 | } | ||
410 | for (i = 1; i <= data->block[0]; i++) | 411 | for (i = 1; i <= data->block[0]; i++) |
411 | msgbuf0[i] = data->block[i]; | 412 | msgbuf0[i] = data->block[i]; |
412 | } | 413 | } |
diff --git a/drivers/input/misc/twl4030-vibra.c b/drivers/input/misc/twl4030-vibra.c index 6c51d404874b..c37aea9ac272 100644 --- a/drivers/input/misc/twl4030-vibra.c +++ b/drivers/input/misc/twl4030-vibra.c | |||
@@ -178,12 +178,14 @@ static SIMPLE_DEV_PM_OPS(twl4030_vibra_pm_ops, | |||
178 | twl4030_vibra_suspend, twl4030_vibra_resume); | 178 | twl4030_vibra_suspend, twl4030_vibra_resume); |
179 | 179 | ||
180 | static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, | 180 | static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, |
181 | struct device_node *node) | 181 | struct device_node *parent) |
182 | { | 182 | { |
183 | struct device_node *node; | ||
184 | |||
183 | if (pdata && pdata->coexist) | 185 | if (pdata && pdata->coexist) |
184 | return true; | 186 | return true; |
185 | 187 | ||
186 | node = of_find_node_by_name(node, "codec"); | 188 | node = of_get_child_by_name(parent, "codec"); |
187 | if (node) { | 189 | if (node) { |
188 | of_node_put(node); | 190 | of_node_put(node); |
189 | return true; | 191 | return true; |
diff --git a/drivers/input/misc/twl6040-vibra.c b/drivers/input/misc/twl6040-vibra.c index 5690eb7ff954..15e0d352c4cc 100644 --- a/drivers/input/misc/twl6040-vibra.c +++ b/drivers/input/misc/twl6040-vibra.c | |||
@@ -248,8 +248,7 @@ static int twl6040_vibra_probe(struct platform_device *pdev) | |||
248 | int vddvibr_uV = 0; | 248 | int vddvibr_uV = 0; |
249 | int error; | 249 | int error; |
250 | 250 | ||
251 | of_node_get(twl6040_core_dev->of_node); | 251 | twl6040_core_node = of_get_child_by_name(twl6040_core_dev->of_node, |
252 | twl6040_core_node = of_find_node_by_name(twl6040_core_dev->of_node, | ||
253 | "vibra"); | 252 | "vibra"); |
254 | if (!twl6040_core_node) { | 253 | if (!twl6040_core_node) { |
255 | dev_err(&pdev->dev, "parent of node is missing?\n"); | 254 | dev_err(&pdev->dev, "parent of node is missing?\n"); |
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c index 579b899add26..dbe57da8c1a1 100644 --- a/drivers/input/mouse/alps.c +++ b/drivers/input/mouse/alps.c | |||
@@ -1250,29 +1250,32 @@ static int alps_decode_ss4_v2(struct alps_fields *f, | |||
1250 | case SS4_PACKET_ID_MULTI: | 1250 | case SS4_PACKET_ID_MULTI: |
1251 | if (priv->flags & ALPS_BUTTONPAD) { | 1251 | if (priv->flags & ALPS_BUTTONPAD) { |
1252 | if (IS_SS4PLUS_DEV(priv->dev_id)) { | 1252 | if (IS_SS4PLUS_DEV(priv->dev_id)) { |
1253 | f->mt[0].x = SS4_PLUS_BTL_MF_X_V2(p, 0); | 1253 | f->mt[2].x = SS4_PLUS_BTL_MF_X_V2(p, 0); |
1254 | f->mt[1].x = SS4_PLUS_BTL_MF_X_V2(p, 1); | 1254 | f->mt[3].x = SS4_PLUS_BTL_MF_X_V2(p, 1); |
1255 | no_data_x = SS4_PLUS_MFPACKET_NO_AX_BL; | ||
1255 | } else { | 1256 | } else { |
1256 | f->mt[2].x = SS4_BTL_MF_X_V2(p, 0); | 1257 | f->mt[2].x = SS4_BTL_MF_X_V2(p, 0); |
1257 | f->mt[3].x = SS4_BTL_MF_X_V2(p, 1); | 1258 | f->mt[3].x = SS4_BTL_MF_X_V2(p, 1); |
1259 | no_data_x = SS4_MFPACKET_NO_AX_BL; | ||
1258 | } | 1260 | } |
1261 | no_data_y = SS4_MFPACKET_NO_AY_BL; | ||
1259 | 1262 | ||
1260 | f->mt[2].y = SS4_BTL_MF_Y_V2(p, 0); | 1263 | f->mt[2].y = SS4_BTL_MF_Y_V2(p, 0); |
1261 | f->mt[3].y = SS4_BTL_MF_Y_V2(p, 1); | 1264 | f->mt[3].y = SS4_BTL_MF_Y_V2(p, 1); |
1262 | no_data_x = SS4_MFPACKET_NO_AX_BL; | ||
1263 | no_data_y = SS4_MFPACKET_NO_AY_BL; | ||
1264 | } else { | 1265 | } else { |
1265 | if (IS_SS4PLUS_DEV(priv->dev_id)) { | 1266 | if (IS_SS4PLUS_DEV(priv->dev_id)) { |
1266 | f->mt[0].x = SS4_PLUS_STD_MF_X_V2(p, 0); | 1267 | f->mt[2].x = SS4_PLUS_STD_MF_X_V2(p, 0); |
1267 | f->mt[1].x = SS4_PLUS_STD_MF_X_V2(p, 1); | 1268 | f->mt[3].x = SS4_PLUS_STD_MF_X_V2(p, 1); |
1269 | no_data_x = SS4_PLUS_MFPACKET_NO_AX; | ||
1268 | } else { | 1270 | } else { |
1269 | f->mt[0].x = SS4_STD_MF_X_V2(p, 0); | 1271 | f->mt[2].x = SS4_STD_MF_X_V2(p, 0); |
1270 | f->mt[1].x = SS4_STD_MF_X_V2(p, 1); | 1272 | f->mt[3].x = SS4_STD_MF_X_V2(p, 1); |
1273 | no_data_x = SS4_MFPACKET_NO_AX; | ||
1271 | } | 1274 | } |
1275 | no_data_y = SS4_MFPACKET_NO_AY; | ||
1276 | |||
1272 | f->mt[2].y = SS4_STD_MF_Y_V2(p, 0); | 1277 | f->mt[2].y = SS4_STD_MF_Y_V2(p, 0); |
1273 | f->mt[3].y = SS4_STD_MF_Y_V2(p, 1); | 1278 | f->mt[3].y = SS4_STD_MF_Y_V2(p, 1); |
1274 | no_data_x = SS4_MFPACKET_NO_AX; | ||
1275 | no_data_y = SS4_MFPACKET_NO_AY; | ||
1276 | } | 1279 | } |
1277 | 1280 | ||
1278 | f->first_mp = 0; | 1281 | f->first_mp = 0; |
diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h index c80a7c76cb76..79b6d69d1486 100644 --- a/drivers/input/mouse/alps.h +++ b/drivers/input/mouse/alps.h | |||
@@ -141,10 +141,12 @@ enum SS4_PACKET_ID { | |||
141 | #define SS4_TS_Z_V2(_b) (s8)(_b[4] & 0x7F) | 141 | #define SS4_TS_Z_V2(_b) (s8)(_b[4] & 0x7F) |
142 | 142 | ||
143 | 143 | ||
144 | #define SS4_MFPACKET_NO_AX 8160 /* X-Coordinate value */ | 144 | #define SS4_MFPACKET_NO_AX 8160 /* X-Coordinate value */ |
145 | #define SS4_MFPACKET_NO_AY 4080 /* Y-Coordinate value */ | 145 | #define SS4_MFPACKET_NO_AY 4080 /* Y-Coordinate value */ |
146 | #define SS4_MFPACKET_NO_AX_BL 8176 /* Buttonless X-Coordinate value */ | 146 | #define SS4_MFPACKET_NO_AX_BL 8176 /* Buttonless X-Coord value */ |
147 | #define SS4_MFPACKET_NO_AY_BL 4088 /* Buttonless Y-Coordinate value */ | 147 | #define SS4_MFPACKET_NO_AY_BL 4088 /* Buttonless Y-Coord value */ |
148 | #define SS4_PLUS_MFPACKET_NO_AX 4080 /* SS4 PLUS, X */ | ||
149 | #define SS4_PLUS_MFPACKET_NO_AX_BL 4088 /* Buttonless SS4 PLUS, X */ | ||
148 | 150 | ||
149 | /* | 151 | /* |
150 | * enum V7_PACKET_ID - defines the packet type for V7 | 152 | * enum V7_PACKET_ID - defines the packet type for V7 |
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c index ee5466a374bf..cd9f61cb3fc6 100644 --- a/drivers/input/mouse/synaptics.c +++ b/drivers/input/mouse/synaptics.c | |||
@@ -173,6 +173,7 @@ static const char * const smbus_pnp_ids[] = { | |||
173 | "LEN0046", /* X250 */ | 173 | "LEN0046", /* X250 */ |
174 | "LEN004a", /* W541 */ | 174 | "LEN004a", /* W541 */ |
175 | "LEN200f", /* T450s */ | 175 | "LEN200f", /* T450s */ |
176 | "LEN2018", /* T460p */ | ||
176 | NULL | 177 | NULL |
177 | }; | 178 | }; |
178 | 179 | ||
diff --git a/drivers/input/rmi4/rmi_driver.c b/drivers/input/rmi4/rmi_driver.c index 4f2bb5947a4e..141ea228aac6 100644 --- a/drivers/input/rmi4/rmi_driver.c +++ b/drivers/input/rmi4/rmi_driver.c | |||
@@ -230,8 +230,10 @@ static irqreturn_t rmi_irq_fn(int irq, void *dev_id) | |||
230 | rmi_dbg(RMI_DEBUG_CORE, &rmi_dev->dev, | 230 | rmi_dbg(RMI_DEBUG_CORE, &rmi_dev->dev, |
231 | "Failed to process interrupt request: %d\n", ret); | 231 | "Failed to process interrupt request: %d\n", ret); |
232 | 232 | ||
233 | if (count) | 233 | if (count) { |
234 | kfree(attn_data.data); | 234 | kfree(attn_data.data); |
235 | attn_data.data = NULL; | ||
236 | } | ||
235 | 237 | ||
236 | if (!kfifo_is_empty(&drvdata->attn_fifo)) | 238 | if (!kfifo_is_empty(&drvdata->attn_fifo)) |
237 | return rmi_irq_fn(irq, dev_id); | 239 | return rmi_irq_fn(irq, dev_id); |
diff --git a/drivers/input/touchscreen/88pm860x-ts.c b/drivers/input/touchscreen/88pm860x-ts.c index 7ed828a51f4c..3486d9403805 100644 --- a/drivers/input/touchscreen/88pm860x-ts.c +++ b/drivers/input/touchscreen/88pm860x-ts.c | |||
@@ -126,7 +126,7 @@ static int pm860x_touch_dt_init(struct platform_device *pdev, | |||
126 | int data, n, ret; | 126 | int data, n, ret; |
127 | if (!np) | 127 | if (!np) |
128 | return -ENODEV; | 128 | return -ENODEV; |
129 | np = of_find_node_by_name(np, "touch"); | 129 | np = of_get_child_by_name(np, "touch"); |
130 | if (!np) { | 130 | if (!np) { |
131 | dev_err(&pdev->dev, "Can't find touch node\n"); | 131 | dev_err(&pdev->dev, "Can't find touch node\n"); |
132 | return -EINVAL; | 132 | return -EINVAL; |
@@ -144,13 +144,13 @@ static int pm860x_touch_dt_init(struct platform_device *pdev, | |||
144 | if (data) { | 144 | if (data) { |
145 | ret = pm860x_reg_write(i2c, PM8607_GPADC_MISC1, data); | 145 | ret = pm860x_reg_write(i2c, PM8607_GPADC_MISC1, data); |
146 | if (ret < 0) | 146 | if (ret < 0) |
147 | return -EINVAL; | 147 | goto err_put_node; |
148 | } | 148 | } |
149 | /* set tsi prebias time */ | 149 | /* set tsi prebias time */ |
150 | if (!of_property_read_u32(np, "marvell,88pm860x-tsi-prebias", &data)) { | 150 | if (!of_property_read_u32(np, "marvell,88pm860x-tsi-prebias", &data)) { |
151 | ret = pm860x_reg_write(i2c, PM8607_TSI_PREBIAS, data); | 151 | ret = pm860x_reg_write(i2c, PM8607_TSI_PREBIAS, data); |
152 | if (ret < 0) | 152 | if (ret < 0) |
153 | return -EINVAL; | 153 | goto err_put_node; |
154 | } | 154 | } |
155 | /* set prebias & prechg time of pen detect */ | 155 | /* set prebias & prechg time of pen detect */ |
156 | data = 0; | 156 | data = 0; |
@@ -161,10 +161,18 @@ static int pm860x_touch_dt_init(struct platform_device *pdev, | |||
161 | if (data) { | 161 | if (data) { |
162 | ret = pm860x_reg_write(i2c, PM8607_PD_PREBIAS, data); | 162 | ret = pm860x_reg_write(i2c, PM8607_PD_PREBIAS, data); |
163 | if (ret < 0) | 163 | if (ret < 0) |
164 | return -EINVAL; | 164 | goto err_put_node; |
165 | } | 165 | } |
166 | of_property_read_u32(np, "marvell,88pm860x-resistor-X", res_x); | 166 | of_property_read_u32(np, "marvell,88pm860x-resistor-X", res_x); |
167 | |||
168 | of_node_put(np); | ||
169 | |||
167 | return 0; | 170 | return 0; |
171 | |||
172 | err_put_node: | ||
173 | of_node_put(np); | ||
174 | |||
175 | return -EINVAL; | ||
168 | } | 176 | } |
169 | #else | 177 | #else |
170 | #define pm860x_touch_dt_init(x, y, z) (-1) | 178 | #define pm860x_touch_dt_init(x, y, z) (-1) |
diff --git a/drivers/input/touchscreen/of_touchscreen.c b/drivers/input/touchscreen/of_touchscreen.c index 8d7f9c8f2771..9642f103b726 100644 --- a/drivers/input/touchscreen/of_touchscreen.c +++ b/drivers/input/touchscreen/of_touchscreen.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/input.h> | 13 | #include <linux/input.h> |
14 | #include <linux/input/mt.h> | 14 | #include <linux/input/mt.h> |
15 | #include <linux/input/touchscreen.h> | 15 | #include <linux/input/touchscreen.h> |
16 | #include <linux/module.h> | ||
16 | 17 | ||
17 | static bool touchscreen_get_prop_u32(struct device *dev, | 18 | static bool touchscreen_get_prop_u32(struct device *dev, |
18 | const char *property, | 19 | const char *property, |
@@ -185,3 +186,6 @@ void touchscreen_report_pos(struct input_dev *input, | |||
185 | input_report_abs(input, multitouch ? ABS_MT_POSITION_Y : ABS_Y, y); | 186 | input_report_abs(input, multitouch ? ABS_MT_POSITION_Y : ABS_Y, y); |
186 | } | 187 | } |
187 | EXPORT_SYMBOL(touchscreen_report_pos); | 188 | EXPORT_SYMBOL(touchscreen_report_pos); |
189 | |||
190 | MODULE_LICENSE("GPL v2"); | ||
191 | MODULE_DESCRIPTION("Device-tree helpers functions for touchscreen devices"); | ||
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 85140c9af581..8b941f814472 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
@@ -687,6 +687,20 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, | |||
687 | return; | 687 | return; |
688 | } | 688 | } |
689 | 689 | ||
690 | /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ | ||
691 | if (is_imx53_esdhc(imx_data)) { | ||
692 | /* | ||
693 | * According to the i.MX53 reference manual, if DLLCTRL[10] can | ||
694 | * be set, then the controller is eSDHCv3, else it is eSDHCv2. | ||
695 | */ | ||
696 | val = readl(host->ioaddr + ESDHC_DLL_CTRL); | ||
697 | writel(val | BIT(10), host->ioaddr + ESDHC_DLL_CTRL); | ||
698 | temp = readl(host->ioaddr + ESDHC_DLL_CTRL); | ||
699 | writel(val, host->ioaddr + ESDHC_DLL_CTRL); | ||
700 | if (temp & BIT(10)) | ||
701 | pre_div = 2; | ||
702 | } | ||
703 | |||
690 | temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); | 704 | temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); |
691 | temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | 705 | temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
692 | | ESDHC_CLOCK_MASK); | 706 | | ESDHC_CLOCK_MASK); |
diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c index 18ff127020c0..dd161c5eea8e 100644 --- a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c +++ b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c | |||
@@ -184,7 +184,7 @@ static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail) | |||
184 | void *cmd_head = pcan_usb_fd_cmd_buffer(dev); | 184 | void *cmd_head = pcan_usb_fd_cmd_buffer(dev); |
185 | int err = 0; | 185 | int err = 0; |
186 | u8 *packet_ptr; | 186 | u8 *packet_ptr; |
187 | int i, n = 1, packet_len; | 187 | int packet_len; |
188 | ptrdiff_t cmd_len; | 188 | ptrdiff_t cmd_len; |
189 | 189 | ||
190 | /* usb device unregistered? */ | 190 | /* usb device unregistered? */ |
@@ -201,17 +201,13 @@ static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail) | |||
201 | } | 201 | } |
202 | 202 | ||
203 | packet_ptr = cmd_head; | 203 | packet_ptr = cmd_head; |
204 | packet_len = cmd_len; | ||
204 | 205 | ||
205 | /* firmware is not able to re-assemble 512 bytes buffer in full-speed */ | 206 | /* firmware is not able to re-assemble 512 bytes buffer in full-speed */ |
206 | if ((dev->udev->speed != USB_SPEED_HIGH) && | 207 | if (unlikely(dev->udev->speed != USB_SPEED_HIGH)) |
207 | (cmd_len > PCAN_UFD_LOSPD_PKT_SIZE)) { | 208 | packet_len = min(packet_len, PCAN_UFD_LOSPD_PKT_SIZE); |
208 | packet_len = PCAN_UFD_LOSPD_PKT_SIZE; | ||
209 | n += cmd_len / packet_len; | ||
210 | } else { | ||
211 | packet_len = cmd_len; | ||
212 | } | ||
213 | 209 | ||
214 | for (i = 0; i < n; i++) { | 210 | do { |
215 | err = usb_bulk_msg(dev->udev, | 211 | err = usb_bulk_msg(dev->udev, |
216 | usb_sndbulkpipe(dev->udev, | 212 | usb_sndbulkpipe(dev->udev, |
217 | PCAN_USBPRO_EP_CMDOUT), | 213 | PCAN_USBPRO_EP_CMDOUT), |
@@ -224,7 +220,12 @@ static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail) | |||
224 | } | 220 | } |
225 | 221 | ||
226 | packet_ptr += packet_len; | 222 | packet_ptr += packet_len; |
227 | } | 223 | cmd_len -= packet_len; |
224 | |||
225 | if (cmd_len < PCAN_UFD_LOSPD_PKT_SIZE) | ||
226 | packet_len = cmd_len; | ||
227 | |||
228 | } while (packet_len > 0); | ||
228 | 229 | ||
229 | return err; | 230 | return err; |
230 | } | 231 | } |
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c index 7892f2f0c6b5..2c2976a2dda6 100644 --- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c +++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c | |||
@@ -613,9 +613,11 @@ static int fs_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
613 | return NETDEV_TX_OK; | 613 | return NETDEV_TX_OK; |
614 | } | 614 | } |
615 | 615 | ||
616 | static void fs_timeout(struct net_device *dev) | 616 | static void fs_timeout_work(struct work_struct *work) |
617 | { | 617 | { |
618 | struct fs_enet_private *fep = netdev_priv(dev); | 618 | struct fs_enet_private *fep = container_of(work, struct fs_enet_private, |
619 | timeout_work); | ||
620 | struct net_device *dev = fep->ndev; | ||
619 | unsigned long flags; | 621 | unsigned long flags; |
620 | int wake = 0; | 622 | int wake = 0; |
621 | 623 | ||
@@ -627,7 +629,6 @@ static void fs_timeout(struct net_device *dev) | |||
627 | phy_stop(dev->phydev); | 629 | phy_stop(dev->phydev); |
628 | (*fep->ops->stop)(dev); | 630 | (*fep->ops->stop)(dev); |
629 | (*fep->ops->restart)(dev); | 631 | (*fep->ops->restart)(dev); |
630 | phy_start(dev->phydev); | ||
631 | } | 632 | } |
632 | 633 | ||
633 | phy_start(dev->phydev); | 634 | phy_start(dev->phydev); |
@@ -639,6 +640,13 @@ static void fs_timeout(struct net_device *dev) | |||
639 | netif_wake_queue(dev); | 640 | netif_wake_queue(dev); |
640 | } | 641 | } |
641 | 642 | ||
643 | static void fs_timeout(struct net_device *dev) | ||
644 | { | ||
645 | struct fs_enet_private *fep = netdev_priv(dev); | ||
646 | |||
647 | schedule_work(&fep->timeout_work); | ||
648 | } | ||
649 | |||
642 | /*----------------------------------------------------------------------------- | 650 | /*----------------------------------------------------------------------------- |
643 | * generic link-change handler - should be sufficient for most cases | 651 | * generic link-change handler - should be sufficient for most cases |
644 | *-----------------------------------------------------------------------------*/ | 652 | *-----------------------------------------------------------------------------*/ |
@@ -759,6 +767,7 @@ static int fs_enet_close(struct net_device *dev) | |||
759 | netif_stop_queue(dev); | 767 | netif_stop_queue(dev); |
760 | netif_carrier_off(dev); | 768 | netif_carrier_off(dev); |
761 | napi_disable(&fep->napi); | 769 | napi_disable(&fep->napi); |
770 | cancel_work_sync(&fep->timeout_work); | ||
762 | phy_stop(dev->phydev); | 771 | phy_stop(dev->phydev); |
763 | 772 | ||
764 | spin_lock_irqsave(&fep->lock, flags); | 773 | spin_lock_irqsave(&fep->lock, flags); |
@@ -1019,6 +1028,7 @@ static int fs_enet_probe(struct platform_device *ofdev) | |||
1019 | 1028 | ||
1020 | ndev->netdev_ops = &fs_enet_netdev_ops; | 1029 | ndev->netdev_ops = &fs_enet_netdev_ops; |
1021 | ndev->watchdog_timeo = 2 * HZ; | 1030 | ndev->watchdog_timeo = 2 * HZ; |
1031 | INIT_WORK(&fep->timeout_work, fs_timeout_work); | ||
1022 | netif_napi_add(ndev, &fep->napi, fs_enet_napi, fpi->napi_weight); | 1032 | netif_napi_add(ndev, &fep->napi, fs_enet_napi, fpi->napi_weight); |
1023 | 1033 | ||
1024 | ndev->ethtool_ops = &fs_ethtool_ops; | 1034 | ndev->ethtool_ops = &fs_ethtool_ops; |
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet.h b/drivers/net/ethernet/freescale/fs_enet/fs_enet.h index 92e06b37a199..195fae6aec4a 100644 --- a/drivers/net/ethernet/freescale/fs_enet/fs_enet.h +++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet.h | |||
@@ -125,6 +125,7 @@ struct fs_enet_private { | |||
125 | spinlock_t lock; /* during all ops except TX pckt processing */ | 125 | spinlock_t lock; /* during all ops except TX pckt processing */ |
126 | spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */ | 126 | spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */ |
127 | struct fs_platform_info *fpi; | 127 | struct fs_platform_info *fpi; |
128 | struct work_struct timeout_work; | ||
128 | const struct fs_ops *ops; | 129 | const struct fs_ops *ops; |
129 | int rx_ring, tx_ring; | 130 | int rx_ring, tx_ring; |
130 | dma_addr_t ring_mem_addr; | 131 | dma_addr_t ring_mem_addr; |
diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c index 736df59c16f5..be2ce8dece4a 100644 --- a/drivers/net/ethernet/ibm/ibmvnic.c +++ b/drivers/net/ethernet/ibm/ibmvnic.c | |||
@@ -1280,6 +1280,7 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
1280 | unsigned char *dst; | 1280 | unsigned char *dst; |
1281 | u64 *handle_array; | 1281 | u64 *handle_array; |
1282 | int index = 0; | 1282 | int index = 0; |
1283 | u8 proto = 0; | ||
1283 | int ret = 0; | 1284 | int ret = 0; |
1284 | 1285 | ||
1285 | if (adapter->resetting) { | 1286 | if (adapter->resetting) { |
@@ -1368,17 +1369,18 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
1368 | } | 1369 | } |
1369 | 1370 | ||
1370 | if (skb->protocol == htons(ETH_P_IP)) { | 1371 | if (skb->protocol == htons(ETH_P_IP)) { |
1371 | if (ip_hdr(skb)->version == 4) | 1372 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV4; |
1372 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV4; | 1373 | proto = ip_hdr(skb)->protocol; |
1373 | else if (ip_hdr(skb)->version == 6) | 1374 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
1374 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV6; | 1375 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_IPV6; |
1375 | 1376 | proto = ipv6_hdr(skb)->nexthdr; | |
1376 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) | ||
1377 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_TCP; | ||
1378 | else if (ip_hdr(skb)->protocol != IPPROTO_TCP) | ||
1379 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_UDP; | ||
1380 | } | 1377 | } |
1381 | 1378 | ||
1379 | if (proto == IPPROTO_TCP) | ||
1380 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_TCP; | ||
1381 | else if (proto == IPPROTO_UDP) | ||
1382 | tx_crq.v1.flags1 |= IBMVNIC_TX_PROT_UDP; | ||
1383 | |||
1382 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 1384 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1383 | tx_crq.v1.flags1 |= IBMVNIC_TX_CHKSUM_OFFLOAD; | 1385 | tx_crq.v1.flags1 |= IBMVNIC_TX_CHKSUM_OFFLOAD; |
1384 | hdrs += 2; | 1386 | hdrs += 2; |
@@ -3357,7 +3359,11 @@ static void handle_query_ip_offload_rsp(struct ibmvnic_adapter *adapter) | |||
3357 | return; | 3359 | return; |
3358 | } | 3360 | } |
3359 | 3361 | ||
3362 | adapter->ip_offload_ctrl.len = | ||
3363 | cpu_to_be32(sizeof(adapter->ip_offload_ctrl)); | ||
3360 | adapter->ip_offload_ctrl.version = cpu_to_be32(INITIAL_VERSION_IOB); | 3364 | adapter->ip_offload_ctrl.version = cpu_to_be32(INITIAL_VERSION_IOB); |
3365 | adapter->ip_offload_ctrl.ipv4_chksum = buf->ipv4_chksum; | ||
3366 | adapter->ip_offload_ctrl.ipv6_chksum = buf->ipv6_chksum; | ||
3361 | adapter->ip_offload_ctrl.tcp_ipv4_chksum = buf->tcp_ipv4_chksum; | 3367 | adapter->ip_offload_ctrl.tcp_ipv4_chksum = buf->tcp_ipv4_chksum; |
3362 | adapter->ip_offload_ctrl.udp_ipv4_chksum = buf->udp_ipv4_chksum; | 3368 | adapter->ip_offload_ctrl.udp_ipv4_chksum = buf->udp_ipv4_chksum; |
3363 | adapter->ip_offload_ctrl.tcp_ipv6_chksum = buf->tcp_ipv6_chksum; | 3369 | adapter->ip_offload_ctrl.tcp_ipv6_chksum = buf->tcp_ipv6_chksum; |
diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pci.c b/drivers/net/ethernet/intel/fm10k/fm10k_pci.c index 7f605221a686..a434fecfdfeb 100644 --- a/drivers/net/ethernet/intel/fm10k/fm10k_pci.c +++ b/drivers/net/ethernet/intel/fm10k/fm10k_pci.c | |||
@@ -2463,7 +2463,6 @@ static int fm10k_handle_resume(struct fm10k_intfc *interface) | |||
2463 | return err; | 2463 | return err; |
2464 | } | 2464 | } |
2465 | 2465 | ||
2466 | #ifdef CONFIG_PM | ||
2467 | /** | 2466 | /** |
2468 | * fm10k_resume - Generic PM resume hook | 2467 | * fm10k_resume - Generic PM resume hook |
2469 | * @dev: generic device structure | 2468 | * @dev: generic device structure |
@@ -2472,7 +2471,7 @@ static int fm10k_handle_resume(struct fm10k_intfc *interface) | |||
2472 | * suspend or hibernation. This function does not need to handle lower PCIe | 2471 | * suspend or hibernation. This function does not need to handle lower PCIe |
2473 | * device state as the stack takes care of that for us. | 2472 | * device state as the stack takes care of that for us. |
2474 | **/ | 2473 | **/ |
2475 | static int fm10k_resume(struct device *dev) | 2474 | static int __maybe_unused fm10k_resume(struct device *dev) |
2476 | { | 2475 | { |
2477 | struct fm10k_intfc *interface = pci_get_drvdata(to_pci_dev(dev)); | 2476 | struct fm10k_intfc *interface = pci_get_drvdata(to_pci_dev(dev)); |
2478 | struct net_device *netdev = interface->netdev; | 2477 | struct net_device *netdev = interface->netdev; |
@@ -2499,7 +2498,7 @@ static int fm10k_resume(struct device *dev) | |||
2499 | * system suspend or hibernation. This function does not need to handle lower | 2498 | * system suspend or hibernation. This function does not need to handle lower |
2500 | * PCIe device state as the stack takes care of that for us. | 2499 | * PCIe device state as the stack takes care of that for us. |
2501 | **/ | 2500 | **/ |
2502 | static int fm10k_suspend(struct device *dev) | 2501 | static int __maybe_unused fm10k_suspend(struct device *dev) |
2503 | { | 2502 | { |
2504 | struct fm10k_intfc *interface = pci_get_drvdata(to_pci_dev(dev)); | 2503 | struct fm10k_intfc *interface = pci_get_drvdata(to_pci_dev(dev)); |
2505 | struct net_device *netdev = interface->netdev; | 2504 | struct net_device *netdev = interface->netdev; |
@@ -2511,8 +2510,6 @@ static int fm10k_suspend(struct device *dev) | |||
2511 | return 0; | 2510 | return 0; |
2512 | } | 2511 | } |
2513 | 2512 | ||
2514 | #endif /* CONFIG_PM */ | ||
2515 | |||
2516 | /** | 2513 | /** |
2517 | * fm10k_io_error_detected - called when PCI error is detected | 2514 | * fm10k_io_error_detected - called when PCI error is detected |
2518 | * @pdev: Pointer to PCI device | 2515 | * @pdev: Pointer to PCI device |
@@ -2643,11 +2640,9 @@ static struct pci_driver fm10k_driver = { | |||
2643 | .id_table = fm10k_pci_tbl, | 2640 | .id_table = fm10k_pci_tbl, |
2644 | .probe = fm10k_probe, | 2641 | .probe = fm10k_probe, |
2645 | .remove = fm10k_remove, | 2642 | .remove = fm10k_remove, |
2646 | #ifdef CONFIG_PM | ||
2647 | .driver = { | 2643 | .driver = { |
2648 | .pm = &fm10k_pm_ops, | 2644 | .pm = &fm10k_pm_ops, |
2649 | }, | 2645 | }, |
2650 | #endif /* CONFIG_PM */ | ||
2651 | .sriov_configure = fm10k_iov_configure, | 2646 | .sriov_configure = fm10k_iov_configure, |
2652 | .err_handler = &fm10k_err_handler | 2647 | .err_handler = &fm10k_err_handler |
2653 | }; | 2648 | }; |
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c index 01ff5ba6796e..31891ae11c9b 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | |||
@@ -821,13 +821,18 @@ static int mlxsw_sp_vr_lpm_tree_replace(struct mlxsw_sp *mlxsw_sp, | |||
821 | struct mlxsw_sp_lpm_tree *old_tree = fib->lpm_tree; | 821 | struct mlxsw_sp_lpm_tree *old_tree = fib->lpm_tree; |
822 | int err; | 822 | int err; |
823 | 823 | ||
824 | err = mlxsw_sp_vr_lpm_tree_bind(mlxsw_sp, fib, new_tree->id); | ||
825 | if (err) | ||
826 | return err; | ||
827 | fib->lpm_tree = new_tree; | 824 | fib->lpm_tree = new_tree; |
828 | mlxsw_sp_lpm_tree_hold(new_tree); | 825 | mlxsw_sp_lpm_tree_hold(new_tree); |
826 | err = mlxsw_sp_vr_lpm_tree_bind(mlxsw_sp, fib, new_tree->id); | ||
827 | if (err) | ||
828 | goto err_tree_bind; | ||
829 | mlxsw_sp_lpm_tree_put(mlxsw_sp, old_tree); | 829 | mlxsw_sp_lpm_tree_put(mlxsw_sp, old_tree); |
830 | return 0; | 830 | return 0; |
831 | |||
832 | err_tree_bind: | ||
833 | mlxsw_sp_lpm_tree_put(mlxsw_sp, new_tree); | ||
834 | fib->lpm_tree = old_tree; | ||
835 | return err; | ||
831 | } | 836 | } |
832 | 837 | ||
833 | static int mlxsw_sp_vrs_lpm_tree_replace(struct mlxsw_sp *mlxsw_sp, | 838 | static int mlxsw_sp_vrs_lpm_tree_replace(struct mlxsw_sp *mlxsw_sp, |
@@ -868,11 +873,14 @@ err_tree_replace: | |||
868 | return err; | 873 | return err; |
869 | 874 | ||
870 | no_replace: | 875 | no_replace: |
871 | err = mlxsw_sp_vr_lpm_tree_bind(mlxsw_sp, fib, new_tree->id); | ||
872 | if (err) | ||
873 | return err; | ||
874 | fib->lpm_tree = new_tree; | 876 | fib->lpm_tree = new_tree; |
875 | mlxsw_sp_lpm_tree_hold(new_tree); | 877 | mlxsw_sp_lpm_tree_hold(new_tree); |
878 | err = mlxsw_sp_vr_lpm_tree_bind(mlxsw_sp, fib, new_tree->id); | ||
879 | if (err) { | ||
880 | mlxsw_sp_lpm_tree_put(mlxsw_sp, new_tree); | ||
881 | fib->lpm_tree = NULL; | ||
882 | return err; | ||
883 | } | ||
876 | return 0; | 884 | return 0; |
877 | } | 885 | } |
878 | 886 | ||
diff --git a/drivers/net/ethernet/ti/netcp_core.c b/drivers/net/ethernet/ti/netcp_core.c index ed58c746e4af..f5a7eb22d0f5 100644 --- a/drivers/net/ethernet/ti/netcp_core.c +++ b/drivers/net/ethernet/ti/netcp_core.c | |||
@@ -715,7 +715,7 @@ static int netcp_process_one_rx_packet(struct netcp_intf *netcp) | |||
715 | /* warning!!!! We are retrieving the virtual ptr in the sw_data | 715 | /* warning!!!! We are retrieving the virtual ptr in the sw_data |
716 | * field as a 32bit value. Will not work on 64bit machines | 716 | * field as a 32bit value. Will not work on 64bit machines |
717 | */ | 717 | */ |
718 | page = (struct page *)GET_SW_DATA0(desc); | 718 | page = (struct page *)GET_SW_DATA0(ndesc); |
719 | 719 | ||
720 | if (likely(dma_buff && buf_len && page)) { | 720 | if (likely(dma_buff && buf_len && page)) { |
721 | dma_unmap_page(netcp->dev, dma_buff, PAGE_SIZE, | 721 | dma_unmap_page(netcp->dev, dma_buff, PAGE_SIZE, |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 170a3e89b5af..698874684b4e 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -679,6 +679,15 @@ static void tun_queue_purge(struct tun_file *tfile) | |||
679 | skb_queue_purge(&tfile->sk.sk_error_queue); | 679 | skb_queue_purge(&tfile->sk.sk_error_queue); |
680 | } | 680 | } |
681 | 681 | ||
682 | static void tun_cleanup_tx_ring(struct tun_file *tfile) | ||
683 | { | ||
684 | if (tfile->tx_ring.queue) { | ||
685 | ptr_ring_cleanup(&tfile->tx_ring, tun_ptr_free); | ||
686 | xdp_rxq_info_unreg(&tfile->xdp_rxq); | ||
687 | memset(&tfile->tx_ring, 0, sizeof(tfile->tx_ring)); | ||
688 | } | ||
689 | } | ||
690 | |||
682 | static void __tun_detach(struct tun_file *tfile, bool clean) | 691 | static void __tun_detach(struct tun_file *tfile, bool clean) |
683 | { | 692 | { |
684 | struct tun_file *ntfile; | 693 | struct tun_file *ntfile; |
@@ -725,10 +734,7 @@ static void __tun_detach(struct tun_file *tfile, bool clean) | |||
725 | tun->dev->reg_state == NETREG_REGISTERED) | 734 | tun->dev->reg_state == NETREG_REGISTERED) |
726 | unregister_netdevice(tun->dev); | 735 | unregister_netdevice(tun->dev); |
727 | } | 736 | } |
728 | if (tun) { | 737 | tun_cleanup_tx_ring(tfile); |
729 | ptr_ring_cleanup(&tfile->tx_ring, tun_ptr_free); | ||
730 | xdp_rxq_info_unreg(&tfile->xdp_rxq); | ||
731 | } | ||
732 | sock_put(&tfile->sk); | 738 | sock_put(&tfile->sk); |
733 | } | 739 | } |
734 | } | 740 | } |
@@ -770,12 +776,14 @@ static void tun_detach_all(struct net_device *dev) | |||
770 | tun_queue_purge(tfile); | 776 | tun_queue_purge(tfile); |
771 | xdp_rxq_info_unreg(&tfile->xdp_rxq); | 777 | xdp_rxq_info_unreg(&tfile->xdp_rxq); |
772 | sock_put(&tfile->sk); | 778 | sock_put(&tfile->sk); |
779 | tun_cleanup_tx_ring(tfile); | ||
773 | } | 780 | } |
774 | list_for_each_entry_safe(tfile, tmp, &tun->disabled, next) { | 781 | list_for_each_entry_safe(tfile, tmp, &tun->disabled, next) { |
775 | tun_enable_queue(tfile); | 782 | tun_enable_queue(tfile); |
776 | tun_queue_purge(tfile); | 783 | tun_queue_purge(tfile); |
777 | xdp_rxq_info_unreg(&tfile->xdp_rxq); | 784 | xdp_rxq_info_unreg(&tfile->xdp_rxq); |
778 | sock_put(&tfile->sk); | 785 | sock_put(&tfile->sk); |
786 | tun_cleanup_tx_ring(tfile); | ||
779 | } | 787 | } |
780 | BUG_ON(tun->numdisabled != 0); | 788 | BUG_ON(tun->numdisabled != 0); |
781 | 789 | ||
@@ -3145,6 +3153,8 @@ static int tun_chr_open(struct inode *inode, struct file * file) | |||
3145 | 3153 | ||
3146 | sock_set_flag(&tfile->sk, SOCK_ZEROCOPY); | 3154 | sock_set_flag(&tfile->sk, SOCK_ZEROCOPY); |
3147 | 3155 | ||
3156 | memset(&tfile->tx_ring, 0, sizeof(tfile->tx_ring)); | ||
3157 | |||
3148 | return 0; | 3158 | return 0; |
3149 | } | 3159 | } |
3150 | 3160 | ||
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c index d51d9abf7986..0657203ffb91 100644 --- a/drivers/net/usb/r8152.c +++ b/drivers/net/usb/r8152.c | |||
@@ -606,6 +606,7 @@ enum rtl8152_flags { | |||
606 | PHY_RESET, | 606 | PHY_RESET, |
607 | SCHEDULE_NAPI, | 607 | SCHEDULE_NAPI, |
608 | GREEN_ETHERNET, | 608 | GREEN_ETHERNET, |
609 | DELL_TB_RX_AGG_BUG, | ||
609 | }; | 610 | }; |
610 | 611 | ||
611 | /* Define these values to match your device */ | 612 | /* Define these values to match your device */ |
@@ -1798,6 +1799,9 @@ static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg) | |||
1798 | dev_kfree_skb_any(skb); | 1799 | dev_kfree_skb_any(skb); |
1799 | 1800 | ||
1800 | remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head); | 1801 | remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head); |
1802 | |||
1803 | if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags)) | ||
1804 | break; | ||
1801 | } | 1805 | } |
1802 | 1806 | ||
1803 | if (!skb_queue_empty(&skb_head)) { | 1807 | if (!skb_queue_empty(&skb_head)) { |
@@ -4133,6 +4137,9 @@ static void r8153_init(struct r8152 *tp) | |||
4133 | /* rx aggregation */ | 4137 | /* rx aggregation */ |
4134 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); | 4138 | ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL); |
4135 | ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); | 4139 | ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN); |
4140 | if (test_bit(DELL_TB_RX_AGG_BUG, &tp->flags)) | ||
4141 | ocp_data |= RX_AGG_DISABLE; | ||
4142 | |||
4136 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); | 4143 | ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data); |
4137 | 4144 | ||
4138 | rtl_tally_reset(tp); | 4145 | rtl_tally_reset(tp); |
@@ -5207,6 +5214,12 @@ static int rtl8152_probe(struct usb_interface *intf, | |||
5207 | netdev->hw_features &= ~NETIF_F_RXCSUM; | 5214 | netdev->hw_features &= ~NETIF_F_RXCSUM; |
5208 | } | 5215 | } |
5209 | 5216 | ||
5217 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x3011 && | ||
5218 | udev->serial && !strcmp(udev->serial, "000001000000")) { | ||
5219 | dev_info(&udev->dev, "Dell TB16 Dock, disable RX aggregation"); | ||
5220 | set_bit(DELL_TB_RX_AGG_BUG, &tp->flags); | ||
5221 | } | ||
5222 | |||
5210 | netdev->ethtool_ops = &ops; | 5223 | netdev->ethtool_ops = &ops; |
5211 | netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE); | 5224 | netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE); |
5212 | 5225 | ||
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c index 6a59d0609d30..9be0b051066a 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c | |||
@@ -182,12 +182,9 @@ static int brcmf_c_process_clm_blob(struct brcmf_if *ifp) | |||
182 | 182 | ||
183 | err = request_firmware(&clm, clm_name, dev); | 183 | err = request_firmware(&clm, clm_name, dev); |
184 | if (err) { | 184 | if (err) { |
185 | if (err == -ENOENT) { | 185 | brcmf_info("no clm_blob available(err=%d), device may have limited channels available\n", |
186 | brcmf_dbg(INFO, "continue with CLM data currently present in firmware\n"); | 186 | err); |
187 | return 0; | 187 | return 0; |
188 | } | ||
189 | brcmf_err("request CLM blob file failed (%d)\n", err); | ||
190 | return err; | ||
191 | } | 188 | } |
192 | 189 | ||
193 | chunk_buf = kzalloc(sizeof(*chunk_buf) + MAX_CHUNK_LEN - 1, GFP_KERNEL); | 190 | chunk_buf = kzalloc(sizeof(*chunk_buf) + MAX_CHUNK_LEN - 1, GFP_KERNEL); |
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index d53550e612bc..4276ebfff22b 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c | |||
@@ -451,10 +451,13 @@ static void **nvme_pci_iod_list(struct request *req) | |||
451 | static inline bool nvme_pci_use_sgls(struct nvme_dev *dev, struct request *req) | 451 | static inline bool nvme_pci_use_sgls(struct nvme_dev *dev, struct request *req) |
452 | { | 452 | { |
453 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); | 453 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); |
454 | int nseg = blk_rq_nr_phys_segments(req); | ||
454 | unsigned int avg_seg_size; | 455 | unsigned int avg_seg_size; |
455 | 456 | ||
456 | avg_seg_size = DIV_ROUND_UP(blk_rq_payload_bytes(req), | 457 | if (nseg == 0) |
457 | blk_rq_nr_phys_segments(req)); | 458 | return false; |
459 | |||
460 | avg_seg_size = DIV_ROUND_UP(blk_rq_payload_bytes(req), nseg); | ||
458 | 461 | ||
459 | if (!(dev->ctrl.sgls & ((1 << 0) | (1 << 1)))) | 462 | if (!(dev->ctrl.sgls & ((1 << 0) | (1 << 1)))) |
460 | return false; | 463 | return false; |
@@ -722,20 +725,19 @@ static void nvme_pci_sgl_set_seg(struct nvme_sgl_desc *sge, | |||
722 | } | 725 | } |
723 | 726 | ||
724 | static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, | 727 | static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, |
725 | struct request *req, struct nvme_rw_command *cmd) | 728 | struct request *req, struct nvme_rw_command *cmd, int entries) |
726 | { | 729 | { |
727 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); | 730 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); |
728 | int length = blk_rq_payload_bytes(req); | ||
729 | struct dma_pool *pool; | 731 | struct dma_pool *pool; |
730 | struct nvme_sgl_desc *sg_list; | 732 | struct nvme_sgl_desc *sg_list; |
731 | struct scatterlist *sg = iod->sg; | 733 | struct scatterlist *sg = iod->sg; |
732 | int entries = iod->nents, i = 0; | ||
733 | dma_addr_t sgl_dma; | 734 | dma_addr_t sgl_dma; |
735 | int i = 0; | ||
734 | 736 | ||
735 | /* setting the transfer type as SGL */ | 737 | /* setting the transfer type as SGL */ |
736 | cmd->flags = NVME_CMD_SGL_METABUF; | 738 | cmd->flags = NVME_CMD_SGL_METABUF; |
737 | 739 | ||
738 | if (length == sg_dma_len(sg)) { | 740 | if (entries == 1) { |
739 | nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg); | 741 | nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg); |
740 | return BLK_STS_OK; | 742 | return BLK_STS_OK; |
741 | } | 743 | } |
@@ -775,13 +777,9 @@ static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, | |||
775 | } | 777 | } |
776 | 778 | ||
777 | nvme_pci_sgl_set_data(&sg_list[i++], sg); | 779 | nvme_pci_sgl_set_data(&sg_list[i++], sg); |
778 | |||
779 | length -= sg_dma_len(sg); | ||
780 | sg = sg_next(sg); | 780 | sg = sg_next(sg); |
781 | entries--; | 781 | } while (--entries > 0); |
782 | } while (length > 0); | ||
783 | 782 | ||
784 | WARN_ON(entries > 0); | ||
785 | return BLK_STS_OK; | 783 | return BLK_STS_OK; |
786 | } | 784 | } |
787 | 785 | ||
@@ -793,6 +791,7 @@ static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req, | |||
793 | enum dma_data_direction dma_dir = rq_data_dir(req) ? | 791 | enum dma_data_direction dma_dir = rq_data_dir(req) ? |
794 | DMA_TO_DEVICE : DMA_FROM_DEVICE; | 792 | DMA_TO_DEVICE : DMA_FROM_DEVICE; |
795 | blk_status_t ret = BLK_STS_IOERR; | 793 | blk_status_t ret = BLK_STS_IOERR; |
794 | int nr_mapped; | ||
796 | 795 | ||
797 | sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); | 796 | sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); |
798 | iod->nents = blk_rq_map_sg(q, req, iod->sg); | 797 | iod->nents = blk_rq_map_sg(q, req, iod->sg); |
@@ -800,12 +799,13 @@ static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req, | |||
800 | goto out; | 799 | goto out; |
801 | 800 | ||
802 | ret = BLK_STS_RESOURCE; | 801 | ret = BLK_STS_RESOURCE; |
803 | if (!dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir, | 802 | nr_mapped = dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir, |
804 | DMA_ATTR_NO_WARN)) | 803 | DMA_ATTR_NO_WARN); |
804 | if (!nr_mapped) | ||
805 | goto out; | 805 | goto out; |
806 | 806 | ||
807 | if (iod->use_sgl) | 807 | if (iod->use_sgl) |
808 | ret = nvme_pci_setup_sgls(dev, req, &cmnd->rw); | 808 | ret = nvme_pci_setup_sgls(dev, req, &cmnd->rw, nr_mapped); |
809 | else | 809 | else |
810 | ret = nvme_pci_setup_prps(dev, req, &cmnd->rw); | 810 | ret = nvme_pci_setup_prps(dev, req, &cmnd->rw); |
811 | 811 | ||
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index b4964b067aec..8f6e8e28996d 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c | |||
@@ -410,6 +410,10 @@ static struct phy *_of_phy_get(struct device_node *np, int index) | |||
410 | if (ret) | 410 | if (ret) |
411 | return ERR_PTR(-ENODEV); | 411 | return ERR_PTR(-ENODEV); |
412 | 412 | ||
413 | /* This phy type handled by the usb-phy subsystem for now */ | ||
414 | if (of_device_is_compatible(args.np, "usb-nop-xceiv")) | ||
415 | return ERR_PTR(-ENODEV); | ||
416 | |||
413 | mutex_lock(&phy_provider_mutex); | 417 | mutex_lock(&phy_provider_mutex); |
414 | phy_provider = of_phy_provider_lookup(args.np); | 418 | phy_provider = of_phy_provider_lookup(args.np); |
415 | if (IS_ERR(phy_provider) || !try_module_get(phy_provider->owner)) { | 419 | if (IS_ERR(phy_provider) || !try_module_get(phy_provider->owner)) { |
diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig index f48a2ee587a4..ee18428a051f 100644 --- a/drivers/ssb/Kconfig +++ b/drivers/ssb/Kconfig | |||
@@ -31,7 +31,7 @@ config SSB_BLOCKIO | |||
31 | 31 | ||
32 | config SSB_PCIHOST_POSSIBLE | 32 | config SSB_PCIHOST_POSSIBLE |
33 | bool | 33 | bool |
34 | depends on SSB && (PCI = y || PCI = SSB) | 34 | depends on SSB && (PCI = y || PCI = SSB) && PCI_DRIVERS_LEGACY |
35 | default y | 35 | default y |
36 | 36 | ||
37 | config SSB_PCIHOST | 37 | config SSB_PCIHOST |