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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-21 16:48:00 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-21 16:48:00 -0400 |
commit | 266c73b77706f2d05b4a3e70a5bb702ed35431d6 (patch) | |
tree | 381461b90a8bd10c0c36b0cdbb2e6e4bbf6c5e87 /drivers/video/fbdev | |
parent | 2c856e14dad8cb1b085ae1f30c5e125c6d46019b (diff) | |
parent | 568d7c764ae01f3706085ac8f0d8a8ac7e826bd7 (diff) |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"This is the main drm pull request for 4.6 kernel.
Overall the coolest thing here for me is the nouveau maxwell signed
firmware support from NVidia, it's taken a long while to extract this
from them.
I also wish the ARM vendors just designed one set of display IP, ARM
display block proliferation is definitely increasing.
Core:
- drm_event cleanups
- Internal API cleanup making mode_fixup optional.
- Apple GMUX vga switcheroo support.
- DP AUX testing interface
Panel:
- Refactoring of DSI core for use over more transports.
New driver:
- ARM hdlcd driver
i915:
- FBC/PSR (framebuffer compression, panel self refresh) enabled by default.
- Ongoing atomic display support work
- Ongoing runtime PM work
- Pixel clock limit checks
- VBT DSI description support
- GEM fixes
- GuC firmware scheduler enhancements
amdkfd:
- Deferred probing fixes to avoid make file or link ordering.
amdgpu/radeon:
- ACP support for i2s audio support.
- Command Submission/GPU scheduler/GPUVM optimisations
- Initial GPU reset support for amdgpu
vmwgfx:
- Support for DX10 gen mipmaps
- Pageflipping and other fixes.
exynos:
- Exynos5420 SoC support for FIMD
- Exynos5422 SoC support for MIPI-DSI
nouveau:
- GM20x secure boot support - adds acceleration for Maxwell GPUs.
- GM200 support
- GM20B clock driver support
- Power sensors work
etnaviv:
- Correctness fixes for GPU cache flushing
- Better support for i.MX6 systems.
imx-drm:
- VBlank IRQ support
- Fence support
- OF endpoint support
msm:
- HDMI support for 8996 (snapdragon 820)
- Adreno 430 support
- Timestamp queries support
virtio-gpu:
- Fixes for Android support.
rockchip:
- Add support for Innosilicion HDMI
rcar-du:
- Support for 4 crtcs
- R8A7795 support
- RCar Gen 3 support
omapdrm:
- HDMI interlace output support
- dma-buf import support
- Refactoring to remove a lot of legacy code.
tilcdc:
- Rewrite of pageflipping code
- dma-buf support
- pinctrl support
vc4:
- HDMI modesetting bug fixes
- Significant 3D performance improvement.
fsl-dcu (FreeScale):
- Lots of fixes
tegra:
- Two small fixes
sti:
- Atomic support for planes
- Improved HDMI support"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1063 commits)
drm/amdgpu: release_pages requires linux/pagemap.h
drm/sti: restore mode_fixup callback
drm/amdgpu/gfx7: add MTYPE definition
drm/amdgpu: removing BO_VAs shouldn't be interruptible
drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
drm/amd/powerplay: show uvd/vce power gate info for fiji
drm/amdgpu: use sched fence if possible
drm/amdgpu: move ib.fence to job.fence
drm/amdgpu: give a fence param to ib_free
drm/amdgpu: include the right version of gmc header files for iceland
drm/radeon: fix indentation.
drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
drm/amdgpu: switch back to 32bit hw fences v2
drm/amdgpu: remove amdgpu_fence_is_signaled
drm/amdgpu: drop the extra fence range check v2
drm/amdgpu: signal fences directly in amdgpu_fence_process
drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
drm/amdgpu: keep all fences in an RCU protected array v2
drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
drm/amdgpu: RCU protected amd_sched_fence_release
...
Diffstat (limited to 'drivers/video/fbdev')
-rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/dispc.h | 1 | ||||
-rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/dss.h | 78 |
2 files changed, 79 insertions, 0 deletions
diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dispc.h b/drivers/video/fbdev/omap2/omapfb/dss/dispc.h index 483744223dd1..e014d0419c58 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dispc.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc.h | |||
@@ -915,4 +915,5 @@ static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane) | |||
915 | return 0; | 915 | return 0; |
916 | } | 916 | } |
917 | } | 917 | } |
918 | |||
918 | #endif | 919 | #endif |
diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dss.h b/drivers/video/fbdev/omap2/omapfb/dss/dss.h index b9066afee301..0184a8461df1 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dss.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.h | |||
@@ -412,6 +412,44 @@ void dispc_wb_set_channel_in(enum dss_writeback_channel channel); | |||
412 | int dispc_wb_setup(const struct omap_dss_writeback_info *wi, | 412 | int dispc_wb_setup(const struct omap_dss_writeback_info *wi, |
413 | bool mem_to_mem, const struct omap_video_timings *timings); | 413 | bool mem_to_mem, const struct omap_video_timings *timings); |
414 | 414 | ||
415 | u32 dispc_read_irqstatus(void); | ||
416 | void dispc_clear_irqstatus(u32 mask); | ||
417 | u32 dispc_read_irqenable(void); | ||
418 | void dispc_write_irqenable(u32 mask); | ||
419 | |||
420 | int dispc_request_irq(irq_handler_t handler, void *dev_id); | ||
421 | void dispc_free_irq(void *dev_id); | ||
422 | |||
423 | int dispc_runtime_get(void); | ||
424 | void dispc_runtime_put(void); | ||
425 | |||
426 | void dispc_mgr_enable(enum omap_channel channel, bool enable); | ||
427 | bool dispc_mgr_is_enabled(enum omap_channel channel); | ||
428 | u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); | ||
429 | u32 dispc_mgr_get_framedone_irq(enum omap_channel channel); | ||
430 | u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel); | ||
431 | bool dispc_mgr_go_busy(enum omap_channel channel); | ||
432 | void dispc_mgr_go(enum omap_channel channel); | ||
433 | void dispc_mgr_set_lcd_config(enum omap_channel channel, | ||
434 | const struct dss_lcd_mgr_config *config); | ||
435 | void dispc_mgr_set_timings(enum omap_channel channel, | ||
436 | const struct omap_video_timings *timings); | ||
437 | void dispc_mgr_setup(enum omap_channel channel, | ||
438 | const struct omap_overlay_manager_info *info); | ||
439 | |||
440 | int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel, | ||
441 | const struct omap_overlay_info *oi, | ||
442 | const struct omap_video_timings *timings, | ||
443 | int *x_predecim, int *y_predecim); | ||
444 | |||
445 | int dispc_ovl_enable(enum omap_plane plane, bool enable); | ||
446 | bool dispc_ovl_enabled(enum omap_plane plane); | ||
447 | void dispc_ovl_set_channel_out(enum omap_plane plane, | ||
448 | enum omap_channel channel); | ||
449 | int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, | ||
450 | bool replication, const struct omap_video_timings *mgr_timings, | ||
451 | bool mem_to_mem); | ||
452 | |||
415 | /* VENC */ | 453 | /* VENC */ |
416 | int venc_init_platform_driver(void) __init; | 454 | int venc_init_platform_driver(void) __init; |
417 | void venc_uninit_platform_driver(void); | 455 | void venc_uninit_platform_driver(void); |
@@ -465,4 +503,44 @@ int dss_pll_write_config_type_b(struct dss_pll *pll, | |||
465 | const struct dss_pll_clock_info *cinfo); | 503 | const struct dss_pll_clock_info *cinfo); |
466 | int dss_pll_wait_reset_done(struct dss_pll *pll); | 504 | int dss_pll_wait_reset_done(struct dss_pll *pll); |
467 | 505 | ||
506 | /* compat */ | ||
507 | |||
508 | struct dss_mgr_ops { | ||
509 | int (*connect)(struct omap_overlay_manager *mgr, | ||
510 | struct omap_dss_device *dst); | ||
511 | void (*disconnect)(struct omap_overlay_manager *mgr, | ||
512 | struct omap_dss_device *dst); | ||
513 | |||
514 | void (*start_update)(struct omap_overlay_manager *mgr); | ||
515 | int (*enable)(struct omap_overlay_manager *mgr); | ||
516 | void (*disable)(struct omap_overlay_manager *mgr); | ||
517 | void (*set_timings)(struct omap_overlay_manager *mgr, | ||
518 | const struct omap_video_timings *timings); | ||
519 | void (*set_lcd_config)(struct omap_overlay_manager *mgr, | ||
520 | const struct dss_lcd_mgr_config *config); | ||
521 | int (*register_framedone_handler)(struct omap_overlay_manager *mgr, | ||
522 | void (*handler)(void *), void *data); | ||
523 | void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr, | ||
524 | void (*handler)(void *), void *data); | ||
525 | }; | ||
526 | |||
527 | int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops); | ||
528 | void dss_uninstall_mgr_ops(void); | ||
529 | |||
530 | int dss_mgr_connect(struct omap_overlay_manager *mgr, | ||
531 | struct omap_dss_device *dst); | ||
532 | void dss_mgr_disconnect(struct omap_overlay_manager *mgr, | ||
533 | struct omap_dss_device *dst); | ||
534 | void dss_mgr_set_timings(struct omap_overlay_manager *mgr, | ||
535 | const struct omap_video_timings *timings); | ||
536 | void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr, | ||
537 | const struct dss_lcd_mgr_config *config); | ||
538 | int dss_mgr_enable(struct omap_overlay_manager *mgr); | ||
539 | void dss_mgr_disable(struct omap_overlay_manager *mgr); | ||
540 | void dss_mgr_start_update(struct omap_overlay_manager *mgr); | ||
541 | int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr, | ||
542 | void (*handler)(void *), void *data); | ||
543 | void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr, | ||
544 | void (*handler)(void *), void *data); | ||
545 | |||
468 | #endif | 546 | #endif |