diff options
author | Mark Brown <broonie@kernel.org> | 2019-09-15 05:32:04 -0400 |
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committer | Mark Brown <broonie@kernel.org> | 2019-09-15 05:32:04 -0400 |
commit | 262a2f33454fcecdc2032ca84d6fecdb08233468 (patch) | |
tree | 0689eaf3ef298f1ebd62db89a6c19680e5eb479c /drivers/spi/spi-bcm2835.c | |
parent | f74c2bb98776e2de508f4d607cd519873065118e (diff) | |
parent | 4c524191c0a21d758b519087c64f84348095e940 (diff) |
Merge branch 'spi-5.3' into spi-linus
Diffstat (limited to 'drivers/spi/spi-bcm2835.c')
-rw-r--r-- | drivers/spi/spi-bcm2835.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 840b1b8ff3dc..dfdcebb38830 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c | |||
@@ -319,6 +319,13 @@ static void bcm2835_spi_reset_hw(struct spi_controller *ctlr) | |||
319 | BCM2835_SPI_CS_INTD | | 319 | BCM2835_SPI_CS_INTD | |
320 | BCM2835_SPI_CS_DMAEN | | 320 | BCM2835_SPI_CS_DMAEN | |
321 | BCM2835_SPI_CS_TA); | 321 | BCM2835_SPI_CS_TA); |
322 | /* | ||
323 | * Transmission sometimes breaks unless the DONE bit is written at the | ||
324 | * end of every transfer. The spec says it's a RO bit. Either the | ||
325 | * spec is wrong and the bit is actually of type RW1C, or it's a | ||
326 | * hardware erratum. | ||
327 | */ | ||
328 | cs |= BCM2835_SPI_CS_DONE; | ||
322 | /* and reset RX/TX FIFOS */ | 329 | /* and reset RX/TX FIFOS */ |
323 | cs |= BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX; | 330 | cs |= BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX; |
324 | 331 | ||
@@ -477,7 +484,9 @@ static void bcm2835_spi_transfer_prologue(struct spi_controller *ctlr, | |||
477 | bcm2835_wr_fifo_count(bs, bs->rx_prologue); | 484 | bcm2835_wr_fifo_count(bs, bs->rx_prologue); |
478 | bcm2835_wait_tx_fifo_empty(bs); | 485 | bcm2835_wait_tx_fifo_empty(bs); |
479 | bcm2835_rd_fifo_count(bs, bs->rx_prologue); | 486 | bcm2835_rd_fifo_count(bs, bs->rx_prologue); |
480 | bcm2835_spi_reset_hw(ctlr); | 487 | bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_RX |
488 | | BCM2835_SPI_CS_CLEAR_TX | ||
489 | | BCM2835_SPI_CS_DONE); | ||
481 | 490 | ||
482 | dma_sync_single_for_device(ctlr->dma_rx->device->dev, | 491 | dma_sync_single_for_device(ctlr->dma_rx->device->dev, |
483 | sg_dma_address(&tfr->rx_sg.sgl[0]), | 492 | sg_dma_address(&tfr->rx_sg.sgl[0]), |
@@ -498,7 +507,8 @@ static void bcm2835_spi_transfer_prologue(struct spi_controller *ctlr, | |||
498 | | BCM2835_SPI_CS_DMAEN); | 507 | | BCM2835_SPI_CS_DMAEN); |
499 | bcm2835_wr_fifo_count(bs, tx_remaining); | 508 | bcm2835_wr_fifo_count(bs, tx_remaining); |
500 | bcm2835_wait_tx_fifo_empty(bs); | 509 | bcm2835_wait_tx_fifo_empty(bs); |
501 | bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_TX); | 510 | bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_TX |
511 | | BCM2835_SPI_CS_DONE); | ||
502 | } | 512 | } |
503 | 513 | ||
504 | if (likely(!bs->tx_spillover)) { | 514 | if (likely(!bs->tx_spillover)) { |