diff options
author | Florian Fainelli <f.fainelli@gmail.com> | 2017-01-31 17:47:45 -0500 |
---|---|---|
committer | Florian Fainelli <f.fainelli@gmail.com> | 2017-12-20 20:37:32 -0500 |
commit | 9257091cf6df707b64989f15c1e2d4311d694ad3 (patch) | |
tree | 57adac3e0618bd3d908b4b7f512719e660abd94e /drivers/soc | |
parent | 911e9322c350df236e4614c1259d52c705245c78 (diff) |
soc: brcmstb: Make CPU credit offset more parameterized
In preparation for fixing and changing values in the CPU_CREDIT_REG
register for B53-based systems, make the offset parameterized.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r-- | drivers/soc/bcm/brcmstb/biuctrl.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c index 3c39415d484f..c3c548fcaa8c 100644 --- a/drivers/soc/bcm/brcmstb/biuctrl.c +++ b/drivers/soc/bcm/brcmstb/biuctrl.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | static void __iomem *cpubiuctrl_base; | 27 | static void __iomem *cpubiuctrl_base; |
28 | static bool mcp_wr_pairing_en; | 28 | static bool mcp_wr_pairing_en; |
29 | static unsigned int cpu_credit_reg_offset = CPU_CREDIT_REG_OFFSET; | ||
29 | 30 | ||
30 | static int __init mcp_write_pairing_set(void) | 31 | static int __init mcp_write_pairing_set(void) |
31 | { | 32 | { |
@@ -34,15 +35,15 @@ static int __init mcp_write_pairing_set(void) | |||
34 | if (!cpubiuctrl_base) | 35 | if (!cpubiuctrl_base) |
35 | return -1; | 36 | return -1; |
36 | 37 | ||
37 | creds = readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET); | 38 | creds = readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset); |
38 | if (mcp_wr_pairing_en) { | 39 | if (mcp_wr_pairing_en) { |
39 | pr_info("MCP: Enabling write pairing\n"); | 40 | pr_info("MCP: Enabling write pairing\n"); |
40 | writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK, | 41 | writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK, |
41 | cpubiuctrl_base + CPU_CREDIT_REG_OFFSET); | 42 | cpubiuctrl_base + cpu_credit_reg_offset); |
42 | } else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) { | 43 | } else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) { |
43 | pr_info("MCP: Disabling write pairing\n"); | 44 | pr_info("MCP: Disabling write pairing\n"); |
44 | writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK, | 45 | writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK, |
45 | cpubiuctrl_base + CPU_CREDIT_REG_OFFSET); | 46 | cpubiuctrl_base + cpu_credit_reg_offset); |
46 | } else { | 47 | } else { |
47 | pr_info("MCP: Write pairing already disabled\n"); | 48 | pr_info("MCP: Write pairing already disabled\n"); |
48 | } | 49 | } |
@@ -81,7 +82,7 @@ static int brcmstb_cpu_credit_reg_suspend(void) | |||
81 | { | 82 | { |
82 | if (cpubiuctrl_base) | 83 | if (cpubiuctrl_base) |
83 | cpu_credit_reg_dump = | 84 | cpu_credit_reg_dump = |
84 | readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET); | 85 | readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset); |
85 | return 0; | 86 | return 0; |
86 | } | 87 | } |
87 | 88 | ||
@@ -89,7 +90,7 @@ static void brcmstb_cpu_credit_reg_resume(void) | |||
89 | { | 90 | { |
90 | if (cpubiuctrl_base) | 91 | if (cpubiuctrl_base) |
91 | writel_relaxed(cpu_credit_reg_dump, | 92 | writel_relaxed(cpu_credit_reg_dump, |
92 | cpubiuctrl_base + CPU_CREDIT_REG_OFFSET); | 93 | cpubiuctrl_base + cpu_credit_reg_offset); |
93 | } | 94 | } |
94 | 95 | ||
95 | static struct syscore_ops brcmstb_cpu_credit_syscore_ops = { | 96 | static struct syscore_ops brcmstb_cpu_credit_syscore_ops = { |