hpsa: slightly optimize SA5_performant_completed

Reviewed-by: Scott Teel <scott.teel@pmcs.com>
Signed-off-by: Don Brace <don.brace@pmcs.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 1856445f883a..aa6cb0b0b427 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -412,19 +412,19 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)
         unsigned long register_value = FIFO_EMPTY;
 
         /* msi auto clears the interrupt pending bit. */
-        if (!(h->msi_vector || h->msix_vector)) {
+        if (unlikely(!(h->msi_vector || h->msix_vector))) {
                 /* flush the controller write of the reply queue by reading
                  * outbound doorbell status register.
                  */
-                register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
+                (void) readl(h->vaddr + SA5_OUTDB_STATUS);
                 writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
                 /* Do a read in order to flush the write to the controller
                  * (as per spec.)
                  */
-                register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
+                (void) readl(h->vaddr + SA5_OUTDB_STATUS);
         }
 
-        if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
+        if ((((u32) rq->head[rq->current_entry]) & 1) == rq->wraparound) {
                 register_value = rq->head[rq->current_entry];
                 rq->current_entry++;
                 atomic_dec(&h->commands_outstanding);