diff options
author | Jerome Brunet <jbrunet@baylibre.com> | 2017-06-08 08:24:15 -0400 |
---|---|---|
committer | Thierry Reding <thierry.reding@gmail.com> | 2017-07-06 03:05:22 -0400 |
commit | d396b20a1e88ca2cabf7ec99c6c2138902aff1f3 (patch) | |
tree | d57e76a5a64d97436761054b26f8125ae41a8765 /drivers/pwm | |
parent | a054c4d68408cdbb260ba9384415fb53edb29d7a (diff) |
pwm: meson: Add compatible for the gxbb ao PWMs
On the gxbb (and gxl) family, the PWMs of the AO domain require a
specific compatible because the possible input clocks are different
from the EE PWMs input clocks.
Since the number of possible input clocks is also different, the
'num_parents' field is added to all the Meson PWM data.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
-rw-r--r-- | drivers/pwm/pwm-meson.c | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 045ef9fa6fe3..defc27d880f3 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c | |||
@@ -103,6 +103,7 @@ struct meson_pwm_channel { | |||
103 | 103 | ||
104 | struct meson_pwm_data { | 104 | struct meson_pwm_data { |
105 | const char * const *parent_names; | 105 | const char * const *parent_names; |
106 | unsigned int num_parents; | ||
106 | }; | 107 | }; |
107 | 108 | ||
108 | struct meson_pwm { | 109 | struct meson_pwm { |
@@ -381,6 +382,7 @@ static const char * const pwm_meson8b_parent_names[] = { | |||
381 | 382 | ||
382 | static const struct meson_pwm_data pwm_meson8b_data = { | 383 | static const struct meson_pwm_data pwm_meson8b_data = { |
383 | .parent_names = pwm_meson8b_parent_names, | 384 | .parent_names = pwm_meson8b_parent_names, |
385 | .num_parents = ARRAY_SIZE(pwm_meson8b_parent_names), | ||
384 | }; | 386 | }; |
385 | 387 | ||
386 | static const char * const pwm_gxbb_parent_names[] = { | 388 | static const char * const pwm_gxbb_parent_names[] = { |
@@ -389,11 +391,35 @@ static const char * const pwm_gxbb_parent_names[] = { | |||
389 | 391 | ||
390 | static const struct meson_pwm_data pwm_gxbb_data = { | 392 | static const struct meson_pwm_data pwm_gxbb_data = { |
391 | .parent_names = pwm_gxbb_parent_names, | 393 | .parent_names = pwm_gxbb_parent_names, |
394 | .num_parents = ARRAY_SIZE(pwm_gxbb_parent_names), | ||
395 | }; | ||
396 | |||
397 | /* | ||
398 | * Only the 2 first inputs of the GXBB AO PWMs are valid | ||
399 | * The last 2 are grounded | ||
400 | */ | ||
401 | static const char * const pwm_gxbb_ao_parent_names[] = { | ||
402 | "xtal", "clk81" | ||
403 | }; | ||
404 | |||
405 | static const struct meson_pwm_data pwm_gxbb_ao_data = { | ||
406 | .parent_names = pwm_gxbb_ao_parent_names, | ||
407 | .num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names), | ||
392 | }; | 408 | }; |
393 | 409 | ||
394 | static const struct of_device_id meson_pwm_matches[] = { | 410 | static const struct of_device_id meson_pwm_matches[] = { |
395 | { .compatible = "amlogic,meson8b-pwm", .data = &pwm_meson8b_data }, | 411 | { |
396 | { .compatible = "amlogic,meson-gxbb-pwm", .data = &pwm_gxbb_data }, | 412 | .compatible = "amlogic,meson8b-pwm", |
413 | .data = &pwm_meson8b_data | ||
414 | }, | ||
415 | { | ||
416 | .compatible = "amlogic,meson-gxbb-pwm", | ||
417 | .data = &pwm_gxbb_data | ||
418 | }, | ||
419 | { | ||
420 | .compatible = "amlogic,meson-gxbb-ao-pwm", | ||
421 | .data = &pwm_gxbb_ao_data | ||
422 | }, | ||
397 | {}, | 423 | {}, |
398 | }; | 424 | }; |
399 | MODULE_DEVICE_TABLE(of, meson_pwm_matches); | 425 | MODULE_DEVICE_TABLE(of, meson_pwm_matches); |
@@ -417,7 +443,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson, | |||
417 | init.ops = &clk_mux_ops; | 443 | init.ops = &clk_mux_ops; |
418 | init.flags = CLK_IS_BASIC; | 444 | init.flags = CLK_IS_BASIC; |
419 | init.parent_names = meson->data->parent_names; | 445 | init.parent_names = meson->data->parent_names; |
420 | init.num_parents = 1 << MISC_CLK_SEL_WIDTH; | 446 | init.num_parents = meson->data->num_parents; |
421 | 447 | ||
422 | channel->mux.reg = meson->base + REG_MISC_AB; | 448 | channel->mux.reg = meson->base + REG_MISC_AB; |
423 | channel->mux.shift = mux_reg_shifts[i]; | 449 | channel->mux.shift = mux_reg_shifts[i]; |