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authorZhang Rui <rui.zhang@intel.com>2019-07-10 09:44:29 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2019-07-11 09:08:57 -0400
commit1193b1658d16f03cdb2edbac5f2a796ccca225af (patch)
tree55b46e943bee466905aad3fab1a434bddae686d1 /drivers/powercap
parent8a00676cd690941c9a18bd390c3b2cade631c516 (diff)
intel_rapl: cleanup hardcoded MSR access
There are still some places in the common code that have hardcoded MSR access, convert them to follow the abstracted register access. Reviewed-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Tested-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/powercap')
-rw-r--r--drivers/powercap/intel_rapl.c38
1 files changed, 22 insertions, 16 deletions
diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
index 7a97d331bcdc..aa54c06ed518 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl.c
@@ -767,22 +767,24 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
767 */ 767 */
768static int rapl_check_unit_core(struct rapl_package *rp, int cpu) 768static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
769{ 769{
770 u64 msr_val; 770 struct reg_action ra;
771 u32 value; 771 u32 value;
772 772
773 if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) { 773 ra.reg = rp->priv->reg_unit;
774 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", 774 ra.mask = ~0;
775 if (rp->priv->read_raw(cpu, &ra)) {
776 pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
775 rp->priv->reg_unit, cpu); 777 rp->priv->reg_unit, cpu);
776 return -ENODEV; 778 return -ENODEV;
777 } 779 }
778 780
779 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 781 value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
780 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value); 782 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
781 783
782 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 784 value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
783 rp->power_unit = 1000000 / (1 << value); 785 rp->power_unit = 1000000 / (1 << value);
784 786
785 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 787 value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
786 rp->time_unit = 1000000 / (1 << value); 788 rp->time_unit = 1000000 / (1 << value);
787 789
788 pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n", 790 pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n",
@@ -793,21 +795,24 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
793 795
794static int rapl_check_unit_atom(struct rapl_package *rp, int cpu) 796static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
795{ 797{
796 u64 msr_val; 798 struct reg_action ra;
797 u32 value; 799 u32 value;
798 800
799 if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) { 801 ra.reg = rp->priv->reg_unit;
800 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", 802 ra.mask = ~0;
803 if (rp->priv->read_raw(cpu, &ra)) {
804 pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
801 rp->priv->reg_unit, cpu); 805 rp->priv->reg_unit, cpu);
802 return -ENODEV; 806 return -ENODEV;
803 } 807 }
804 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 808
809 value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
805 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value; 810 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
806 811
807 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 812 value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
808 rp->power_unit = (1 << value) * 1000; 813 rp->power_unit = (1 << value) * 1000;
809 814
810 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 815 value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
811 rp->time_unit = 1000000 / (1 << value); 816 rp->time_unit = 1000000 / (1 << value);
812 817
813 pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n", 818 pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n",
@@ -1180,15 +1185,14 @@ static void rapl_remove_platform_domain(struct rapl_if_priv *priv)
1180 1185
1181static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp) 1186static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
1182{ 1187{
1183 u32 reg; 1188 struct reg_action ra;
1184 u64 val = 0;
1185 1189
1186 switch (domain) { 1190 switch (domain) {
1187 case RAPL_DOMAIN_PACKAGE: 1191 case RAPL_DOMAIN_PACKAGE:
1188 case RAPL_DOMAIN_PP0: 1192 case RAPL_DOMAIN_PP0:
1189 case RAPL_DOMAIN_PP1: 1193 case RAPL_DOMAIN_PP1:
1190 case RAPL_DOMAIN_DRAM: 1194 case RAPL_DOMAIN_DRAM:
1191 reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS]; 1195 ra.reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS];
1192 break; 1196 break;
1193 case RAPL_DOMAIN_PLATFORM: 1197 case RAPL_DOMAIN_PLATFORM:
1194 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */ 1198 /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
@@ -1200,7 +1204,9 @@ static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
1200 /* make sure domain counters are available and contains non-zero 1204 /* make sure domain counters are available and contains non-zero
1201 * values, otherwise skip it. 1205 * values, otherwise skip it.
1202 */ 1206 */
1203 if (rdmsrl_safe_on_cpu(cpu, reg, &val) || !val) 1207
1208 ra.mask = ~0;
1209 if (rp->priv->read_raw(cpu, &ra) || !ra.value)
1204 return -ENODEV; 1210 return -ENODEV;
1205 1211
1206 return 0; 1212 return 0;