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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-04-18 14:12:50 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-05-04 03:03:28 -0400
commitf2821b1ca3a21c21e8c1256ab45d70b00d1d6398 (patch)
tree51d7f2ab4772ae8800780c2eeceb52876ac99bb9 /drivers/pinctrl
parent2284ba6b7d8310d09f3a0a5d81669632532ec26c (diff)
pinctrl: sunxi: Move Allwinner A10 pinctrl driver to a driver of its own
Move the pin description to a driver specific to be. This is one more step toward retiring pinctrl-sunxi-pins.h that used to define all the pins for all the Allwinner SoCs in a single header, that would have in turn result in having these structures in the final binary as many times as the header was included. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sunxi/Makefile4
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c1039
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h994
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.c1
4 files changed, 1043 insertions, 995 deletions
diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
index 09a7621e09e8..e0ef0683dd46 100644
--- a/drivers/pinctrl/sunxi/Makefile
+++ b/drivers/pinctrl/sunxi/Makefile
@@ -1 +1,5 @@
1# Core
1obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sunxi.o 2obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sunxi.o
3
4# SoC Drivers
5obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun4i-a10.o
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
new file mode 100644
index 000000000000..fa1ff7c7e357
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -0,0 +1,1039 @@
1/*
2 * Allwinner A10 SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-sunxi.h"
20
21static const struct sunxi_desc_pin sun4i_a10_pins[] = {
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
26 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
27 SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
29 SUNXI_FUNCTION(0x0, "gpio_in"),
30 SUNXI_FUNCTION(0x1, "gpio_out"),
31 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
32 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
33 SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out"),
37 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
38 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
39 SUNXI_FUNCTION(0x4, "uart2")), /* TX */
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
44 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
45 SUNXI_FUNCTION(0x4, "uart2")), /* RX */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
50 SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */
51 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
52 SUNXI_FUNCTION(0x0, "gpio_in"),
53 SUNXI_FUNCTION(0x1, "gpio_out"),
54 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
55 SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */
56 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
57 SUNXI_FUNCTION(0x0, "gpio_in"),
58 SUNXI_FUNCTION(0x1, "gpio_out"),
59 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
60 SUNXI_FUNCTION(0x3, "spi3")), /* CLK */
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
65 SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */
66 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
67 SUNXI_FUNCTION(0x0, "gpio_in"),
68 SUNXI_FUNCTION(0x1, "gpio_out"),
69 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
70 SUNXI_FUNCTION(0x3, "spi3")), /* MISO */
71 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
72 SUNXI_FUNCTION(0x0, "gpio_in"),
73 SUNXI_FUNCTION(0x1, "gpio_out"),
74 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
75 SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */
76 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
77 SUNXI_FUNCTION(0x0, "gpio_in"),
78 SUNXI_FUNCTION(0x1, "gpio_out"),
79 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
80 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
81 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
82 SUNXI_FUNCTION(0x0, "gpio_in"),
83 SUNXI_FUNCTION(0x1, "gpio_out"),
84 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
85 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
86 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
90 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
91 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
92 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
93 SUNXI_FUNCTION(0x0, "gpio_in"),
94 SUNXI_FUNCTION(0x1, "gpio_out"),
95 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
96 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
97 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
98 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
99 SUNXI_FUNCTION(0x0, "gpio_in"),
100 SUNXI_FUNCTION(0x1, "gpio_out"),
101 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
102 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
103 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
104 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
105 SUNXI_FUNCTION(0x0, "gpio_in"),
106 SUNXI_FUNCTION(0x1, "gpio_out"),
107 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
108 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
109 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
110 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
114 SUNXI_FUNCTION(0x3, "can"), /* TX */
115 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
116 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
117 SUNXI_FUNCTION(0x0, "gpio_in"),
118 SUNXI_FUNCTION(0x1, "gpio_out"),
119 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
120 SUNXI_FUNCTION(0x3, "can"), /* RX */
121 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
122 /* Hole */
123 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
124 SUNXI_FUNCTION(0x0, "gpio_in"),
125 SUNXI_FUNCTION(0x1, "gpio_out"),
126 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
127 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
131 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
135 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
136 SUNXI_FUNCTION(0x0, "gpio_in"),
137 SUNXI_FUNCTION(0x1, "gpio_out"),
138 SUNXI_FUNCTION(0x2, "ir0")), /* TX */
139 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
140 SUNXI_FUNCTION(0x0, "gpio_in"),
141 SUNXI_FUNCTION(0x1, "gpio_out"),
142 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
147 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
148 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out"),
151 SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
152 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
153 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
154 SUNXI_FUNCTION(0x0, "gpio_in"),
155 SUNXI_FUNCTION(0x1, "gpio_out"),
156 SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
157 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
158 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "i2s"), /* DO0 */
162 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
163 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
164 SUNXI_FUNCTION(0x0, "gpio_in"),
165 SUNXI_FUNCTION(0x1, "gpio_out"),
166 SUNXI_FUNCTION(0x2, "i2s")), /* DO1 */
167 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "i2s")), /* DO2 */
171 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
172 SUNXI_FUNCTION(0x0, "gpio_in"),
173 SUNXI_FUNCTION(0x1, "gpio_out"),
174 SUNXI_FUNCTION(0x2, "i2s")), /* DO3 */
175 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
176 SUNXI_FUNCTION(0x0, "gpio_in"),
177 SUNXI_FUNCTION(0x1, "gpio_out"),
178 SUNXI_FUNCTION(0x2, "i2s"), /* DI */
179 SUNXI_FUNCTION(0x3, "ac97")), /* DI */
180 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
181 SUNXI_FUNCTION(0x0, "gpio_in"),
182 SUNXI_FUNCTION(0x1, "gpio_out"),
183 SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
188 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
189 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
190 SUNXI_FUNCTION(0x0, "gpio_in"),
191 SUNXI_FUNCTION(0x1, "gpio_out"),
192 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
193 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
194 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
195 SUNXI_FUNCTION(0x0, "gpio_in"),
196 SUNXI_FUNCTION(0x1, "gpio_out"),
197 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
198 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
199 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
200 SUNXI_FUNCTION(0x0, "gpio_in"),
201 SUNXI_FUNCTION(0x1, "gpio_out"),
202 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
203 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
204 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out"),
207 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
208 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
212 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
213 SUNXI_FUNCTION(0x0, "gpio_in"),
214 SUNXI_FUNCTION(0x1, "gpio_out"),
215 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
216 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
220 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
221 SUNXI_FUNCTION(0x0, "gpio_in"),
222 SUNXI_FUNCTION(0x1, "gpio_out"),
223 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
224 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
225 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
226 SUNXI_FUNCTION(0x0, "gpio_in"),
227 SUNXI_FUNCTION(0x1, "gpio_out"),
228 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
229 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
230 /* Hole */
231 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out"),
234 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
235 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
236 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
237 SUNXI_FUNCTION(0x0, "gpio_in"),
238 SUNXI_FUNCTION(0x1, "gpio_out"),
239 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
240 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
241 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
244 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
245 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
246 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
250 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out"),
253 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
258 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
259 SUNXI_FUNCTION(0x0, "gpio_in"),
260 SUNXI_FUNCTION(0x1, "gpio_out"),
261 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
262 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
263 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
267 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
268 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out"),
271 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
272 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
273 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
274 SUNXI_FUNCTION(0x0, "gpio_in"),
275 SUNXI_FUNCTION(0x1, "gpio_out"),
276 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
277 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
278 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
282 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
283 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
284 SUNXI_FUNCTION(0x0, "gpio_in"),
285 SUNXI_FUNCTION(0x1, "gpio_out"),
286 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
287 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
288 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
289 SUNXI_FUNCTION(0x0, "gpio_in"),
290 SUNXI_FUNCTION(0x1, "gpio_out"),
291 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
292 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
293 SUNXI_FUNCTION(0x0, "gpio_in"),
294 SUNXI_FUNCTION(0x1, "gpio_out"),
295 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
300 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
301 SUNXI_FUNCTION(0x0, "gpio_in"),
302 SUNXI_FUNCTION(0x1, "gpio_out"),
303 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
304 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
305 SUNXI_FUNCTION(0x0, "gpio_in"),
306 SUNXI_FUNCTION(0x1, "gpio_out"),
307 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
308 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out"),
311 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
316 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
317 SUNXI_FUNCTION(0x0, "gpio_in"),
318 SUNXI_FUNCTION(0x1, "gpio_out"),
319 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
320 SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */
321 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
322 SUNXI_FUNCTION(0x0, "gpio_in"),
323 SUNXI_FUNCTION(0x1, "gpio_out"),
324 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
325 SUNXI_FUNCTION(0x3, "spi2")), /* CLK */
326 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
327 SUNXI_FUNCTION(0x0, "gpio_in"),
328 SUNXI_FUNCTION(0x1, "gpio_out"),
329 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
330 SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */
331 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
332 SUNXI_FUNCTION(0x0, "gpio_in"),
333 SUNXI_FUNCTION(0x1, "gpio_out"),
334 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
335 SUNXI_FUNCTION(0x3, "spi2")), /* MISO */
336 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
337 SUNXI_FUNCTION(0x0, "gpio_in"),
338 SUNXI_FUNCTION(0x1, "gpio_out"),
339 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
340 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
341 SUNXI_FUNCTION(0x0, "gpio_in"),
342 SUNXI_FUNCTION(0x1, "gpio_out"),
343 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
344 /* Hole */
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
349 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
351 SUNXI_FUNCTION(0x0, "gpio_in"),
352 SUNXI_FUNCTION(0x1, "gpio_out"),
353 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
354 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
355 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
356 SUNXI_FUNCTION(0x0, "gpio_in"),
357 SUNXI_FUNCTION(0x1, "gpio_out"),
358 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
359 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
364 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
365 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
369 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
370 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
374 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
375 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
376 SUNXI_FUNCTION(0x0, "gpio_in"),
377 SUNXI_FUNCTION(0x1, "gpio_out"),
378 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
379 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
380 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
381 SUNXI_FUNCTION(0x0, "gpio_in"),
382 SUNXI_FUNCTION(0x1, "gpio_out"),
383 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
384 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
385 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
386 SUNXI_FUNCTION(0x0, "gpio_in"),
387 SUNXI_FUNCTION(0x1, "gpio_out"),
388 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
389 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
390 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
394 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
395 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
396 SUNXI_FUNCTION(0x0, "gpio_in"),
397 SUNXI_FUNCTION(0x1, "gpio_out"),
398 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
399 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
400 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
401 SUNXI_FUNCTION(0x0, "gpio_in"),
402 SUNXI_FUNCTION(0x1, "gpio_out"),
403 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
404 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
405 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
406 SUNXI_FUNCTION(0x0, "gpio_in"),
407 SUNXI_FUNCTION(0x1, "gpio_out"),
408 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
409 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
410 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
411 SUNXI_FUNCTION(0x0, "gpio_in"),
412 SUNXI_FUNCTION(0x1, "gpio_out"),
413 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
414 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
415 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out"),
418 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
419 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
420 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
421 SUNXI_FUNCTION(0x0, "gpio_in"),
422 SUNXI_FUNCTION(0x1, "gpio_out"),
423 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
424 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
425 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
426 SUNXI_FUNCTION(0x0, "gpio_in"),
427 SUNXI_FUNCTION(0x1, "gpio_out"),
428 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
429 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
430 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
431 SUNXI_FUNCTION(0x0, "gpio_in"),
432 SUNXI_FUNCTION(0x1, "gpio_out"),
433 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
434 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
435 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
436 SUNXI_FUNCTION(0x0, "gpio_in"),
437 SUNXI_FUNCTION(0x1, "gpio_out"),
438 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
439 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
440 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
441 SUNXI_FUNCTION(0x0, "gpio_in"),
442 SUNXI_FUNCTION(0x1, "gpio_out"),
443 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
444 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
445 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
446 SUNXI_FUNCTION(0x0, "gpio_in"),
447 SUNXI_FUNCTION(0x1, "gpio_out"),
448 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
449 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
450 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
451 SUNXI_FUNCTION(0x0, "gpio_in"),
452 SUNXI_FUNCTION(0x1, "gpio_out"),
453 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
454 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
455 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out"),
458 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
459 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
460 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
461 SUNXI_FUNCTION(0x0, "gpio_in"),
462 SUNXI_FUNCTION(0x1, "gpio_out"),
463 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
464 SUNXI_FUNCTION(0x3, "sim")), /* DET */
465 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
469 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
470 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out"),
473 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
474 SUNXI_FUNCTION(0x3, "sim")), /* RST */
475 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
476 SUNXI_FUNCTION(0x0, "gpio_in"),
477 SUNXI_FUNCTION(0x1, "gpio_out"),
478 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
479 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
480 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
481 SUNXI_FUNCTION(0x0, "gpio_in"),
482 SUNXI_FUNCTION(0x1, "gpio_out"),
483 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
484 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
485 /* Hole */
486 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
487 SUNXI_FUNCTION(0x0, "gpio_in"),
488 SUNXI_FUNCTION(0x1, "gpio_out"),
489 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
490 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
491 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
492 SUNXI_FUNCTION(0x0, "gpio_in"),
493 SUNXI_FUNCTION(0x1, "gpio_out"),
494 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
495 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
496 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
497 SUNXI_FUNCTION(0x0, "gpio_in"),
498 SUNXI_FUNCTION(0x1, "gpio_out"),
499 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
500 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
501 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
505 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
506 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out"),
509 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
510 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
511 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
515 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
516 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
517 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
518 SUNXI_FUNCTION(0x0, "gpio_in"),
519 SUNXI_FUNCTION(0x1, "gpio_out"),
520 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
521 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
522 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
523 SUNXI_FUNCTION(0x0, "gpio_in"),
524 SUNXI_FUNCTION(0x1, "gpio_out"),
525 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
526 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
527 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
528 SUNXI_FUNCTION(0x0, "gpio_in"),
529 SUNXI_FUNCTION(0x1, "gpio_out"),
530 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
531 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
532 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
533 SUNXI_FUNCTION(0x0, "gpio_in"),
534 SUNXI_FUNCTION(0x1, "gpio_out"),
535 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
536 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
537 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
538 SUNXI_FUNCTION(0x0, "gpio_in"),
539 SUNXI_FUNCTION(0x1, "gpio_out"),
540 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
541 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
543 SUNXI_FUNCTION(0x0, "gpio_in"),
544 SUNXI_FUNCTION(0x1, "gpio_out"),
545 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
546 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
547 /* Hole */
548 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
549 SUNXI_FUNCTION(0x0, "gpio_in"),
550 SUNXI_FUNCTION(0x1, "gpio_out"),
551 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
552 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
553 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
554 SUNXI_FUNCTION(0x0, "gpio_in"),
555 SUNXI_FUNCTION(0x1, "gpio_out"),
556 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
557 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
558 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
559 SUNXI_FUNCTION(0x0, "gpio_in"),
560 SUNXI_FUNCTION(0x1, "gpio_out"),
561 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
562 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
563 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
566 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
567 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
568 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
569 SUNXI_FUNCTION(0x0, "gpio_in"),
570 SUNXI_FUNCTION(0x1, "gpio_out"),
571 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
572 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
573 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out"),
576 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
577 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
578 /* Hole */
579 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
580 SUNXI_FUNCTION(0x0, "gpio_in"),
581 SUNXI_FUNCTION(0x1, "gpio_out"),
582 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
583 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
584 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
585 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
586 SUNXI_FUNCTION(0x0, "gpio_in"),
587 SUNXI_FUNCTION(0x1, "gpio_out"),
588 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
589 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
590 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
591 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
592 SUNXI_FUNCTION(0x0, "gpio_in"),
593 SUNXI_FUNCTION(0x1, "gpio_out"),
594 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
595 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
596 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
597 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
598 SUNXI_FUNCTION(0x0, "gpio_in"),
599 SUNXI_FUNCTION(0x1, "gpio_out"),
600 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
601 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
602 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
603 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
604 SUNXI_FUNCTION(0x0, "gpio_in"),
605 SUNXI_FUNCTION(0x1, "gpio_out"),
606 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
607 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
608 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
609 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
610 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
611 SUNXI_FUNCTION(0x0, "gpio_in"),
612 SUNXI_FUNCTION(0x1, "gpio_out"),
613 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
614 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
615 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
616 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
617 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
618 SUNXI_FUNCTION(0x0, "gpio_in"),
619 SUNXI_FUNCTION(0x1, "gpio_out"),
620 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
621 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
622 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
623 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
624 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
625 SUNXI_FUNCTION(0x0, "gpio_in"),
626 SUNXI_FUNCTION(0x1, "gpio_out"),
627 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
628 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
629 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
630 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
631 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
632 SUNXI_FUNCTION(0x0, "gpio_in"),
633 SUNXI_FUNCTION(0x1, "gpio_out"),
634 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
635 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
636 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
637 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
638 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
639 SUNXI_FUNCTION(0x0, "gpio_in"),
640 SUNXI_FUNCTION(0x1, "gpio_out"),
641 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
642 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
643 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
644 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
645 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
646 SUNXI_FUNCTION(0x0, "gpio_in"),
647 SUNXI_FUNCTION(0x1, "gpio_out"),
648 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
649 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
650 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
651 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
652 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
653 SUNXI_FUNCTION(0x0, "gpio_in"),
654 SUNXI_FUNCTION(0x1, "gpio_out"),
655 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
656 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
657 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
658 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
659 /* Hole */
660 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
661 SUNXI_FUNCTION(0x0, "gpio_in"),
662 SUNXI_FUNCTION(0x1, "gpio_out"),
663 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
664 SUNXI_FUNCTION(0x3, "pata"), /* ATAA0 */
665 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
666 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
667 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
668 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
669 SUNXI_FUNCTION(0x0, "gpio_in"),
670 SUNXI_FUNCTION(0x1, "gpio_out"),
671 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
672 SUNXI_FUNCTION(0x3, "pata"), /* ATAA1 */
673 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
674 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
675 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
676 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
677 SUNXI_FUNCTION(0x0, "gpio_in"),
678 SUNXI_FUNCTION(0x1, "gpio_out"),
679 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
680 SUNXI_FUNCTION(0x3, "pata"), /* ATAA2 */
681 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
682 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
683 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
684 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
685 SUNXI_FUNCTION(0x0, "gpio_in"),
686 SUNXI_FUNCTION(0x1, "gpio_out"),
687 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
688 SUNXI_FUNCTION(0x3, "pata"), /* ATAIRQ */
689 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
690 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
691 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
692 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
693 SUNXI_FUNCTION(0x0, "gpio_in"),
694 SUNXI_FUNCTION(0x1, "gpio_out"),
695 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
696 SUNXI_FUNCTION(0x3, "pata"), /* ATAD0 */
697 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
698 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
699 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
700 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
701 SUNXI_FUNCTION(0x0, "gpio_in"),
702 SUNXI_FUNCTION(0x1, "gpio_out"),
703 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
704 SUNXI_FUNCTION(0x3, "pata"), /* ATAD1 */
705 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
706 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
707 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
708 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
709 SUNXI_FUNCTION(0x0, "gpio_in"),
710 SUNXI_FUNCTION(0x1, "gpio_out"),
711 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
712 SUNXI_FUNCTION(0x3, "pata"), /* ATAD2 */
713 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
714 SUNXI_FUNCTION(0x5, "ms"), /* BS */
715 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
716 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
717 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
718 SUNXI_FUNCTION(0x0, "gpio_in"),
719 SUNXI_FUNCTION(0x1, "gpio_out"),
720 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
721 SUNXI_FUNCTION(0x3, "pata"), /* ATAD3 */
722 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
723 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
724 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
725 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
726 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
727 SUNXI_FUNCTION(0x0, "gpio_in"),
728 SUNXI_FUNCTION(0x1, "gpio_out"),
729 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
730 SUNXI_FUNCTION(0x3, "pata"), /* ATAD4 */
731 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
732 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
733 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
734 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
735 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
736 SUNXI_FUNCTION(0x0, "gpio_in"),
737 SUNXI_FUNCTION(0x1, "gpio_out"),
738 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
739 SUNXI_FUNCTION(0x3, "pata"), /* ATAD5 */
740 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
741 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
742 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
743 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
744 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
745 SUNXI_FUNCTION(0x0, "gpio_in"),
746 SUNXI_FUNCTION(0x1, "gpio_out"),
747 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
748 SUNXI_FUNCTION(0x3, "pata"), /* ATAD6 */
749 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
750 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
751 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
752 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
753 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
754 SUNXI_FUNCTION(0x0, "gpio_in"),
755 SUNXI_FUNCTION(0x1, "gpio_out"),
756 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
757 SUNXI_FUNCTION(0x3, "pata"), /* ATAD7 */
758 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
759 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
760 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
761 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
762 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
763 SUNXI_FUNCTION(0x0, "gpio_in"),
764 SUNXI_FUNCTION(0x1, "gpio_out"),
765 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
766 SUNXI_FUNCTION(0x3, "pata"), /* ATAD8 */
767 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
768 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
769 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
770 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
774 SUNXI_FUNCTION(0x3, "pata"), /* ATAD9 */
775 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
776 SUNXI_FUNCTION(0x5, "sim"), /* RST */
777 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
778 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
779 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
780 SUNXI_FUNCTION(0x0, "gpio_in"),
781 SUNXI_FUNCTION(0x1, "gpio_out"),
782 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
783 SUNXI_FUNCTION(0x3, "pata"), /* ATAD10 */
784 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
785 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
786 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
787 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
788 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
789 SUNXI_FUNCTION(0x0, "gpio_in"),
790 SUNXI_FUNCTION(0x1, "gpio_out"),
791 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
792 SUNXI_FUNCTION(0x3, "pata"), /* ATAD11 */
793 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
794 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
795 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
796 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
797 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
798 SUNXI_FUNCTION(0x0, "gpio_in"),
799 SUNXI_FUNCTION(0x1, "gpio_out"),
800 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
801 SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */
802 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
803 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
804 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out"),
808 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
809 SUNXI_FUNCTION(0x3, "pata"), /* ATAD13 */
810 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
811 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
812 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
813 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out"),
817 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
818 SUNXI_FUNCTION(0x3, "pata"), /* ATAD14 */
819 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
820 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
821 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
822 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out"),
826 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
827 SUNXI_FUNCTION(0x3, "pata"), /* ATAD15 */
828 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
829 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
830 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
831 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
832 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
833 SUNXI_FUNCTION(0x0, "gpio_in"),
834 SUNXI_FUNCTION(0x1, "gpio_out"),
835 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
836 SUNXI_FUNCTION(0x3, "pata"), /* ATAOE */
837 SUNXI_FUNCTION(0x4, "can"), /* TX */
838 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
839 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
840 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
841 SUNXI_FUNCTION(0x0, "gpio_in"),
842 SUNXI_FUNCTION(0x1, "gpio_out"),
843 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
844 SUNXI_FUNCTION(0x3, "pata"), /* ATADREQ */
845 SUNXI_FUNCTION(0x4, "can"), /* RX */
846 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
847 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
848 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
849 SUNXI_FUNCTION(0x0, "gpio_in"),
850 SUNXI_FUNCTION(0x1, "gpio_out"),
851 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
852 SUNXI_FUNCTION(0x3, "pata"), /* ATADACK */
853 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
854 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
855 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
856 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
857 SUNXI_FUNCTION(0x0, "gpio_in"),
858 SUNXI_FUNCTION(0x1, "gpio_out"),
859 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
860 SUNXI_FUNCTION(0x3, "pata"), /* ATACS0 */
861 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
862 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
863 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
864 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
865 SUNXI_FUNCTION(0x0, "gpio_in"),
866 SUNXI_FUNCTION(0x1, "gpio_out"),
867 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
868 SUNXI_FUNCTION(0x3, "pata"), /* ATACS1 */
869 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
870 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
871 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
872 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
873 SUNXI_FUNCTION(0x0, "gpio_in"),
874 SUNXI_FUNCTION(0x1, "gpio_out"),
875 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
876 SUNXI_FUNCTION(0x3, "pata"), /* ATAIORDY */
877 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
878 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
879 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
880 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
881 SUNXI_FUNCTION(0x0, "gpio_in"),
882 SUNXI_FUNCTION(0x1, "gpio_out"),
883 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
884 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOR */
885 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
886 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
887 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
888 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
889 SUNXI_FUNCTION(0x0, "gpio_in"),
890 SUNXI_FUNCTION(0x1, "gpio_out"),
891 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
892 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOW */
893 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
894 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
895 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
896 /* Hole */
897 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
898 SUNXI_FUNCTION(0x0, "gpio_in"),
899 SUNXI_FUNCTION(0x1, "gpio_out")),
900 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
901 SUNXI_FUNCTION(0x0, "gpio_in"),
902 SUNXI_FUNCTION(0x1, "gpio_out")),
903 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
904 SUNXI_FUNCTION(0x0, "gpio_in"),
905 SUNXI_FUNCTION(0x1, "gpio_out")),
906 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
907 SUNXI_FUNCTION(0x0, "gpio_in"),
908 SUNXI_FUNCTION(0x1, "gpio_out"),
909 SUNXI_FUNCTION(0x2, "pwm")), /* PWM1 */
910 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
911 SUNXI_FUNCTION(0x0, "gpio_in"),
912 SUNXI_FUNCTION(0x1, "gpio_out"),
913 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
914 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
915 SUNXI_FUNCTION(0x0, "gpio_in"),
916 SUNXI_FUNCTION(0x1, "gpio_out"),
917 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
918 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
919 SUNXI_FUNCTION(0x0, "gpio_in"),
920 SUNXI_FUNCTION(0x1, "gpio_out"),
921 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
922 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
923 SUNXI_FUNCTION(0x0, "gpio_in"),
924 SUNXI_FUNCTION(0x1, "gpio_out"),
925 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
926 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
927 SUNXI_FUNCTION(0x0, "gpio_in"),
928 SUNXI_FUNCTION(0x1, "gpio_out"),
929 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
930 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
931 SUNXI_FUNCTION(0x0, "gpio_in"),
932 SUNXI_FUNCTION(0x1, "gpio_out"),
933 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
934 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
935 SUNXI_FUNCTION(0x0, "gpio_in"),
936 SUNXI_FUNCTION(0x1, "gpio_out"),
937 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
938 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
939 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
940 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
941 SUNXI_FUNCTION(0x0, "gpio_in"),
942 SUNXI_FUNCTION(0x1, "gpio_out"),
943 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
944 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
945 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
946 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
947 SUNXI_FUNCTION(0x0, "gpio_in"),
948 SUNXI_FUNCTION(0x1, "gpio_out"),
949 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
950 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
951 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
952 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
953 SUNXI_FUNCTION(0x0, "gpio_in"),
954 SUNXI_FUNCTION(0x1, "gpio_out"),
955 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
956 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
957 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
958 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
959 SUNXI_FUNCTION(0x0, "gpio_in"),
960 SUNXI_FUNCTION(0x1, "gpio_out"),
961 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
962 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
963 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
964 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
965 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
966 SUNXI_FUNCTION(0x0, "gpio_in"),
967 SUNXI_FUNCTION(0x1, "gpio_out"),
968 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
969 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
970 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
971 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
972 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
973 SUNXI_FUNCTION(0x0, "gpio_in"),
974 SUNXI_FUNCTION(0x1, "gpio_out"),
975 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
976 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
977 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
978 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
979 SUNXI_FUNCTION(0x0, "gpio_in"),
980 SUNXI_FUNCTION(0x1, "gpio_out"),
981 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
982 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
983 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
984 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
985 SUNXI_FUNCTION(0x0, "gpio_in"),
986 SUNXI_FUNCTION(0x1, "gpio_out"),
987 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
988 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
989 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
990 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
991 SUNXI_FUNCTION(0x0, "gpio_in"),
992 SUNXI_FUNCTION(0x1, "gpio_out"),
993 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
994 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
995 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
996 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
997 SUNXI_FUNCTION(0x0, "gpio_in"),
998 SUNXI_FUNCTION(0x1, "gpio_out"),
999 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
1000 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
1001 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1002 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1003 SUNXI_FUNCTION(0x0, "gpio_in"),
1004 SUNXI_FUNCTION(0x1, "gpio_out"),
1005 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1006 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1007 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1008};
1009
1010static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
1011 .pins = sun4i_a10_pins,
1012 .npins = ARRAY_SIZE(sun4i_a10_pins),
1013};
1014
1015static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
1016{
1017 return sunxi_pinctrl_init(pdev,
1018 &sun4i_a10_pinctrl_data);
1019}
1020
1021static struct of_device_id sun4i_a10_pinctrl_match[] = {
1022 { .compatible = "allwinner,sun4i-a10-pinctrl", },
1023 {}
1024};
1025MODULE_DEVICE_TABLE(of, sun4i_a10_pinctrl_match);
1026
1027static struct platform_driver sun4i_a10_pinctrl_driver = {
1028 .probe = sun4i_a10_pinctrl_probe,
1029 .driver = {
1030 .name = "sun4i-pinctrl",
1031 .owner = THIS_MODULE,
1032 .of_match_table = sun4i_a10_pinctrl_match,
1033 },
1034};
1035module_platform_driver(sun4i_a10_pinctrl_driver);
1036
1037MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
1038MODULE_DESCRIPTION("Allwinner A10 pinctrl driver");
1039MODULE_LICENSE("GPL");
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h b/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
index e1ea6d8345b0..7adab29b322e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
@@ -15,995 +15,6 @@
15 15
16#include "pinctrl-sunxi.h" 16#include "pinctrl-sunxi.h"
17 17
18static const struct sunxi_desc_pin sun4i_a10_pins[] = {
19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
20 SUNXI_FUNCTION(0x0, "gpio_in"),
21 SUNXI_FUNCTION(0x1, "gpio_out"),
22 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
23 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
24 SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
29 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
30 SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out"),
34 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
35 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
36 SUNXI_FUNCTION(0x4, "uart2")), /* TX */
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
38 SUNXI_FUNCTION(0x0, "gpio_in"),
39 SUNXI_FUNCTION(0x1, "gpio_out"),
40 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
41 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
42 SUNXI_FUNCTION(0x4, "uart2")), /* RX */
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out"),
46 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
47 SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
49 SUNXI_FUNCTION(0x0, "gpio_in"),
50 SUNXI_FUNCTION(0x1, "gpio_out"),
51 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
52 SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
57 SUNXI_FUNCTION(0x3, "spi3")), /* CLK */
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
59 SUNXI_FUNCTION(0x0, "gpio_in"),
60 SUNXI_FUNCTION(0x1, "gpio_out"),
61 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
62 SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
64 SUNXI_FUNCTION(0x0, "gpio_in"),
65 SUNXI_FUNCTION(0x1, "gpio_out"),
66 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
67 SUNXI_FUNCTION(0x3, "spi3")), /* MISO */
68 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
69 SUNXI_FUNCTION(0x0, "gpio_in"),
70 SUNXI_FUNCTION(0x1, "gpio_out"),
71 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
72 SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */
73 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
74 SUNXI_FUNCTION(0x0, "gpio_in"),
75 SUNXI_FUNCTION(0x1, "gpio_out"),
76 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
77 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
78 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
79 SUNXI_FUNCTION(0x0, "gpio_in"),
80 SUNXI_FUNCTION(0x1, "gpio_out"),
81 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
82 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
83 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
84 SUNXI_FUNCTION(0x0, "gpio_in"),
85 SUNXI_FUNCTION(0x1, "gpio_out"),
86 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
87 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
88 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
89 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
93 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
94 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
95 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
96 SUNXI_FUNCTION(0x0, "gpio_in"),
97 SUNXI_FUNCTION(0x1, "gpio_out"),
98 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
99 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
100 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
101 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
102 SUNXI_FUNCTION(0x0, "gpio_in"),
103 SUNXI_FUNCTION(0x1, "gpio_out"),
104 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
105 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
106 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
107 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
111 SUNXI_FUNCTION(0x3, "can"), /* TX */
112 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
113 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
117 SUNXI_FUNCTION(0x3, "can"), /* RX */
118 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
119 /* Hole */
120 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out"),
123 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
124 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
128 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
129 SUNXI_FUNCTION(0x0, "gpio_in"),
130 SUNXI_FUNCTION(0x1, "gpio_out"),
131 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
132 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out"),
135 SUNXI_FUNCTION(0x2, "ir0")), /* TX */
136 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
137 SUNXI_FUNCTION(0x0, "gpio_in"),
138 SUNXI_FUNCTION(0x1, "gpio_out"),
139 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
140 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
141 SUNXI_FUNCTION(0x0, "gpio_in"),
142 SUNXI_FUNCTION(0x1, "gpio_out"),
143 SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
144 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
145 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
146 SUNXI_FUNCTION(0x0, "gpio_in"),
147 SUNXI_FUNCTION(0x1, "gpio_out"),
148 SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
149 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
150 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
151 SUNXI_FUNCTION(0x0, "gpio_in"),
152 SUNXI_FUNCTION(0x1, "gpio_out"),
153 SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
154 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "i2s"), /* DO0 */
159 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
160 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "i2s")), /* DO1 */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "i2s")), /* DO2 */
168 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
169 SUNXI_FUNCTION(0x0, "gpio_in"),
170 SUNXI_FUNCTION(0x1, "gpio_out"),
171 SUNXI_FUNCTION(0x2, "i2s")), /* DO3 */
172 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
173 SUNXI_FUNCTION(0x0, "gpio_in"),
174 SUNXI_FUNCTION(0x1, "gpio_out"),
175 SUNXI_FUNCTION(0x2, "i2s"), /* DI */
176 SUNXI_FUNCTION(0x3, "ac97")), /* DI */
177 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
178 SUNXI_FUNCTION(0x0, "gpio_in"),
179 SUNXI_FUNCTION(0x1, "gpio_out"),
180 SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */
181 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
185 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
186 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
187 SUNXI_FUNCTION(0x0, "gpio_in"),
188 SUNXI_FUNCTION(0x1, "gpio_out"),
189 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
190 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
191 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
192 SUNXI_FUNCTION(0x0, "gpio_in"),
193 SUNXI_FUNCTION(0x1, "gpio_out"),
194 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
195 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
196 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
199 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
200 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
201 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out"),
204 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
205 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
206 SUNXI_FUNCTION(0x0, "gpio_in"),
207 SUNXI_FUNCTION(0x1, "gpio_out"),
208 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
209 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
210 SUNXI_FUNCTION(0x0, "gpio_in"),
211 SUNXI_FUNCTION(0x1, "gpio_out"),
212 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
213 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
217 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
218 SUNXI_FUNCTION(0x0, "gpio_in"),
219 SUNXI_FUNCTION(0x1, "gpio_out"),
220 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
221 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
222 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
223 SUNXI_FUNCTION(0x0, "gpio_in"),
224 SUNXI_FUNCTION(0x1, "gpio_out"),
225 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
226 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
227 /* Hole */
228 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
231 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
232 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
233 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
234 SUNXI_FUNCTION(0x0, "gpio_in"),
235 SUNXI_FUNCTION(0x1, "gpio_out"),
236 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
237 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
238 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
239 SUNXI_FUNCTION(0x0, "gpio_in"),
240 SUNXI_FUNCTION(0x1, "gpio_out"),
241 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
242 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
243 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
244 SUNXI_FUNCTION(0x0, "gpio_in"),
245 SUNXI_FUNCTION(0x1, "gpio_out"),
246 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
247 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
248 SUNXI_FUNCTION(0x0, "gpio_in"),
249 SUNXI_FUNCTION(0x1, "gpio_out"),
250 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
251 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
252 SUNXI_FUNCTION(0x0, "gpio_in"),
253 SUNXI_FUNCTION(0x1, "gpio_out"),
254 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
255 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
256 SUNXI_FUNCTION(0x0, "gpio_in"),
257 SUNXI_FUNCTION(0x1, "gpio_out"),
258 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
259 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
260 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
261 SUNXI_FUNCTION(0x0, "gpio_in"),
262 SUNXI_FUNCTION(0x1, "gpio_out"),
263 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
264 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
265 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
266 SUNXI_FUNCTION(0x0, "gpio_in"),
267 SUNXI_FUNCTION(0x1, "gpio_out"),
268 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
269 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
270 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
271 SUNXI_FUNCTION(0x0, "gpio_in"),
272 SUNXI_FUNCTION(0x1, "gpio_out"),
273 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
274 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
275 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
276 SUNXI_FUNCTION(0x0, "gpio_in"),
277 SUNXI_FUNCTION(0x1, "gpio_out"),
278 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
279 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
280 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
281 SUNXI_FUNCTION(0x0, "gpio_in"),
282 SUNXI_FUNCTION(0x1, "gpio_out"),
283 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
284 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
285 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
286 SUNXI_FUNCTION(0x0, "gpio_in"),
287 SUNXI_FUNCTION(0x1, "gpio_out"),
288 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
289 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
290 SUNXI_FUNCTION(0x0, "gpio_in"),
291 SUNXI_FUNCTION(0x1, "gpio_out"),
292 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
293 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
294 SUNXI_FUNCTION(0x0, "gpio_in"),
295 SUNXI_FUNCTION(0x1, "gpio_out"),
296 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
297 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
298 SUNXI_FUNCTION(0x0, "gpio_in"),
299 SUNXI_FUNCTION(0x1, "gpio_out"),
300 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
301 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
302 SUNXI_FUNCTION(0x0, "gpio_in"),
303 SUNXI_FUNCTION(0x1, "gpio_out"),
304 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
305 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
309 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
310 SUNXI_FUNCTION(0x0, "gpio_in"),
311 SUNXI_FUNCTION(0x1, "gpio_out"),
312 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
313 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
314 SUNXI_FUNCTION(0x0, "gpio_in"),
315 SUNXI_FUNCTION(0x1, "gpio_out"),
316 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
317 SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */
318 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
319 SUNXI_FUNCTION(0x0, "gpio_in"),
320 SUNXI_FUNCTION(0x1, "gpio_out"),
321 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
322 SUNXI_FUNCTION(0x3, "spi2")), /* CLK */
323 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out"),
326 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
327 SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */
328 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
329 SUNXI_FUNCTION(0x0, "gpio_in"),
330 SUNXI_FUNCTION(0x1, "gpio_out"),
331 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
332 SUNXI_FUNCTION(0x3, "spi2")), /* MISO */
333 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
334 SUNXI_FUNCTION(0x0, "gpio_in"),
335 SUNXI_FUNCTION(0x1, "gpio_out"),
336 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
341 /* Hole */
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out"),
345 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
346 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
351 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
353 SUNXI_FUNCTION(0x0, "gpio_in"),
354 SUNXI_FUNCTION(0x1, "gpio_out"),
355 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
356 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out"),
360 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
361 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
362 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
363 SUNXI_FUNCTION(0x0, "gpio_in"),
364 SUNXI_FUNCTION(0x1, "gpio_out"),
365 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
366 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out"),
370 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
371 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
372 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
373 SUNXI_FUNCTION(0x0, "gpio_in"),
374 SUNXI_FUNCTION(0x1, "gpio_out"),
375 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
376 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
377 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
381 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
382 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
383 SUNXI_FUNCTION(0x0, "gpio_in"),
384 SUNXI_FUNCTION(0x1, "gpio_out"),
385 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
386 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
387 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out"),
390 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
391 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
392 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
393 SUNXI_FUNCTION(0x0, "gpio_in"),
394 SUNXI_FUNCTION(0x1, "gpio_out"),
395 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
396 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
397 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
398 SUNXI_FUNCTION(0x0, "gpio_in"),
399 SUNXI_FUNCTION(0x1, "gpio_out"),
400 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
401 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
402 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
403 SUNXI_FUNCTION(0x0, "gpio_in"),
404 SUNXI_FUNCTION(0x1, "gpio_out"),
405 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
406 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
407 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
408 SUNXI_FUNCTION(0x0, "gpio_in"),
409 SUNXI_FUNCTION(0x1, "gpio_out"),
410 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
411 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
412 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
413 SUNXI_FUNCTION(0x0, "gpio_in"),
414 SUNXI_FUNCTION(0x1, "gpio_out"),
415 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
416 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
417 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
418 SUNXI_FUNCTION(0x0, "gpio_in"),
419 SUNXI_FUNCTION(0x1, "gpio_out"),
420 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
421 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
422 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
423 SUNXI_FUNCTION(0x0, "gpio_in"),
424 SUNXI_FUNCTION(0x1, "gpio_out"),
425 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
426 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
427 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
428 SUNXI_FUNCTION(0x0, "gpio_in"),
429 SUNXI_FUNCTION(0x1, "gpio_out"),
430 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
431 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
432 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
433 SUNXI_FUNCTION(0x0, "gpio_in"),
434 SUNXI_FUNCTION(0x1, "gpio_out"),
435 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
436 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
437 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
438 SUNXI_FUNCTION(0x0, "gpio_in"),
439 SUNXI_FUNCTION(0x1, "gpio_out"),
440 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
441 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
442 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
443 SUNXI_FUNCTION(0x0, "gpio_in"),
444 SUNXI_FUNCTION(0x1, "gpio_out"),
445 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
446 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
447 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
448 SUNXI_FUNCTION(0x0, "gpio_in"),
449 SUNXI_FUNCTION(0x1, "gpio_out"),
450 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
451 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
452 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
453 SUNXI_FUNCTION(0x0, "gpio_in"),
454 SUNXI_FUNCTION(0x1, "gpio_out"),
455 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
456 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
457 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
458 SUNXI_FUNCTION(0x0, "gpio_in"),
459 SUNXI_FUNCTION(0x1, "gpio_out"),
460 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
461 SUNXI_FUNCTION(0x3, "sim")), /* DET */
462 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
463 SUNXI_FUNCTION(0x0, "gpio_in"),
464 SUNXI_FUNCTION(0x1, "gpio_out"),
465 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
466 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
467 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
468 SUNXI_FUNCTION(0x0, "gpio_in"),
469 SUNXI_FUNCTION(0x1, "gpio_out"),
470 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
471 SUNXI_FUNCTION(0x3, "sim")), /* RST */
472 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
473 SUNXI_FUNCTION(0x0, "gpio_in"),
474 SUNXI_FUNCTION(0x1, "gpio_out"),
475 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
476 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
477 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
481 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
482 /* Hole */
483 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
484 SUNXI_FUNCTION(0x0, "gpio_in"),
485 SUNXI_FUNCTION(0x1, "gpio_out"),
486 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
487 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
488 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
489 SUNXI_FUNCTION(0x0, "gpio_in"),
490 SUNXI_FUNCTION(0x1, "gpio_out"),
491 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
492 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
493 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
494 SUNXI_FUNCTION(0x0, "gpio_in"),
495 SUNXI_FUNCTION(0x1, "gpio_out"),
496 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
497 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
498 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
499 SUNXI_FUNCTION(0x0, "gpio_in"),
500 SUNXI_FUNCTION(0x1, "gpio_out"),
501 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
502 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
503 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
504 SUNXI_FUNCTION(0x0, "gpio_in"),
505 SUNXI_FUNCTION(0x1, "gpio_out"),
506 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
507 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
508 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
509 SUNXI_FUNCTION(0x0, "gpio_in"),
510 SUNXI_FUNCTION(0x1, "gpio_out"),
511 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
512 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
513 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
514 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
515 SUNXI_FUNCTION(0x0, "gpio_in"),
516 SUNXI_FUNCTION(0x1, "gpio_out"),
517 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
518 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out"),
522 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
523 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
524 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
525 SUNXI_FUNCTION(0x0, "gpio_in"),
526 SUNXI_FUNCTION(0x1, "gpio_out"),
527 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
528 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
529 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
530 SUNXI_FUNCTION(0x0, "gpio_in"),
531 SUNXI_FUNCTION(0x1, "gpio_out"),
532 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
533 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
534 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out"),
537 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
538 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
543 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
544 /* Hole */
545 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
546 SUNXI_FUNCTION(0x0, "gpio_in"),
547 SUNXI_FUNCTION(0x1, "gpio_out"),
548 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
549 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
550 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
551 SUNXI_FUNCTION(0x0, "gpio_in"),
552 SUNXI_FUNCTION(0x1, "gpio_out"),
553 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
554 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
555 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
556 SUNXI_FUNCTION(0x0, "gpio_in"),
557 SUNXI_FUNCTION(0x1, "gpio_out"),
558 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
559 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
560 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
561 SUNXI_FUNCTION(0x0, "gpio_in"),
562 SUNXI_FUNCTION(0x1, "gpio_out"),
563 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
564 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
565 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
566 SUNXI_FUNCTION(0x0, "gpio_in"),
567 SUNXI_FUNCTION(0x1, "gpio_out"),
568 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
569 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
570 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
571 SUNXI_FUNCTION(0x0, "gpio_in"),
572 SUNXI_FUNCTION(0x1, "gpio_out"),
573 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
574 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
575 /* Hole */
576 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
577 SUNXI_FUNCTION(0x0, "gpio_in"),
578 SUNXI_FUNCTION(0x1, "gpio_out"),
579 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
580 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
581 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
582 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
583 SUNXI_FUNCTION(0x0, "gpio_in"),
584 SUNXI_FUNCTION(0x1, "gpio_out"),
585 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
586 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
587 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
588 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
589 SUNXI_FUNCTION(0x0, "gpio_in"),
590 SUNXI_FUNCTION(0x1, "gpio_out"),
591 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
592 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
593 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
594 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
595 SUNXI_FUNCTION(0x0, "gpio_in"),
596 SUNXI_FUNCTION(0x1, "gpio_out"),
597 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
598 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
599 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
600 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
601 SUNXI_FUNCTION(0x0, "gpio_in"),
602 SUNXI_FUNCTION(0x1, "gpio_out"),
603 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
604 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
605 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
606 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
607 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
608 SUNXI_FUNCTION(0x0, "gpio_in"),
609 SUNXI_FUNCTION(0x1, "gpio_out"),
610 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
611 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
612 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
613 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
614 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
615 SUNXI_FUNCTION(0x0, "gpio_in"),
616 SUNXI_FUNCTION(0x1, "gpio_out"),
617 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
618 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
619 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
620 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
621 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
622 SUNXI_FUNCTION(0x0, "gpio_in"),
623 SUNXI_FUNCTION(0x1, "gpio_out"),
624 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
625 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
626 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
627 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
628 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
629 SUNXI_FUNCTION(0x0, "gpio_in"),
630 SUNXI_FUNCTION(0x1, "gpio_out"),
631 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
632 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
633 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
634 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
635 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
636 SUNXI_FUNCTION(0x0, "gpio_in"),
637 SUNXI_FUNCTION(0x1, "gpio_out"),
638 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
639 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
640 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
641 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
642 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
643 SUNXI_FUNCTION(0x0, "gpio_in"),
644 SUNXI_FUNCTION(0x1, "gpio_out"),
645 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
646 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
647 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
648 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
649 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
650 SUNXI_FUNCTION(0x0, "gpio_in"),
651 SUNXI_FUNCTION(0x1, "gpio_out"),
652 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
653 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
654 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
655 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
656 /* Hole */
657 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
658 SUNXI_FUNCTION(0x0, "gpio_in"),
659 SUNXI_FUNCTION(0x1, "gpio_out"),
660 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
661 SUNXI_FUNCTION(0x3, "pata"), /* ATAA0 */
662 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
663 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
664 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
665 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
666 SUNXI_FUNCTION(0x0, "gpio_in"),
667 SUNXI_FUNCTION(0x1, "gpio_out"),
668 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
669 SUNXI_FUNCTION(0x3, "pata"), /* ATAA1 */
670 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
671 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
672 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
673 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
674 SUNXI_FUNCTION(0x0, "gpio_in"),
675 SUNXI_FUNCTION(0x1, "gpio_out"),
676 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
677 SUNXI_FUNCTION(0x3, "pata"), /* ATAA2 */
678 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
679 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
680 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
681 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
682 SUNXI_FUNCTION(0x0, "gpio_in"),
683 SUNXI_FUNCTION(0x1, "gpio_out"),
684 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
685 SUNXI_FUNCTION(0x3, "pata"), /* ATAIRQ */
686 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
687 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
688 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
689 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
690 SUNXI_FUNCTION(0x0, "gpio_in"),
691 SUNXI_FUNCTION(0x1, "gpio_out"),
692 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
693 SUNXI_FUNCTION(0x3, "pata"), /* ATAD0 */
694 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
695 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
696 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
697 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
698 SUNXI_FUNCTION(0x0, "gpio_in"),
699 SUNXI_FUNCTION(0x1, "gpio_out"),
700 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
701 SUNXI_FUNCTION(0x3, "pata"), /* ATAD1 */
702 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
703 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
704 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
705 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
706 SUNXI_FUNCTION(0x0, "gpio_in"),
707 SUNXI_FUNCTION(0x1, "gpio_out"),
708 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
709 SUNXI_FUNCTION(0x3, "pata"), /* ATAD2 */
710 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
711 SUNXI_FUNCTION(0x5, "ms"), /* BS */
712 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
713 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
714 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
715 SUNXI_FUNCTION(0x0, "gpio_in"),
716 SUNXI_FUNCTION(0x1, "gpio_out"),
717 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
718 SUNXI_FUNCTION(0x3, "pata"), /* ATAD3 */
719 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
720 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
721 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
722 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
723 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
724 SUNXI_FUNCTION(0x0, "gpio_in"),
725 SUNXI_FUNCTION(0x1, "gpio_out"),
726 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
727 SUNXI_FUNCTION(0x3, "pata"), /* ATAD4 */
728 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
729 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
730 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
731 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
732 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
733 SUNXI_FUNCTION(0x0, "gpio_in"),
734 SUNXI_FUNCTION(0x1, "gpio_out"),
735 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
736 SUNXI_FUNCTION(0x3, "pata"), /* ATAD5 */
737 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
738 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
739 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
740 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
741 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
742 SUNXI_FUNCTION(0x0, "gpio_in"),
743 SUNXI_FUNCTION(0x1, "gpio_out"),
744 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
745 SUNXI_FUNCTION(0x3, "pata"), /* ATAD6 */
746 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
747 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
748 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
749 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
750 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
751 SUNXI_FUNCTION(0x0, "gpio_in"),
752 SUNXI_FUNCTION(0x1, "gpio_out"),
753 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
754 SUNXI_FUNCTION(0x3, "pata"), /* ATAD7 */
755 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
756 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
757 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
758 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
759 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
760 SUNXI_FUNCTION(0x0, "gpio_in"),
761 SUNXI_FUNCTION(0x1, "gpio_out"),
762 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
763 SUNXI_FUNCTION(0x3, "pata"), /* ATAD8 */
764 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
765 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
766 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
767 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
768 SUNXI_FUNCTION(0x0, "gpio_in"),
769 SUNXI_FUNCTION(0x1, "gpio_out"),
770 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
771 SUNXI_FUNCTION(0x3, "pata"), /* ATAD9 */
772 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
773 SUNXI_FUNCTION(0x5, "sim"), /* RST */
774 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
775 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
776 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
777 SUNXI_FUNCTION(0x0, "gpio_in"),
778 SUNXI_FUNCTION(0x1, "gpio_out"),
779 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
780 SUNXI_FUNCTION(0x3, "pata"), /* ATAD10 */
781 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
782 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
783 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
784 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
785 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
786 SUNXI_FUNCTION(0x0, "gpio_in"),
787 SUNXI_FUNCTION(0x1, "gpio_out"),
788 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
789 SUNXI_FUNCTION(0x3, "pata"), /* ATAD11 */
790 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
791 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
792 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
793 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
794 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
795 SUNXI_FUNCTION(0x0, "gpio_in"),
796 SUNXI_FUNCTION(0x1, "gpio_out"),
797 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
798 SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */
799 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
800 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
801 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
802 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
803 SUNXI_FUNCTION(0x0, "gpio_in"),
804 SUNXI_FUNCTION(0x1, "gpio_out"),
805 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
806 SUNXI_FUNCTION(0x3, "pata"), /* ATAD13 */
807 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
808 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
809 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
810 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out"),
814 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
815 SUNXI_FUNCTION(0x3, "pata"), /* ATAD14 */
816 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
817 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
818 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
819 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
820 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
821 SUNXI_FUNCTION(0x0, "gpio_in"),
822 SUNXI_FUNCTION(0x1, "gpio_out"),
823 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
824 SUNXI_FUNCTION(0x3, "pata"), /* ATAD15 */
825 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
826 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
827 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
828 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
829 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
830 SUNXI_FUNCTION(0x0, "gpio_in"),
831 SUNXI_FUNCTION(0x1, "gpio_out"),
832 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
833 SUNXI_FUNCTION(0x3, "pata"), /* ATAOE */
834 SUNXI_FUNCTION(0x4, "can"), /* TX */
835 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
836 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
837 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
838 SUNXI_FUNCTION(0x0, "gpio_in"),
839 SUNXI_FUNCTION(0x1, "gpio_out"),
840 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
841 SUNXI_FUNCTION(0x3, "pata"), /* ATADREQ */
842 SUNXI_FUNCTION(0x4, "can"), /* RX */
843 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
844 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
845 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
846 SUNXI_FUNCTION(0x0, "gpio_in"),
847 SUNXI_FUNCTION(0x1, "gpio_out"),
848 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
849 SUNXI_FUNCTION(0x3, "pata"), /* ATADACK */
850 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
851 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
852 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
853 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
854 SUNXI_FUNCTION(0x0, "gpio_in"),
855 SUNXI_FUNCTION(0x1, "gpio_out"),
856 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
857 SUNXI_FUNCTION(0x3, "pata"), /* ATACS0 */
858 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
859 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
860 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
861 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
862 SUNXI_FUNCTION(0x0, "gpio_in"),
863 SUNXI_FUNCTION(0x1, "gpio_out"),
864 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
865 SUNXI_FUNCTION(0x3, "pata"), /* ATACS1 */
866 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
867 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
868 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
869 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
870 SUNXI_FUNCTION(0x0, "gpio_in"),
871 SUNXI_FUNCTION(0x1, "gpio_out"),
872 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
873 SUNXI_FUNCTION(0x3, "pata"), /* ATAIORDY */
874 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
875 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
876 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
877 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
878 SUNXI_FUNCTION(0x0, "gpio_in"),
879 SUNXI_FUNCTION(0x1, "gpio_out"),
880 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
881 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOR */
882 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
883 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
884 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
885 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
886 SUNXI_FUNCTION(0x0, "gpio_in"),
887 SUNXI_FUNCTION(0x1, "gpio_out"),
888 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
889 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOW */
890 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
891 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
892 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
893 /* Hole */
894 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
895 SUNXI_FUNCTION(0x0, "gpio_in"),
896 SUNXI_FUNCTION(0x1, "gpio_out")),
897 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
898 SUNXI_FUNCTION(0x0, "gpio_in"),
899 SUNXI_FUNCTION(0x1, "gpio_out")),
900 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
901 SUNXI_FUNCTION(0x0, "gpio_in"),
902 SUNXI_FUNCTION(0x1, "gpio_out")),
903 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
904 SUNXI_FUNCTION(0x0, "gpio_in"),
905 SUNXI_FUNCTION(0x1, "gpio_out"),
906 SUNXI_FUNCTION(0x2, "pwm")), /* PWM1 */
907 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
908 SUNXI_FUNCTION(0x0, "gpio_in"),
909 SUNXI_FUNCTION(0x1, "gpio_out"),
910 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
911 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
912 SUNXI_FUNCTION(0x0, "gpio_in"),
913 SUNXI_FUNCTION(0x1, "gpio_out"),
914 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
915 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
916 SUNXI_FUNCTION(0x0, "gpio_in"),
917 SUNXI_FUNCTION(0x1, "gpio_out"),
918 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
919 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
920 SUNXI_FUNCTION(0x0, "gpio_in"),
921 SUNXI_FUNCTION(0x1, "gpio_out"),
922 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
923 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
924 SUNXI_FUNCTION(0x0, "gpio_in"),
925 SUNXI_FUNCTION(0x1, "gpio_out"),
926 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
927 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
928 SUNXI_FUNCTION(0x0, "gpio_in"),
929 SUNXI_FUNCTION(0x1, "gpio_out"),
930 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
931 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
932 SUNXI_FUNCTION(0x0, "gpio_in"),
933 SUNXI_FUNCTION(0x1, "gpio_out"),
934 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
935 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
936 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
937 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
938 SUNXI_FUNCTION(0x0, "gpio_in"),
939 SUNXI_FUNCTION(0x1, "gpio_out"),
940 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
941 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
942 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
943 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
944 SUNXI_FUNCTION(0x0, "gpio_in"),
945 SUNXI_FUNCTION(0x1, "gpio_out"),
946 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
947 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
948 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
949 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
950 SUNXI_FUNCTION(0x0, "gpio_in"),
951 SUNXI_FUNCTION(0x1, "gpio_out"),
952 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
953 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
954 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
955 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
956 SUNXI_FUNCTION(0x0, "gpio_in"),
957 SUNXI_FUNCTION(0x1, "gpio_out"),
958 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
959 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
960 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
961 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
962 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
963 SUNXI_FUNCTION(0x0, "gpio_in"),
964 SUNXI_FUNCTION(0x1, "gpio_out"),
965 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
966 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
967 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
968 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
969 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
970 SUNXI_FUNCTION(0x0, "gpio_in"),
971 SUNXI_FUNCTION(0x1, "gpio_out"),
972 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
973 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
974 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
975 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
976 SUNXI_FUNCTION(0x0, "gpio_in"),
977 SUNXI_FUNCTION(0x1, "gpio_out"),
978 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
979 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
980 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
981 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
982 SUNXI_FUNCTION(0x0, "gpio_in"),
983 SUNXI_FUNCTION(0x1, "gpio_out"),
984 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
985 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
986 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
987 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
988 SUNXI_FUNCTION(0x0, "gpio_in"),
989 SUNXI_FUNCTION(0x1, "gpio_out"),
990 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
991 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
992 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
993 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
994 SUNXI_FUNCTION(0x0, "gpio_in"),
995 SUNXI_FUNCTION(0x1, "gpio_out"),
996 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
997 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
998 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
999 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1000 SUNXI_FUNCTION(0x0, "gpio_in"),
1001 SUNXI_FUNCTION(0x1, "gpio_out"),
1002 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1003 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1004 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1005};
1006
1007static const struct sunxi_desc_pin sun5i_a10s_pins[] = { 18static const struct sunxi_desc_pin sun5i_a10s_pins[] = {
1008 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), 19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
1009 SUNXI_FUNCTION(0x0, "gpio_in"), 20 SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -3903,11 +2914,6 @@ static const struct sunxi_desc_pin sun7i_a20_pins[] = {
3903 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */ 2914 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
3904}; 2915};
3905 2916
3906static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
3907 .pins = sun4i_a10_pins,
3908 .npins = ARRAY_SIZE(sun4i_a10_pins),
3909};
3910
3911static const struct sunxi_pinctrl_desc sun5i_a10s_pinctrl_data = { 2917static const struct sunxi_pinctrl_desc sun5i_a10s_pinctrl_data = {
3912 .pins = sun5i_a10s_pins, 2918 .pins = sun5i_a10s_pins,
3913 .npins = ARRAY_SIZE(sun5i_a10s_pins), 2919 .npins = ARRAY_SIZE(sun5i_a10s_pins),
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index b06ce90f1ed8..28b6292fd2bd 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -674,7 +674,6 @@ static void sunxi_pinctrl_irq_handler(unsigned irq, struct irq_desc *desc)
674} 674}
675 675
676static struct of_device_id sunxi_pinctrl_match[] = { 676static struct of_device_id sunxi_pinctrl_match[] = {
677 { .compatible = "allwinner,sun4i-a10-pinctrl", .data = (void *)&sun4i_a10_pinctrl_data },
678 { .compatible = "allwinner,sun5i-a10s-pinctrl", .data = (void *)&sun5i_a10s_pinctrl_data }, 677 { .compatible = "allwinner,sun5i-a10s-pinctrl", .data = (void *)&sun5i_a10s_pinctrl_data },
679 { .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data }, 678 { .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data },
680 { .compatible = "allwinner,sun6i-a31-pinctrl", .data = (void *)&sun6i_a31_pinctrl_data }, 679 { .compatible = "allwinner,sun6i-a31-pinctrl", .data = (void *)&sun6i_a31_pinctrl_data },
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 20:58:39 -0500