diff options
author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2018-11-18 12:29:00 -0500 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-19 05:56:35 -0500 |
commit | 3a44d6a92e2572c602cfce692ae96d0e95d9c848 (patch) | |
tree | 415c22c202eccdb860957fb726bef5515f4e2ee6 /drivers/pinctrl | |
parent | 8d7bcad65ef390ef9efd4b3d3fd18dc2a08f2a14 (diff) |
pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions
This patch adds CAN{0,1} pins, groups and functions to the R8A77965 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c index 0159e80d29c3..001eb3dd668e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c | |||
@@ -1784,6 +1784,44 @@ static const unsigned int avb_avtp_capture_b_mux[] = { | |||
1784 | AVB_AVTP_CAPTURE_B_MARK, | 1784 | AVB_AVTP_CAPTURE_B_MARK, |
1785 | }; | 1785 | }; |
1786 | 1786 | ||
1787 | /* - CAN ------------------------------------------------------------------ */ | ||
1788 | static const unsigned int can0_data_a_pins[] = { | ||
1789 | /* TX, RX */ | ||
1790 | RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), | ||
1791 | }; | ||
1792 | |||
1793 | static const unsigned int can0_data_a_mux[] = { | ||
1794 | CAN0_TX_A_MARK, CAN0_RX_A_MARK, | ||
1795 | }; | ||
1796 | |||
1797 | static const unsigned int can0_data_b_pins[] = { | ||
1798 | /* TX, RX */ | ||
1799 | RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), | ||
1800 | }; | ||
1801 | |||
1802 | static const unsigned int can0_data_b_mux[] = { | ||
1803 | CAN0_TX_B_MARK, CAN0_RX_B_MARK, | ||
1804 | }; | ||
1805 | |||
1806 | static const unsigned int can1_data_pins[] = { | ||
1807 | /* TX, RX */ | ||
1808 | RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26), | ||
1809 | }; | ||
1810 | |||
1811 | static const unsigned int can1_data_mux[] = { | ||
1812 | CAN1_TX_MARK, CAN1_RX_MARK, | ||
1813 | }; | ||
1814 | |||
1815 | /* - CAN Clock -------------------------------------------------------------- */ | ||
1816 | static const unsigned int can_clk_pins[] = { | ||
1817 | /* CLK */ | ||
1818 | RCAR_GP_PIN(1, 25), | ||
1819 | }; | ||
1820 | |||
1821 | static const unsigned int can_clk_mux[] = { | ||
1822 | CAN_CLK_MARK, | ||
1823 | }; | ||
1824 | |||
1787 | /* - DU --------------------------------------------------------------------- */ | 1825 | /* - DU --------------------------------------------------------------------- */ |
1788 | static const unsigned int du_rgb666_pins[] = { | 1826 | static const unsigned int du_rgb666_pins[] = { |
1789 | /* R[7:2], G[7:2], B[7:2] */ | 1827 | /* R[7:2], G[7:2], B[7:2] */ |
@@ -3964,6 +4002,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
3964 | SH_PFC_PIN_GROUP(avb_avtp_capture_a), | 4002 | SH_PFC_PIN_GROUP(avb_avtp_capture_a), |
3965 | SH_PFC_PIN_GROUP(avb_avtp_match_b), | 4003 | SH_PFC_PIN_GROUP(avb_avtp_match_b), |
3966 | SH_PFC_PIN_GROUP(avb_avtp_capture_b), | 4004 | SH_PFC_PIN_GROUP(avb_avtp_capture_b), |
4005 | SH_PFC_PIN_GROUP(can0_data_a), | ||
4006 | SH_PFC_PIN_GROUP(can0_data_b), | ||
4007 | SH_PFC_PIN_GROUP(can1_data), | ||
4008 | SH_PFC_PIN_GROUP(can_clk), | ||
3967 | SH_PFC_PIN_GROUP(du_rgb666), | 4009 | SH_PFC_PIN_GROUP(du_rgb666), |
3968 | SH_PFC_PIN_GROUP(du_rgb888), | 4010 | SH_PFC_PIN_GROUP(du_rgb888), |
3969 | SH_PFC_PIN_GROUP(du_clk_out_0), | 4011 | SH_PFC_PIN_GROUP(du_clk_out_0), |
@@ -4272,6 +4314,19 @@ static const char * const avb_groups[] = { | |||
4272 | "avb_avtp_capture_b", | 4314 | "avb_avtp_capture_b", |
4273 | }; | 4315 | }; |
4274 | 4316 | ||
4317 | static const char * const can0_groups[] = { | ||
4318 | "can0_data_a", | ||
4319 | "can0_data_b", | ||
4320 | }; | ||
4321 | |||
4322 | static const char * const can1_groups[] = { | ||
4323 | "can1_data", | ||
4324 | }; | ||
4325 | |||
4326 | static const char * const can_clk_groups[] = { | ||
4327 | "can_clk", | ||
4328 | }; | ||
4329 | |||
4275 | static const char * const du_groups[] = { | 4330 | static const char * const du_groups[] = { |
4276 | "du_rgb666", | 4331 | "du_rgb666", |
4277 | "du_rgb888", | 4332 | "du_rgb888", |
@@ -4663,6 +4718,9 @@ static const char * const vin5_groups[] = { | |||
4663 | static const struct sh_pfc_function pinmux_functions[] = { | 4718 | static const struct sh_pfc_function pinmux_functions[] = { |
4664 | SH_PFC_FUNCTION(audio_clk), | 4719 | SH_PFC_FUNCTION(audio_clk), |
4665 | SH_PFC_FUNCTION(avb), | 4720 | SH_PFC_FUNCTION(avb), |
4721 | SH_PFC_FUNCTION(can0), | ||
4722 | SH_PFC_FUNCTION(can1), | ||
4723 | SH_PFC_FUNCTION(can_clk), | ||
4666 | SH_PFC_FUNCTION(du), | 4724 | SH_PFC_FUNCTION(du), |
4667 | SH_PFC_FUNCTION(hscif0), | 4725 | SH_PFC_FUNCTION(hscif0), |
4668 | SH_PFC_FUNCTION(hscif1), | 4726 | SH_PFC_FUNCTION(hscif1), |