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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-04-18 14:12:50 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-05-04 03:03:30 -0400
commit1c996176e725660bd6e0841ba066d9ff4fc21bba (patch)
tree983c10286df19434cb1394e2caaed848d758f887 /drivers/pinctrl
parent342cefb2128b098035d324e448d42253c9c44699 (diff)
pinctrl: sunxi: Move Allwinner A31 pinctrl driver to a driver of its own
Move the pin description to a driver specific to be. This is one more step toward retiring pinctrl-sunxi-pins.h that used to define all the pins for all the Allwinner SoCs in a single header, that would have in turn result in having these structures in the final binary as many times as the header was included. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sunxi/Makefile1
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c865
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h820
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.c1
4 files changed, 866 insertions, 821 deletions
diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
index 0cb72fed6ee3..d51890c5d34d 100644
--- a/drivers/pinctrl/sunxi/Makefile
+++ b/drivers/pinctrl/sunxi/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sunxi.o
5obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun4i-a10.o 5obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun4i-a10.o
6obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a10s.o 6obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a10s.o
7obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a13.o 7obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a13.o
8obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun6i-a31.o
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
new file mode 100644
index 000000000000..8dea5856458b
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -0,0 +1,865 @@
1/*
2 * Allwinner A31 SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-sunxi.h"
20
21static const struct sunxi_desc_pin sun6i_a31_pins[] = {
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
26 SUNXI_FUNCTION(0x3, "lcd1"), /* D0 */
27 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
29 SUNXI_FUNCTION(0x0, "gpio_in"),
30 SUNXI_FUNCTION(0x1, "gpio_out"),
31 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
32 SUNXI_FUNCTION(0x3, "lcd1"), /* D1 */
33 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out"),
37 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
38 SUNXI_FUNCTION(0x3, "lcd1"), /* D2 */
39 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
44 SUNXI_FUNCTION(0x3, "lcd1"), /* D3 */
45 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
50 SUNXI_FUNCTION(0x3, "lcd1"), /* D4 */
51 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
53 SUNXI_FUNCTION(0x0, "gpio_in"),
54 SUNXI_FUNCTION(0x1, "gpio_out"),
55 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
56 SUNXI_FUNCTION(0x3, "lcd1"), /* D5 */
57 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
59 SUNXI_FUNCTION(0x0, "gpio_in"),
60 SUNXI_FUNCTION(0x1, "gpio_out"),
61 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
62 SUNXI_FUNCTION(0x3, "lcd1"), /* D6 */
63 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
64 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out"),
67 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
68 SUNXI_FUNCTION(0x3, "lcd1"), /* D7 */
69 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
70 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
71 SUNXI_FUNCTION(0x0, "gpio_in"),
72 SUNXI_FUNCTION(0x1, "gpio_out"),
73 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
74 SUNXI_FUNCTION(0x3, "lcd1")), /* D8 */
75 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
76 SUNXI_FUNCTION(0x0, "gpio_in"),
77 SUNXI_FUNCTION(0x1, "gpio_out"),
78 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
79 SUNXI_FUNCTION(0x3, "lcd1"), /* D9 */
80 SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */
81 SUNXI_FUNCTION(0x5, "mmc2")), /* CMD */
82 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
83 SUNXI_FUNCTION(0x0, "gpio_in"),
84 SUNXI_FUNCTION(0x1, "gpio_out"),
85 SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */
86 SUNXI_FUNCTION(0x3, "lcd1"), /* D10 */
87 SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */
88 SUNXI_FUNCTION(0x5, "mmc2")), /* CLK */
89 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
93 SUNXI_FUNCTION(0x3, "lcd1"), /* D11 */
94 SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */
95 SUNXI_FUNCTION(0x5, "mmc2")), /* D0 */
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
100 SUNXI_FUNCTION(0x3, "lcd1"), /* D12 */
101 SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */
102 SUNXI_FUNCTION(0x5, "mmc2")), /* D1 */
103 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
104 SUNXI_FUNCTION(0x0, "gpio_in"),
105 SUNXI_FUNCTION(0x1, "gpio_out"),
106 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
107 SUNXI_FUNCTION(0x3, "lcd1"), /* D13 */
108 SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */
109 SUNXI_FUNCTION(0x5, "mmc2")), /* D2 */
110 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
114 SUNXI_FUNCTION(0x3, "lcd1"), /* D14 */
115 SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */
116 SUNXI_FUNCTION(0x5, "mmc2")), /* D3 */
117 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
118 SUNXI_FUNCTION(0x0, "gpio_in"),
119 SUNXI_FUNCTION(0x1, "gpio_out"),
120 SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
121 SUNXI_FUNCTION(0x3, "lcd1")), /* D15 */
122 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
123 SUNXI_FUNCTION(0x0, "gpio_in"),
124 SUNXI_FUNCTION(0x1, "gpio_out"),
125 SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
126 SUNXI_FUNCTION(0x3, "lcd1")), /* D16 */
127 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
131 SUNXI_FUNCTION(0x3, "lcd1")), /* D17 */
132 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out"),
135 SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
136 SUNXI_FUNCTION(0x3, "lcd1")), /* D18 */
137 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */
141 SUNXI_FUNCTION(0x3, "lcd1"), /* D19 */
142 SUNXI_FUNCTION(0x4, "pwm3")), /* Positive */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */
147 SUNXI_FUNCTION(0x3, "lcd1"), /* D20 */
148 SUNXI_FUNCTION(0x4, "pwm3")), /* Negative */
149 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */
153 SUNXI_FUNCTION(0x3, "lcd1"), /* D21 */
154 SUNXI_FUNCTION(0x4, "spi3")), /* CS0 */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
159 SUNXI_FUNCTION(0x3, "lcd1"), /* D22 */
160 SUNXI_FUNCTION(0x4, "spi3")), /* CLK */
161 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
162 SUNXI_FUNCTION(0x0, "gpio_in"),
163 SUNXI_FUNCTION(0x1, "gpio_out"),
164 SUNXI_FUNCTION(0x2, "gmac"), /* COL */
165 SUNXI_FUNCTION(0x3, "lcd1"), /* D23 */
166 SUNXI_FUNCTION(0x4, "spi3")), /* MOSI */
167 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "gmac"), /* CRS */
171 SUNXI_FUNCTION(0x3, "lcd1"), /* CLK */
172 SUNXI_FUNCTION(0x4, "spi3")), /* MISO */
173 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out"),
176 SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */
177 SUNXI_FUNCTION(0x3, "lcd1"), /* DE */
178 SUNXI_FUNCTION(0x4, "spi3")), /* CS1 */
179 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
183 SUNXI_FUNCTION(0x3, "lcd1")), /* HSYNC */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */
188 SUNXI_FUNCTION(0x3, "lcd1")), /* VSYNC */
189 /* Hole */
190 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
191 SUNXI_FUNCTION(0x0, "gpio_in"),
192 SUNXI_FUNCTION(0x1, "gpio_out"),
193 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
194 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
195 SUNXI_FUNCTION(0x4, "csi")), /* MCLK1 */
196 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
199 SUNXI_FUNCTION(0x2, "i2s0")), /* BCLK */
200 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
201 SUNXI_FUNCTION(0x0, "gpio_in"),
202 SUNXI_FUNCTION(0x1, "gpio_out"),
203 SUNXI_FUNCTION(0x2, "i2s0")), /* LRCK */
204 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out"),
207 SUNXI_FUNCTION(0x2, "i2s0")), /* DO0 */
208 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */
212 SUNXI_FUNCTION(0x3, "uart3")), /* RTS */
213 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */
217 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
218 SUNXI_FUNCTION(0x4, "i2c3")), /* SCK */
219 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
220 SUNXI_FUNCTION(0x0, "gpio_in"),
221 SUNXI_FUNCTION(0x1, "gpio_out"),
222 SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */
223 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
224 SUNXI_FUNCTION(0x4, "i2c3")), /* SDA */
225 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
226 SUNXI_FUNCTION(0x0, "gpio_in"),
227 SUNXI_FUNCTION(0x1, "gpio_out"),
228 SUNXI_FUNCTION(0x3, "i2s0")), /* DI */
229 /* Hole */
230 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
231 SUNXI_FUNCTION(0x0, "gpio_in"),
232 SUNXI_FUNCTION(0x1, "gpio_out"),
233 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
234 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
235 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
239 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
240 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
241 SUNXI_FUNCTION(0x0, "gpio_in"),
242 SUNXI_FUNCTION(0x1, "gpio_out"),
243 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
244 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
245 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
246 SUNXI_FUNCTION(0x0, "gpio_in"),
247 SUNXI_FUNCTION(0x1, "gpio_out"),
248 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
249 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
250 SUNXI_FUNCTION(0x0, "gpio_in"),
251 SUNXI_FUNCTION(0x1, "gpio_out"),
252 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
253 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x2, "nand0")), /* RE */
257 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
258 SUNXI_FUNCTION(0x0, "gpio_in"),
259 SUNXI_FUNCTION(0x1, "gpio_out"),
260 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
261 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
262 SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */
263 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
267 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
268 SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */
269 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
270 SUNXI_FUNCTION(0x0, "gpio_in"),
271 SUNXI_FUNCTION(0x1, "gpio_out"),
272 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
273 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
274 SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */
275 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
276 SUNXI_FUNCTION(0x0, "gpio_in"),
277 SUNXI_FUNCTION(0x1, "gpio_out"),
278 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
279 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
280 SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */
281 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
282 SUNXI_FUNCTION(0x0, "gpio_in"),
283 SUNXI_FUNCTION(0x1, "gpio_out"),
284 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
285 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
286 SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */
287 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
288 SUNXI_FUNCTION(0x0, "gpio_in"),
289 SUNXI_FUNCTION(0x1, "gpio_out"),
290 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
291 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
292 SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */
293 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
294 SUNXI_FUNCTION(0x0, "gpio_in"),
295 SUNXI_FUNCTION(0x1, "gpio_out"),
296 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
297 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
298 SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */
299 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
300 SUNXI_FUNCTION(0x0, "gpio_in"),
301 SUNXI_FUNCTION(0x1, "gpio_out"),
302 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
303 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
304 SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */
305 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
309 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
310 SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */
311 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
312 SUNXI_FUNCTION(0x0, "gpio_in"),
313 SUNXI_FUNCTION(0x1, "gpio_out"),
314 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
315 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
316 SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */
317 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "nand0"), /* DQ8 */
321 SUNXI_FUNCTION(0x3, "nand1")), /* DQ0 */
322 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
323 SUNXI_FUNCTION(0x0, "gpio_in"),
324 SUNXI_FUNCTION(0x1, "gpio_out"),
325 SUNXI_FUNCTION(0x2, "nand0"), /* DQ9 */
326 SUNXI_FUNCTION(0x3, "nand1")), /* DQ1 */
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
328 SUNXI_FUNCTION(0x0, "gpio_in"),
329 SUNXI_FUNCTION(0x1, "gpio_out"),
330 SUNXI_FUNCTION(0x2, "nand0"), /* DQ10 */
331 SUNXI_FUNCTION(0x3, "nand1")), /* DQ2 */
332 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
333 SUNXI_FUNCTION(0x0, "gpio_in"),
334 SUNXI_FUNCTION(0x1, "gpio_out"),
335 SUNXI_FUNCTION(0x2, "nand0"), /* DQ11 */
336 SUNXI_FUNCTION(0x3, "nand1")), /* DQ3 */
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "nand0"), /* DQ12 */
341 SUNXI_FUNCTION(0x3, "nand1")), /* DQ4 */
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out"),
345 SUNXI_FUNCTION(0x2, "nand0"), /* DQ13 */
346 SUNXI_FUNCTION(0x3, "nand1")), /* DQ5 */
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "nand0"), /* DQ14 */
351 SUNXI_FUNCTION(0x3, "nand1")), /* DQ6 */
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
353 SUNXI_FUNCTION(0x0, "gpio_in"),
354 SUNXI_FUNCTION(0x1, "gpio_out"),
355 SUNXI_FUNCTION(0x2, "nand0"), /* DQ15 */
356 SUNXI_FUNCTION(0x3, "nand1")), /* DQ7 */
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out"),
360 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
361 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
362 SUNXI_FUNCTION(0x4, "mmc3")), /* RST */
363 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
364 SUNXI_FUNCTION(0x0, "gpio_in"),
365 SUNXI_FUNCTION(0x1, "gpio_out"),
366 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out"),
370 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
371 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
372 SUNXI_FUNCTION(0x0, "gpio_in"),
373 SUNXI_FUNCTION(0x1, "gpio_out"),
374 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
375 /* Hole */
376 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
377 SUNXI_FUNCTION(0x0, "gpio_in"),
378 SUNXI_FUNCTION(0x1, "gpio_out"),
379 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
380 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
381 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
382 SUNXI_FUNCTION(0x0, "gpio_in"),
383 SUNXI_FUNCTION(0x1, "gpio_out"),
384 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
385 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
386 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
387 SUNXI_FUNCTION(0x0, "gpio_in"),
388 SUNXI_FUNCTION(0x1, "gpio_out"),
389 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
390 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
391 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out"),
394 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
395 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
396 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
397 SUNXI_FUNCTION(0x0, "gpio_in"),
398 SUNXI_FUNCTION(0x1, "gpio_out"),
399 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
400 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
401 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
405 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
406 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out"),
409 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
410 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
411 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
412 SUNXI_FUNCTION(0x0, "gpio_in"),
413 SUNXI_FUNCTION(0x1, "gpio_out"),
414 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
415 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
416 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
417 SUNXI_FUNCTION(0x0, "gpio_in"),
418 SUNXI_FUNCTION(0x1, "gpio_out"),
419 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
420 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
421 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
422 SUNXI_FUNCTION(0x0, "gpio_in"),
423 SUNXI_FUNCTION(0x1, "gpio_out"),
424 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
425 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
426 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
427 SUNXI_FUNCTION(0x0, "gpio_in"),
428 SUNXI_FUNCTION(0x1, "gpio_out"),
429 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
430 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
431 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out"),
434 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
435 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
436 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
437 SUNXI_FUNCTION(0x0, "gpio_in"),
438 SUNXI_FUNCTION(0x1, "gpio_out"),
439 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
440 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
441 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
442 SUNXI_FUNCTION(0x0, "gpio_in"),
443 SUNXI_FUNCTION(0x1, "gpio_out"),
444 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
445 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
446 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
447 SUNXI_FUNCTION(0x0, "gpio_in"),
448 SUNXI_FUNCTION(0x1, "gpio_out"),
449 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
450 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
451 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
452 SUNXI_FUNCTION(0x0, "gpio_in"),
453 SUNXI_FUNCTION(0x1, "gpio_out"),
454 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
455 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
456 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
457 SUNXI_FUNCTION(0x0, "gpio_in"),
458 SUNXI_FUNCTION(0x1, "gpio_out"),
459 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
460 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
461 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
462 SUNXI_FUNCTION(0x0, "gpio_in"),
463 SUNXI_FUNCTION(0x1, "gpio_out"),
464 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
465 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
466 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
467 SUNXI_FUNCTION(0x0, "gpio_in"),
468 SUNXI_FUNCTION(0x1, "gpio_out"),
469 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
470 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
471 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
475 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
476 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
477 SUNXI_FUNCTION(0x0, "gpio_in"),
478 SUNXI_FUNCTION(0x1, "gpio_out"),
479 SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */
480 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
481 SUNXI_FUNCTION(0x0, "gpio_in"),
482 SUNXI_FUNCTION(0x1, "gpio_out"),
483 SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */
484 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
485 SUNXI_FUNCTION(0x0, "gpio_in"),
486 SUNXI_FUNCTION(0x1, "gpio_out"),
487 SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */
488 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
489 SUNXI_FUNCTION(0x0, "gpio_in"),
490 SUNXI_FUNCTION(0x1, "gpio_out"),
491 SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */
492 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
493 SUNXI_FUNCTION(0x0, "gpio_in"),
494 SUNXI_FUNCTION(0x1, "gpio_out"),
495 SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */
496 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
497 SUNXI_FUNCTION(0x0, "gpio_in"),
498 SUNXI_FUNCTION(0x1, "gpio_out"),
499 SUNXI_FUNCTION(0x2, "lcd0")), /* DE */
500 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
501 SUNXI_FUNCTION(0x0, "gpio_in"),
502 SUNXI_FUNCTION(0x1, "gpio_out"),
503 SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */
504 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
505 SUNXI_FUNCTION(0x0, "gpio_in"),
506 SUNXI_FUNCTION(0x1, "gpio_out"),
507 SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */
508 /* Hole */
509 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
510 SUNXI_FUNCTION(0x0, "gpio_in"),
511 SUNXI_FUNCTION(0x1, "gpio_out"),
512 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
513 SUNXI_FUNCTION(0x3, "ts")), /* CLK */
514 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
515 SUNXI_FUNCTION(0x0, "gpio_in"),
516 SUNXI_FUNCTION(0x1, "gpio_out"),
517 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
518 SUNXI_FUNCTION(0x3, "ts")), /* ERR */
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out"),
522 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
523 SUNXI_FUNCTION(0x3, "ts")), /* SYNC */
524 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
525 SUNXI_FUNCTION(0x0, "gpio_in"),
526 SUNXI_FUNCTION(0x1, "gpio_out"),
527 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
528 SUNXI_FUNCTION(0x3, "ts")), /* DVLD */
529 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
530 SUNXI_FUNCTION(0x0, "gpio_in"),
531 SUNXI_FUNCTION(0x1, "gpio_out"),
532 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
533 SUNXI_FUNCTION(0x3, "uart5")), /* TX */
534 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out"),
537 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
538 SUNXI_FUNCTION(0x3, "uart5")), /* RX */
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
543 SUNXI_FUNCTION(0x3, "uart5")), /* RTS */
544 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
545 SUNXI_FUNCTION(0x0, "gpio_in"),
546 SUNXI_FUNCTION(0x1, "gpio_out"),
547 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
548 SUNXI_FUNCTION(0x3, "uart5")), /* CTS */
549 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
550 SUNXI_FUNCTION(0x0, "gpio_in"),
551 SUNXI_FUNCTION(0x1, "gpio_out"),
552 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
553 SUNXI_FUNCTION(0x3, "ts")), /* D0 */
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
555 SUNXI_FUNCTION(0x0, "gpio_in"),
556 SUNXI_FUNCTION(0x1, "gpio_out"),
557 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
558 SUNXI_FUNCTION(0x3, "ts")), /* D1 */
559 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
562 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
563 SUNXI_FUNCTION(0x3, "ts")), /* D2 */
564 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
565 SUNXI_FUNCTION(0x0, "gpio_in"),
566 SUNXI_FUNCTION(0x1, "gpio_out"),
567 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
568 SUNXI_FUNCTION(0x3, "ts")), /* D3 */
569 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
570 SUNXI_FUNCTION(0x0, "gpio_in"),
571 SUNXI_FUNCTION(0x1, "gpio_out"),
572 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
573 SUNXI_FUNCTION(0x3, "ts")), /* D4 */
574 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
575 SUNXI_FUNCTION(0x0, "gpio_in"),
576 SUNXI_FUNCTION(0x1, "gpio_out"),
577 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
578 SUNXI_FUNCTION(0x3, "ts")), /* D5 */
579 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
580 SUNXI_FUNCTION(0x0, "gpio_in"),
581 SUNXI_FUNCTION(0x1, "gpio_out"),
582 SUNXI_FUNCTION(0x2, "csi"), /* D10 */
583 SUNXI_FUNCTION(0x3, "ts")), /* D6 */
584 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
585 SUNXI_FUNCTION(0x0, "gpio_in"),
586 SUNXI_FUNCTION(0x1, "gpio_out"),
587 SUNXI_FUNCTION(0x2, "csi"), /* D11 */
588 SUNXI_FUNCTION(0x3, "ts")), /* D7 */
589 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
590 SUNXI_FUNCTION(0x0, "gpio_in"),
591 SUNXI_FUNCTION(0x1, "gpio_out"),
592 SUNXI_FUNCTION(0x2, "csi")), /* MIPI CSI MCLK */
593 /* Hole */
594 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
595 SUNXI_FUNCTION(0x0, "gpio_in"),
596 SUNXI_FUNCTION(0x1, "gpio_out"),
597 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
598 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
599 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
600 SUNXI_FUNCTION(0x0, "gpio_in"),
601 SUNXI_FUNCTION(0x1, "gpio_out"),
602 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
603 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
604 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
608 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
609 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
610 SUNXI_FUNCTION(0x0, "gpio_in"),
611 SUNXI_FUNCTION(0x1, "gpio_out"),
612 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
613 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
614 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
615 SUNXI_FUNCTION(0x0, "gpio_in"),
616 SUNXI_FUNCTION(0x1, "gpio_out"),
617 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
618 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
619 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
620 SUNXI_FUNCTION(0x0, "gpio_in"),
621 SUNXI_FUNCTION(0x1, "gpio_out"),
622 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
623 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
624 /* Hole */
625 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
626 SUNXI_FUNCTION(0x0, "gpio_in"),
627 SUNXI_FUNCTION(0x1, "gpio_out"),
628 SUNXI_FUNCTION(0x2, "mmc1")), /* CLK */
629 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
630 SUNXI_FUNCTION(0x0, "gpio_in"),
631 SUNXI_FUNCTION(0x1, "gpio_out"),
632 SUNXI_FUNCTION(0x2, "mmc1")), /* CMD */
633 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
634 SUNXI_FUNCTION(0x0, "gpio_in"),
635 SUNXI_FUNCTION(0x1, "gpio_out"),
636 SUNXI_FUNCTION(0x2, "mmc1")), /* D0 */
637 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
638 SUNXI_FUNCTION(0x0, "gpio_in"),
639 SUNXI_FUNCTION(0x1, "gpio_out"),
640 SUNXI_FUNCTION(0x2, "mmc1")), /* D1 */
641 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
642 SUNXI_FUNCTION(0x0, "gpio_in"),
643 SUNXI_FUNCTION(0x1, "gpio_out"),
644 SUNXI_FUNCTION(0x2, "mmc1")), /* D2 */
645 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
646 SUNXI_FUNCTION(0x0, "gpio_in"),
647 SUNXI_FUNCTION(0x1, "gpio_out"),
648 SUNXI_FUNCTION(0x2, "mmc1")), /* D3 */
649 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
650 SUNXI_FUNCTION(0x0, "gpio_in"),
651 SUNXI_FUNCTION(0x1, "gpio_out"),
652 SUNXI_FUNCTION(0x2, "uart2")), /* TX */
653 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
654 SUNXI_FUNCTION(0x0, "gpio_in"),
655 SUNXI_FUNCTION(0x1, "gpio_out"),
656 SUNXI_FUNCTION(0x2, "uart2")), /* RX */
657 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
658 SUNXI_FUNCTION(0x0, "gpio_in"),
659 SUNXI_FUNCTION(0x1, "gpio_out"),
660 SUNXI_FUNCTION(0x2, "uart2")), /* RTS */
661 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
662 SUNXI_FUNCTION(0x0, "gpio_in"),
663 SUNXI_FUNCTION(0x1, "gpio_out"),
664 SUNXI_FUNCTION(0x2, "uart2")), /* CTS */
665 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
666 SUNXI_FUNCTION(0x0, "gpio_in"),
667 SUNXI_FUNCTION(0x1, "gpio_out"),
668 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
669 SUNXI_FUNCTION(0x3, "usb")), /* DP3 */
670 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
671 SUNXI_FUNCTION(0x0, "gpio_in"),
672 SUNXI_FUNCTION(0x1, "gpio_out"),
673 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
674 SUNXI_FUNCTION(0x3, "usb")), /* DM3 */
675 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
676 SUNXI_FUNCTION(0x0, "gpio_in"),
677 SUNXI_FUNCTION(0x1, "gpio_out"),
678 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
679 SUNXI_FUNCTION(0x3, "i2s1")), /* MCLK */
680 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
681 SUNXI_FUNCTION(0x0, "gpio_in"),
682 SUNXI_FUNCTION(0x1, "gpio_out"),
683 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
684 SUNXI_FUNCTION(0x3, "i2s1")), /* BCLK */
685 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
686 SUNXI_FUNCTION(0x0, "gpio_in"),
687 SUNXI_FUNCTION(0x1, "gpio_out"),
688 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
689 SUNXI_FUNCTION(0x3, "i2s1")), /* LRCK */
690 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
691 SUNXI_FUNCTION(0x0, "gpio_in"),
692 SUNXI_FUNCTION(0x1, "gpio_out"),
693 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
694 SUNXI_FUNCTION(0x3, "i2s1")), /* DIN */
695 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
696 SUNXI_FUNCTION(0x0, "gpio_in"),
697 SUNXI_FUNCTION(0x1, "gpio_out"),
698 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
699 SUNXI_FUNCTION(0x3, "i2s1")), /* DOUT */
700 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
701 SUNXI_FUNCTION(0x0, "gpio_in"),
702 SUNXI_FUNCTION(0x1, "gpio_out"),
703 SUNXI_FUNCTION(0x2, "uart4")), /* TX */
704 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
705 SUNXI_FUNCTION(0x0, "gpio_in"),
706 SUNXI_FUNCTION(0x1, "gpio_out"),
707 SUNXI_FUNCTION(0x2, "uart4")), /* RX */
708 /* Hole */
709 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
710 SUNXI_FUNCTION(0x0, "gpio_in"),
711 SUNXI_FUNCTION(0x1, "gpio_out"),
712 SUNXI_FUNCTION(0x2, "nand1")), /* WE */
713 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
714 SUNXI_FUNCTION(0x0, "gpio_in"),
715 SUNXI_FUNCTION(0x1, "gpio_out"),
716 SUNXI_FUNCTION(0x2, "nand1")), /* ALE */
717 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
718 SUNXI_FUNCTION(0x0, "gpio_in"),
719 SUNXI_FUNCTION(0x1, "gpio_out"),
720 SUNXI_FUNCTION(0x2, "nand1")), /* CLE */
721 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
722 SUNXI_FUNCTION(0x0, "gpio_in"),
723 SUNXI_FUNCTION(0x1, "gpio_out"),
724 SUNXI_FUNCTION(0x2, "nand1")), /* CE1 */
725 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
726 SUNXI_FUNCTION(0x0, "gpio_in"),
727 SUNXI_FUNCTION(0x1, "gpio_out"),
728 SUNXI_FUNCTION(0x2, "nand1")), /* CE0 */
729 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
730 SUNXI_FUNCTION(0x0, "gpio_in"),
731 SUNXI_FUNCTION(0x1, "gpio_out"),
732 SUNXI_FUNCTION(0x2, "nand1")), /* RE */
733 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
734 SUNXI_FUNCTION(0x0, "gpio_in"),
735 SUNXI_FUNCTION(0x1, "gpio_out"),
736 SUNXI_FUNCTION(0x2, "nand1")), /* RB0 */
737 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
738 SUNXI_FUNCTION(0x0, "gpio_in"),
739 SUNXI_FUNCTION(0x1, "gpio_out"),
740 SUNXI_FUNCTION(0x2, "nand1")), /* RB1 */
741 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
742 SUNXI_FUNCTION(0x0, "gpio_in"),
743 SUNXI_FUNCTION(0x1, "gpio_out"),
744 SUNXI_FUNCTION(0x2, "nand1")), /* DQS */
745 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
746 SUNXI_FUNCTION(0x0, "gpio_in"),
747 SUNXI_FUNCTION(0x1, "gpio_out"),
748 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
749 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
750 SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */
751 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
752 SUNXI_FUNCTION(0x0, "gpio_in"),
753 SUNXI_FUNCTION(0x1, "gpio_out"),
754 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
755 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
756 SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */
757 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
758 SUNXI_FUNCTION(0x0, "gpio_in"),
759 SUNXI_FUNCTION(0x1, "gpio_out"),
760 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
761 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
762 SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */
763 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
764 SUNXI_FUNCTION(0x0, "gpio_in"),
765 SUNXI_FUNCTION(0x1, "gpio_out"),
766 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
767 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
768 SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */
769 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
770 SUNXI_FUNCTION(0x0, "gpio_in"),
771 SUNXI_FUNCTION(0x1, "gpio_out"),
772 SUNXI_FUNCTION(0x2, "pwm0")),
773 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
774 SUNXI_FUNCTION(0x0, "gpio_in"),
775 SUNXI_FUNCTION(0x1, "gpio_out"),
776 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
777 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
778 SUNXI_FUNCTION(0x0, "gpio_in"),
779 SUNXI_FUNCTION(0x1, "gpio_out"),
780 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
781 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
782 SUNXI_FUNCTION(0x0, "gpio_in"),
783 SUNXI_FUNCTION(0x1, "gpio_out"),
784 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
785 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
786 SUNXI_FUNCTION(0x0, "gpio_in"),
787 SUNXI_FUNCTION(0x1, "gpio_out"),
788 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
789 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
790 SUNXI_FUNCTION(0x0, "gpio_in"),
791 SUNXI_FUNCTION(0x1, "gpio_out"),
792 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
793 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
794 SUNXI_FUNCTION(0x0, "gpio_in"),
795 SUNXI_FUNCTION(0x1, "gpio_out"),
796 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
797 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
798 SUNXI_FUNCTION(0x0, "gpio_in"),
799 SUNXI_FUNCTION(0x1, "gpio_out"),
800 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
801 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
802 SUNXI_FUNCTION(0x0, "gpio_in"),
803 SUNXI_FUNCTION(0x1, "gpio_out"),
804 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out")),
808 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
809 SUNXI_FUNCTION(0x0, "gpio_in"),
810 SUNXI_FUNCTION(0x1, "gpio_out")),
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out")),
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out")),
817 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
818 SUNXI_FUNCTION(0x0, "gpio_in"),
819 SUNXI_FUNCTION(0x1, "gpio_out")),
820 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
821 SUNXI_FUNCTION(0x0, "gpio_in"),
822 SUNXI_FUNCTION(0x1, "gpio_out")),
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out")),
826 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 29),
827 SUNXI_FUNCTION(0x0, "gpio_in"),
828 SUNXI_FUNCTION(0x1, "gpio_out"),
829 SUNXI_FUNCTION(0x2, "nand1")), /* CE2 */
830 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 30),
831 SUNXI_FUNCTION(0x0, "gpio_in"),
832 SUNXI_FUNCTION(0x1, "gpio_out"),
833 SUNXI_FUNCTION(0x2, "nand1")), /* CE3 */
834};
835
836static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
837 .pins = sun6i_a31_pins,
838 .npins = ARRAY_SIZE(sun6i_a31_pins),
839};
840
841static int sun6i_a31_pinctrl_probe(struct platform_device *pdev)
842{
843 return sunxi_pinctrl_init(pdev,
844 &sun6i_a31_pinctrl_data);
845}
846
847static struct of_device_id sun6i_a31_pinctrl_match[] = {
848 { .compatible = "allwinner,sun6i-a31-pinctrl", },
849 {}
850};
851MODULE_DEVICE_TABLE(of, sun6i_a31_pinctrl_match);
852
853static struct platform_driver sun6i_a31_pinctrl_driver = {
854 .probe = sun6i_a31_pinctrl_probe,
855 .driver = {
856 .name = "sun6i-a31-pinctrl",
857 .owner = THIS_MODULE,
858 .of_match_table = sun6i_a31_pinctrl_match,
859 },
860};
861module_platform_driver(sun6i_a31_pinctrl_driver);
862
863MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
864MODULE_DESCRIPTION("Allwinner A31 pinctrl driver");
865MODULE_LICENSE("GPL");
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h b/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
index 6ed6f4c3c262..403f9c50ab99 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi-pins.h
@@ -15,821 +15,6 @@
15 15
16#include "pinctrl-sunxi.h" 16#include "pinctrl-sunxi.h"
17 17
18static const struct sunxi_desc_pin sun6i_a31_pins[] = {
19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
20 SUNXI_FUNCTION(0x0, "gpio_in"),
21 SUNXI_FUNCTION(0x1, "gpio_out"),
22 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
23 SUNXI_FUNCTION(0x3, "lcd1"), /* D0 */
24 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
29 SUNXI_FUNCTION(0x3, "lcd1"), /* D1 */
30 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out"),
34 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
35 SUNXI_FUNCTION(0x3, "lcd1"), /* D2 */
36 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
38 SUNXI_FUNCTION(0x0, "gpio_in"),
39 SUNXI_FUNCTION(0x1, "gpio_out"),
40 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
41 SUNXI_FUNCTION(0x3, "lcd1"), /* D3 */
42 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out"),
46 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
47 SUNXI_FUNCTION(0x3, "lcd1"), /* D4 */
48 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
49 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
50 SUNXI_FUNCTION(0x0, "gpio_in"),
51 SUNXI_FUNCTION(0x1, "gpio_out"),
52 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
53 SUNXI_FUNCTION(0x3, "lcd1"), /* D5 */
54 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
55 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
56 SUNXI_FUNCTION(0x0, "gpio_in"),
57 SUNXI_FUNCTION(0x1, "gpio_out"),
58 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
59 SUNXI_FUNCTION(0x3, "lcd1"), /* D6 */
60 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
65 SUNXI_FUNCTION(0x3, "lcd1"), /* D7 */
66 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
67 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
68 SUNXI_FUNCTION(0x0, "gpio_in"),
69 SUNXI_FUNCTION(0x1, "gpio_out"),
70 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
71 SUNXI_FUNCTION(0x3, "lcd1")), /* D8 */
72 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
76 SUNXI_FUNCTION(0x3, "lcd1"), /* D9 */
77 SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */
78 SUNXI_FUNCTION(0x5, "mmc2")), /* CMD */
79 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
80 SUNXI_FUNCTION(0x0, "gpio_in"),
81 SUNXI_FUNCTION(0x1, "gpio_out"),
82 SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */
83 SUNXI_FUNCTION(0x3, "lcd1"), /* D10 */
84 SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */
85 SUNXI_FUNCTION(0x5, "mmc2")), /* CLK */
86 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
90 SUNXI_FUNCTION(0x3, "lcd1"), /* D11 */
91 SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */
92 SUNXI_FUNCTION(0x5, "mmc2")), /* D0 */
93 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
94 SUNXI_FUNCTION(0x0, "gpio_in"),
95 SUNXI_FUNCTION(0x1, "gpio_out"),
96 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
97 SUNXI_FUNCTION(0x3, "lcd1"), /* D12 */
98 SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */
99 SUNXI_FUNCTION(0x5, "mmc2")), /* D1 */
100 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
101 SUNXI_FUNCTION(0x0, "gpio_in"),
102 SUNXI_FUNCTION(0x1, "gpio_out"),
103 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
104 SUNXI_FUNCTION(0x3, "lcd1"), /* D13 */
105 SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */
106 SUNXI_FUNCTION(0x5, "mmc2")), /* D2 */
107 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
111 SUNXI_FUNCTION(0x3, "lcd1"), /* D14 */
112 SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */
113 SUNXI_FUNCTION(0x5, "mmc2")), /* D3 */
114 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
115 SUNXI_FUNCTION(0x0, "gpio_in"),
116 SUNXI_FUNCTION(0x1, "gpio_out"),
117 SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
118 SUNXI_FUNCTION(0x3, "lcd1")), /* D15 */
119 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
120 SUNXI_FUNCTION(0x0, "gpio_in"),
121 SUNXI_FUNCTION(0x1, "gpio_out"),
122 SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
123 SUNXI_FUNCTION(0x3, "lcd1")), /* D16 */
124 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
128 SUNXI_FUNCTION(0x3, "lcd1")), /* D17 */
129 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
130 SUNXI_FUNCTION(0x0, "gpio_in"),
131 SUNXI_FUNCTION(0x1, "gpio_out"),
132 SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
133 SUNXI_FUNCTION(0x3, "lcd1")), /* D18 */
134 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
135 SUNXI_FUNCTION(0x0, "gpio_in"),
136 SUNXI_FUNCTION(0x1, "gpio_out"),
137 SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */
138 SUNXI_FUNCTION(0x3, "lcd1"), /* D19 */
139 SUNXI_FUNCTION(0x4, "pwm3")), /* Positive */
140 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
141 SUNXI_FUNCTION(0x0, "gpio_in"),
142 SUNXI_FUNCTION(0x1, "gpio_out"),
143 SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */
144 SUNXI_FUNCTION(0x3, "lcd1"), /* D20 */
145 SUNXI_FUNCTION(0x4, "pwm3")), /* Negative */
146 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
147 SUNXI_FUNCTION(0x0, "gpio_in"),
148 SUNXI_FUNCTION(0x1, "gpio_out"),
149 SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */
150 SUNXI_FUNCTION(0x3, "lcd1"), /* D21 */
151 SUNXI_FUNCTION(0x4, "spi3")), /* CS0 */
152 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
153 SUNXI_FUNCTION(0x0, "gpio_in"),
154 SUNXI_FUNCTION(0x1, "gpio_out"),
155 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
156 SUNXI_FUNCTION(0x3, "lcd1"), /* D22 */
157 SUNXI_FUNCTION(0x4, "spi3")), /* CLK */
158 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "gmac"), /* COL */
162 SUNXI_FUNCTION(0x3, "lcd1"), /* D23 */
163 SUNXI_FUNCTION(0x4, "spi3")), /* MOSI */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "gmac"), /* CRS */
168 SUNXI_FUNCTION(0x3, "lcd1"), /* CLK */
169 SUNXI_FUNCTION(0x4, "spi3")), /* MISO */
170 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
171 SUNXI_FUNCTION(0x0, "gpio_in"),
172 SUNXI_FUNCTION(0x1, "gpio_out"),
173 SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */
174 SUNXI_FUNCTION(0x3, "lcd1"), /* DE */
175 SUNXI_FUNCTION(0x4, "spi3")), /* CS1 */
176 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
177 SUNXI_FUNCTION(0x0, "gpio_in"),
178 SUNXI_FUNCTION(0x1, "gpio_out"),
179 SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
180 SUNXI_FUNCTION(0x3, "lcd1")), /* HSYNC */
181 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */
185 SUNXI_FUNCTION(0x3, "lcd1")), /* VSYNC */
186 /* Hole */
187 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
188 SUNXI_FUNCTION(0x0, "gpio_in"),
189 SUNXI_FUNCTION(0x1, "gpio_out"),
190 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
191 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
192 SUNXI_FUNCTION(0x4, "csi")), /* MCLK1 */
193 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out"),
196 SUNXI_FUNCTION(0x2, "i2s0")), /* BCLK */
197 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
198 SUNXI_FUNCTION(0x0, "gpio_in"),
199 SUNXI_FUNCTION(0x1, "gpio_out"),
200 SUNXI_FUNCTION(0x2, "i2s0")), /* LRCK */
201 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out"),
204 SUNXI_FUNCTION(0x2, "i2s0")), /* DO0 */
205 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
206 SUNXI_FUNCTION(0x0, "gpio_in"),
207 SUNXI_FUNCTION(0x1, "gpio_out"),
208 SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */
209 SUNXI_FUNCTION(0x3, "uart3")), /* RTS */
210 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
211 SUNXI_FUNCTION(0x0, "gpio_in"),
212 SUNXI_FUNCTION(0x1, "gpio_out"),
213 SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */
214 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
215 SUNXI_FUNCTION(0x4, "i2c3")), /* SCK */
216 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */
220 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
221 SUNXI_FUNCTION(0x4, "i2c3")), /* SDA */
222 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
223 SUNXI_FUNCTION(0x0, "gpio_in"),
224 SUNXI_FUNCTION(0x1, "gpio_out"),
225 SUNXI_FUNCTION(0x3, "i2s0")), /* DI */
226 /* Hole */
227 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
228 SUNXI_FUNCTION(0x0, "gpio_in"),
229 SUNXI_FUNCTION(0x1, "gpio_out"),
230 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
231 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
232 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
233 SUNXI_FUNCTION(0x0, "gpio_in"),
234 SUNXI_FUNCTION(0x1, "gpio_out"),
235 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
236 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
237 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
238 SUNXI_FUNCTION(0x0, "gpio_in"),
239 SUNXI_FUNCTION(0x1, "gpio_out"),
240 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
241 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
242 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
246 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
250 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out"),
253 SUNXI_FUNCTION(0x2, "nand0")), /* RE */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
258 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
259 SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */
260 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
261 SUNXI_FUNCTION(0x0, "gpio_in"),
262 SUNXI_FUNCTION(0x1, "gpio_out"),
263 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
264 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
265 SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */
266 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
267 SUNXI_FUNCTION(0x0, "gpio_in"),
268 SUNXI_FUNCTION(0x1, "gpio_out"),
269 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
270 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
271 SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */
272 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
273 SUNXI_FUNCTION(0x0, "gpio_in"),
274 SUNXI_FUNCTION(0x1, "gpio_out"),
275 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
276 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
277 SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */
278 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
282 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
283 SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */
284 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
285 SUNXI_FUNCTION(0x0, "gpio_in"),
286 SUNXI_FUNCTION(0x1, "gpio_out"),
287 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
288 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
289 SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */
290 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out"),
293 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
294 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
295 SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
300 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
301 SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */
302 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out"),
305 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
306 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
307 SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */
308 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out"),
311 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
312 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
313 SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */
314 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
315 SUNXI_FUNCTION(0x0, "gpio_in"),
316 SUNXI_FUNCTION(0x1, "gpio_out"),
317 SUNXI_FUNCTION(0x2, "nand0"), /* DQ8 */
318 SUNXI_FUNCTION(0x3, "nand1")), /* DQ0 */
319 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
320 SUNXI_FUNCTION(0x0, "gpio_in"),
321 SUNXI_FUNCTION(0x1, "gpio_out"),
322 SUNXI_FUNCTION(0x2, "nand0"), /* DQ9 */
323 SUNXI_FUNCTION(0x3, "nand1")), /* DQ1 */
324 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
325 SUNXI_FUNCTION(0x0, "gpio_in"),
326 SUNXI_FUNCTION(0x1, "gpio_out"),
327 SUNXI_FUNCTION(0x2, "nand0"), /* DQ10 */
328 SUNXI_FUNCTION(0x3, "nand1")), /* DQ2 */
329 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
330 SUNXI_FUNCTION(0x0, "gpio_in"),
331 SUNXI_FUNCTION(0x1, "gpio_out"),
332 SUNXI_FUNCTION(0x2, "nand0"), /* DQ11 */
333 SUNXI_FUNCTION(0x3, "nand1")), /* DQ3 */
334 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
335 SUNXI_FUNCTION(0x0, "gpio_in"),
336 SUNXI_FUNCTION(0x1, "gpio_out"),
337 SUNXI_FUNCTION(0x2, "nand0"), /* DQ12 */
338 SUNXI_FUNCTION(0x3, "nand1")), /* DQ4 */
339 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
340 SUNXI_FUNCTION(0x0, "gpio_in"),
341 SUNXI_FUNCTION(0x1, "gpio_out"),
342 SUNXI_FUNCTION(0x2, "nand0"), /* DQ13 */
343 SUNXI_FUNCTION(0x3, "nand1")), /* DQ5 */
344 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
345 SUNXI_FUNCTION(0x0, "gpio_in"),
346 SUNXI_FUNCTION(0x1, "gpio_out"),
347 SUNXI_FUNCTION(0x2, "nand0"), /* DQ14 */
348 SUNXI_FUNCTION(0x3, "nand1")), /* DQ6 */
349 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
350 SUNXI_FUNCTION(0x0, "gpio_in"),
351 SUNXI_FUNCTION(0x1, "gpio_out"),
352 SUNXI_FUNCTION(0x2, "nand0"), /* DQ15 */
353 SUNXI_FUNCTION(0x3, "nand1")), /* DQ7 */
354 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
355 SUNXI_FUNCTION(0x0, "gpio_in"),
356 SUNXI_FUNCTION(0x1, "gpio_out"),
357 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
358 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
359 SUNXI_FUNCTION(0x4, "mmc3")), /* RST */
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
364 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
365 SUNXI_FUNCTION(0x0, "gpio_in"),
366 SUNXI_FUNCTION(0x1, "gpio_out"),
367 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
368 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
369 SUNXI_FUNCTION(0x0, "gpio_in"),
370 SUNXI_FUNCTION(0x1, "gpio_out"),
371 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
372 /* Hole */
373 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
374 SUNXI_FUNCTION(0x0, "gpio_in"),
375 SUNXI_FUNCTION(0x1, "gpio_out"),
376 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
377 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
378 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
379 SUNXI_FUNCTION(0x0, "gpio_in"),
380 SUNXI_FUNCTION(0x1, "gpio_out"),
381 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
382 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
383 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
384 SUNXI_FUNCTION(0x0, "gpio_in"),
385 SUNXI_FUNCTION(0x1, "gpio_out"),
386 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
387 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
388 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
389 SUNXI_FUNCTION(0x0, "gpio_in"),
390 SUNXI_FUNCTION(0x1, "gpio_out"),
391 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
392 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
393 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
394 SUNXI_FUNCTION(0x0, "gpio_in"),
395 SUNXI_FUNCTION(0x1, "gpio_out"),
396 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
397 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
398 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
399 SUNXI_FUNCTION(0x0, "gpio_in"),
400 SUNXI_FUNCTION(0x1, "gpio_out"),
401 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
402 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
403 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
404 SUNXI_FUNCTION(0x0, "gpio_in"),
405 SUNXI_FUNCTION(0x1, "gpio_out"),
406 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
407 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
408 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
409 SUNXI_FUNCTION(0x0, "gpio_in"),
410 SUNXI_FUNCTION(0x1, "gpio_out"),
411 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
412 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
413 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
414 SUNXI_FUNCTION(0x0, "gpio_in"),
415 SUNXI_FUNCTION(0x1, "gpio_out"),
416 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
417 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
419 SUNXI_FUNCTION(0x0, "gpio_in"),
420 SUNXI_FUNCTION(0x1, "gpio_out"),
421 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
422 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
423 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
424 SUNXI_FUNCTION(0x0, "gpio_in"),
425 SUNXI_FUNCTION(0x1, "gpio_out"),
426 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
427 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
428 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
429 SUNXI_FUNCTION(0x0, "gpio_in"),
430 SUNXI_FUNCTION(0x1, "gpio_out"),
431 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
432 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
433 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
434 SUNXI_FUNCTION(0x0, "gpio_in"),
435 SUNXI_FUNCTION(0x1, "gpio_out"),
436 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
437 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
438 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
439 SUNXI_FUNCTION(0x0, "gpio_in"),
440 SUNXI_FUNCTION(0x1, "gpio_out"),
441 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
442 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
443 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
444 SUNXI_FUNCTION(0x0, "gpio_in"),
445 SUNXI_FUNCTION(0x1, "gpio_out"),
446 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
447 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
448 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
449 SUNXI_FUNCTION(0x0, "gpio_in"),
450 SUNXI_FUNCTION(0x1, "gpio_out"),
451 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
452 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
453 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
454 SUNXI_FUNCTION(0x0, "gpio_in"),
455 SUNXI_FUNCTION(0x1, "gpio_out"),
456 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
457 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
458 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
459 SUNXI_FUNCTION(0x0, "gpio_in"),
460 SUNXI_FUNCTION(0x1, "gpio_out"),
461 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
462 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
463 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
464 SUNXI_FUNCTION(0x0, "gpio_in"),
465 SUNXI_FUNCTION(0x1, "gpio_out"),
466 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
467 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
468 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
469 SUNXI_FUNCTION(0x0, "gpio_in"),
470 SUNXI_FUNCTION(0x1, "gpio_out"),
471 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
472 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
473 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
474 SUNXI_FUNCTION(0x0, "gpio_in"),
475 SUNXI_FUNCTION(0x1, "gpio_out"),
476 SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */
477 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */
481 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
482 SUNXI_FUNCTION(0x0, "gpio_in"),
483 SUNXI_FUNCTION(0x1, "gpio_out"),
484 SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */
485 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
486 SUNXI_FUNCTION(0x0, "gpio_in"),
487 SUNXI_FUNCTION(0x1, "gpio_out"),
488 SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */
489 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */
493 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
494 SUNXI_FUNCTION(0x0, "gpio_in"),
495 SUNXI_FUNCTION(0x1, "gpio_out"),
496 SUNXI_FUNCTION(0x2, "lcd0")), /* DE */
497 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
498 SUNXI_FUNCTION(0x0, "gpio_in"),
499 SUNXI_FUNCTION(0x1, "gpio_out"),
500 SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */
501 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */
505 /* Hole */
506 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out"),
509 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
510 SUNXI_FUNCTION(0x3, "ts")), /* CLK */
511 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
515 SUNXI_FUNCTION(0x3, "ts")), /* ERR */
516 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
517 SUNXI_FUNCTION(0x0, "gpio_in"),
518 SUNXI_FUNCTION(0x1, "gpio_out"),
519 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
520 SUNXI_FUNCTION(0x3, "ts")), /* SYNC */
521 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
522 SUNXI_FUNCTION(0x0, "gpio_in"),
523 SUNXI_FUNCTION(0x1, "gpio_out"),
524 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
525 SUNXI_FUNCTION(0x3, "ts")), /* DVLD */
526 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
527 SUNXI_FUNCTION(0x0, "gpio_in"),
528 SUNXI_FUNCTION(0x1, "gpio_out"),
529 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
530 SUNXI_FUNCTION(0x3, "uart5")), /* TX */
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
532 SUNXI_FUNCTION(0x0, "gpio_in"),
533 SUNXI_FUNCTION(0x1, "gpio_out"),
534 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
535 SUNXI_FUNCTION(0x3, "uart5")), /* RX */
536 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
537 SUNXI_FUNCTION(0x0, "gpio_in"),
538 SUNXI_FUNCTION(0x1, "gpio_out"),
539 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
540 SUNXI_FUNCTION(0x3, "uart5")), /* RTS */
541 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
542 SUNXI_FUNCTION(0x0, "gpio_in"),
543 SUNXI_FUNCTION(0x1, "gpio_out"),
544 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
545 SUNXI_FUNCTION(0x3, "uart5")), /* CTS */
546 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
547 SUNXI_FUNCTION(0x0, "gpio_in"),
548 SUNXI_FUNCTION(0x1, "gpio_out"),
549 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
550 SUNXI_FUNCTION(0x3, "ts")), /* D0 */
551 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
552 SUNXI_FUNCTION(0x0, "gpio_in"),
553 SUNXI_FUNCTION(0x1, "gpio_out"),
554 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
555 SUNXI_FUNCTION(0x3, "ts")), /* D1 */
556 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
557 SUNXI_FUNCTION(0x0, "gpio_in"),
558 SUNXI_FUNCTION(0x1, "gpio_out"),
559 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
560 SUNXI_FUNCTION(0x3, "ts")), /* D2 */
561 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
562 SUNXI_FUNCTION(0x0, "gpio_in"),
563 SUNXI_FUNCTION(0x1, "gpio_out"),
564 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
565 SUNXI_FUNCTION(0x3, "ts")), /* D3 */
566 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
567 SUNXI_FUNCTION(0x0, "gpio_in"),
568 SUNXI_FUNCTION(0x1, "gpio_out"),
569 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
570 SUNXI_FUNCTION(0x3, "ts")), /* D4 */
571 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
572 SUNXI_FUNCTION(0x0, "gpio_in"),
573 SUNXI_FUNCTION(0x1, "gpio_out"),
574 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
575 SUNXI_FUNCTION(0x3, "ts")), /* D5 */
576 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
577 SUNXI_FUNCTION(0x0, "gpio_in"),
578 SUNXI_FUNCTION(0x1, "gpio_out"),
579 SUNXI_FUNCTION(0x2, "csi"), /* D10 */
580 SUNXI_FUNCTION(0x3, "ts")), /* D6 */
581 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
582 SUNXI_FUNCTION(0x0, "gpio_in"),
583 SUNXI_FUNCTION(0x1, "gpio_out"),
584 SUNXI_FUNCTION(0x2, "csi"), /* D11 */
585 SUNXI_FUNCTION(0x3, "ts")), /* D7 */
586 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
587 SUNXI_FUNCTION(0x0, "gpio_in"),
588 SUNXI_FUNCTION(0x1, "gpio_out"),
589 SUNXI_FUNCTION(0x2, "csi")), /* MIPI CSI MCLK */
590 /* Hole */
591 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
592 SUNXI_FUNCTION(0x0, "gpio_in"),
593 SUNXI_FUNCTION(0x1, "gpio_out"),
594 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
595 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
596 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
597 SUNXI_FUNCTION(0x0, "gpio_in"),
598 SUNXI_FUNCTION(0x1, "gpio_out"),
599 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
600 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
601 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
602 SUNXI_FUNCTION(0x0, "gpio_in"),
603 SUNXI_FUNCTION(0x1, "gpio_out"),
604 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
605 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
606 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
607 SUNXI_FUNCTION(0x0, "gpio_in"),
608 SUNXI_FUNCTION(0x1, "gpio_out"),
609 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
610 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
611 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
612 SUNXI_FUNCTION(0x0, "gpio_in"),
613 SUNXI_FUNCTION(0x1, "gpio_out"),
614 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
615 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
616 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
617 SUNXI_FUNCTION(0x0, "gpio_in"),
618 SUNXI_FUNCTION(0x1, "gpio_out"),
619 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
620 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
621 /* Hole */
622 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
623 SUNXI_FUNCTION(0x0, "gpio_in"),
624 SUNXI_FUNCTION(0x1, "gpio_out"),
625 SUNXI_FUNCTION(0x2, "mmc1")), /* CLK */
626 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
627 SUNXI_FUNCTION(0x0, "gpio_in"),
628 SUNXI_FUNCTION(0x1, "gpio_out"),
629 SUNXI_FUNCTION(0x2, "mmc1")), /* CMD */
630 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
631 SUNXI_FUNCTION(0x0, "gpio_in"),
632 SUNXI_FUNCTION(0x1, "gpio_out"),
633 SUNXI_FUNCTION(0x2, "mmc1")), /* D0 */
634 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
635 SUNXI_FUNCTION(0x0, "gpio_in"),
636 SUNXI_FUNCTION(0x1, "gpio_out"),
637 SUNXI_FUNCTION(0x2, "mmc1")), /* D1 */
638 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
639 SUNXI_FUNCTION(0x0, "gpio_in"),
640 SUNXI_FUNCTION(0x1, "gpio_out"),
641 SUNXI_FUNCTION(0x2, "mmc1")), /* D2 */
642 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
643 SUNXI_FUNCTION(0x0, "gpio_in"),
644 SUNXI_FUNCTION(0x1, "gpio_out"),
645 SUNXI_FUNCTION(0x2, "mmc1")), /* D3 */
646 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
647 SUNXI_FUNCTION(0x0, "gpio_in"),
648 SUNXI_FUNCTION(0x1, "gpio_out"),
649 SUNXI_FUNCTION(0x2, "uart2")), /* TX */
650 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
651 SUNXI_FUNCTION(0x0, "gpio_in"),
652 SUNXI_FUNCTION(0x1, "gpio_out"),
653 SUNXI_FUNCTION(0x2, "uart2")), /* RX */
654 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
655 SUNXI_FUNCTION(0x0, "gpio_in"),
656 SUNXI_FUNCTION(0x1, "gpio_out"),
657 SUNXI_FUNCTION(0x2, "uart2")), /* RTS */
658 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
659 SUNXI_FUNCTION(0x0, "gpio_in"),
660 SUNXI_FUNCTION(0x1, "gpio_out"),
661 SUNXI_FUNCTION(0x2, "uart2")), /* CTS */
662 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
663 SUNXI_FUNCTION(0x0, "gpio_in"),
664 SUNXI_FUNCTION(0x1, "gpio_out"),
665 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
666 SUNXI_FUNCTION(0x3, "usb")), /* DP3 */
667 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
668 SUNXI_FUNCTION(0x0, "gpio_in"),
669 SUNXI_FUNCTION(0x1, "gpio_out"),
670 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
671 SUNXI_FUNCTION(0x3, "usb")), /* DM3 */
672 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
673 SUNXI_FUNCTION(0x0, "gpio_in"),
674 SUNXI_FUNCTION(0x1, "gpio_out"),
675 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
676 SUNXI_FUNCTION(0x3, "i2s1")), /* MCLK */
677 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
678 SUNXI_FUNCTION(0x0, "gpio_in"),
679 SUNXI_FUNCTION(0x1, "gpio_out"),
680 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
681 SUNXI_FUNCTION(0x3, "i2s1")), /* BCLK */
682 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
683 SUNXI_FUNCTION(0x0, "gpio_in"),
684 SUNXI_FUNCTION(0x1, "gpio_out"),
685 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
686 SUNXI_FUNCTION(0x3, "i2s1")), /* LRCK */
687 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
688 SUNXI_FUNCTION(0x0, "gpio_in"),
689 SUNXI_FUNCTION(0x1, "gpio_out"),
690 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
691 SUNXI_FUNCTION(0x3, "i2s1")), /* DIN */
692 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
693 SUNXI_FUNCTION(0x0, "gpio_in"),
694 SUNXI_FUNCTION(0x1, "gpio_out"),
695 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
696 SUNXI_FUNCTION(0x3, "i2s1")), /* DOUT */
697 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
698 SUNXI_FUNCTION(0x0, "gpio_in"),
699 SUNXI_FUNCTION(0x1, "gpio_out"),
700 SUNXI_FUNCTION(0x2, "uart4")), /* TX */
701 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
702 SUNXI_FUNCTION(0x0, "gpio_in"),
703 SUNXI_FUNCTION(0x1, "gpio_out"),
704 SUNXI_FUNCTION(0x2, "uart4")), /* RX */
705 /* Hole */
706 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
707 SUNXI_FUNCTION(0x0, "gpio_in"),
708 SUNXI_FUNCTION(0x1, "gpio_out"),
709 SUNXI_FUNCTION(0x2, "nand1")), /* WE */
710 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
711 SUNXI_FUNCTION(0x0, "gpio_in"),
712 SUNXI_FUNCTION(0x1, "gpio_out"),
713 SUNXI_FUNCTION(0x2, "nand1")), /* ALE */
714 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
715 SUNXI_FUNCTION(0x0, "gpio_in"),
716 SUNXI_FUNCTION(0x1, "gpio_out"),
717 SUNXI_FUNCTION(0x2, "nand1")), /* CLE */
718 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
719 SUNXI_FUNCTION(0x0, "gpio_in"),
720 SUNXI_FUNCTION(0x1, "gpio_out"),
721 SUNXI_FUNCTION(0x2, "nand1")), /* CE1 */
722 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
723 SUNXI_FUNCTION(0x0, "gpio_in"),
724 SUNXI_FUNCTION(0x1, "gpio_out"),
725 SUNXI_FUNCTION(0x2, "nand1")), /* CE0 */
726 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
727 SUNXI_FUNCTION(0x0, "gpio_in"),
728 SUNXI_FUNCTION(0x1, "gpio_out"),
729 SUNXI_FUNCTION(0x2, "nand1")), /* RE */
730 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
731 SUNXI_FUNCTION(0x0, "gpio_in"),
732 SUNXI_FUNCTION(0x1, "gpio_out"),
733 SUNXI_FUNCTION(0x2, "nand1")), /* RB0 */
734 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
735 SUNXI_FUNCTION(0x0, "gpio_in"),
736 SUNXI_FUNCTION(0x1, "gpio_out"),
737 SUNXI_FUNCTION(0x2, "nand1")), /* RB1 */
738 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
739 SUNXI_FUNCTION(0x0, "gpio_in"),
740 SUNXI_FUNCTION(0x1, "gpio_out"),
741 SUNXI_FUNCTION(0x2, "nand1")), /* DQS */
742 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
743 SUNXI_FUNCTION(0x0, "gpio_in"),
744 SUNXI_FUNCTION(0x1, "gpio_out"),
745 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
746 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
747 SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */
748 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
749 SUNXI_FUNCTION(0x0, "gpio_in"),
750 SUNXI_FUNCTION(0x1, "gpio_out"),
751 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
752 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
753 SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */
754 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
755 SUNXI_FUNCTION(0x0, "gpio_in"),
756 SUNXI_FUNCTION(0x1, "gpio_out"),
757 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
758 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
759 SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */
760 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
761 SUNXI_FUNCTION(0x0, "gpio_in"),
762 SUNXI_FUNCTION(0x1, "gpio_out"),
763 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
764 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
765 SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */
766 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
767 SUNXI_FUNCTION(0x0, "gpio_in"),
768 SUNXI_FUNCTION(0x1, "gpio_out"),
769 SUNXI_FUNCTION(0x2, "pwm0")),
770 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
774 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
775 SUNXI_FUNCTION(0x0, "gpio_in"),
776 SUNXI_FUNCTION(0x1, "gpio_out"),
777 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
778 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
779 SUNXI_FUNCTION(0x0, "gpio_in"),
780 SUNXI_FUNCTION(0x1, "gpio_out"),
781 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
782 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
783 SUNXI_FUNCTION(0x0, "gpio_in"),
784 SUNXI_FUNCTION(0x1, "gpio_out"),
785 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
786 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
787 SUNXI_FUNCTION(0x0, "gpio_in"),
788 SUNXI_FUNCTION(0x1, "gpio_out"),
789 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
790 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
791 SUNXI_FUNCTION(0x0, "gpio_in"),
792 SUNXI_FUNCTION(0x1, "gpio_out"),
793 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
794 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
795 SUNXI_FUNCTION(0x0, "gpio_in"),
796 SUNXI_FUNCTION(0x1, "gpio_out"),
797 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
798 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
799 SUNXI_FUNCTION(0x0, "gpio_in"),
800 SUNXI_FUNCTION(0x1, "gpio_out"),
801 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
802 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
803 SUNXI_FUNCTION(0x0, "gpio_in"),
804 SUNXI_FUNCTION(0x1, "gpio_out")),
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out")),
808 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
809 SUNXI_FUNCTION(0x0, "gpio_in"),
810 SUNXI_FUNCTION(0x1, "gpio_out")),
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out")),
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out")),
817 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
818 SUNXI_FUNCTION(0x0, "gpio_in"),
819 SUNXI_FUNCTION(0x1, "gpio_out")),
820 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
821 SUNXI_FUNCTION(0x0, "gpio_in"),
822 SUNXI_FUNCTION(0x1, "gpio_out")),
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 29),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out"),
826 SUNXI_FUNCTION(0x2, "nand1")), /* CE2 */
827 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 30),
828 SUNXI_FUNCTION(0x0, "gpio_in"),
829 SUNXI_FUNCTION(0x1, "gpio_out"),
830 SUNXI_FUNCTION(0x2, "nand1")), /* CE3 */
831};
832
833static const struct sunxi_desc_pin sun6i_a31_r_pins[] = { 18static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
834 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), 19 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
835 SUNXI_FUNCTION(0x0, "gpio_in"), 20 SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -1913,11 +1098,6 @@ static const struct sunxi_desc_pin sun7i_a20_pins[] = {
1913 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */ 1098 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1914}; 1099};
1915 1100
1916static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
1917 .pins = sun6i_a31_pins,
1918 .npins = ARRAY_SIZE(sun6i_a31_pins),
1919};
1920
1921static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = { 1101static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
1922 .pins = sun6i_a31_r_pins, 1102 .pins = sun6i_a31_r_pins,
1923 .npins = ARRAY_SIZE(sun6i_a31_r_pins), 1103 .npins = ARRAY_SIZE(sun6i_a31_r_pins),
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index a339482655fe..6596e262596b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -674,7 +674,6 @@ static void sunxi_pinctrl_irq_handler(unsigned irq, struct irq_desc *desc)
674} 674}
675 675
676static struct of_device_id sunxi_pinctrl_match[] = { 676static struct of_device_id sunxi_pinctrl_match[] = {
677 { .compatible = "allwinner,sun6i-a31-pinctrl", .data = (void *)&sun6i_a31_pinctrl_data },
678 { .compatible = "allwinner,sun6i-a31-r-pinctrl", .data = (void *)&sun6i_a31_r_pinctrl_data }, 677 { .compatible = "allwinner,sun6i-a31-r-pinctrl", .data = (void *)&sun6i_a31_r_pinctrl_data },
679 { .compatible = "allwinner,sun7i-a20-pinctrl", .data = (void *)&sun7i_a20_pinctrl_data }, 678 { .compatible = "allwinner,sun7i-a20-pinctrl", .data = (void *)&sun7i_a20_pinctrl_data },
680 {} 679 {}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 20:49:06 -0500