diff options
author | Krzysztof Adamski <k@japko.eu> | 2016-02-02 16:21:51 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2016-02-11 08:29:24 -0500 |
commit | ba83a11104ae7d156c73f4db288ec7a0b7edcdb5 (patch) | |
tree | 9a7eae92de7b2d81fbb534622daf6c9a15c4aec0 /drivers/pinctrl/sunxi | |
parent | b6c2327577e03895f49be794e4c575ee2caa31cd (diff) |
pinctrl: sunxi: Add H3 R_PIO controller support
H3 has additional PIO controller similar to what we can find on A23.
It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi')
-rw-r--r-- | drivers/pinctrl/sunxi/Kconfig | 4 | ||||
-rw-r--r-- | drivers/pinctrl/sunxi/Makefile | 1 | ||||
-rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 106 |
3 files changed, 111 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index ac8388e67340..1868b8267f10 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig | |||
@@ -55,6 +55,10 @@ config PINCTRL_SUN8I_H3 | |||
55 | def_bool MACH_SUN8I | 55 | def_bool MACH_SUN8I |
56 | select PINCTRL_SUNXI | 56 | select PINCTRL_SUNXI |
57 | 57 | ||
58 | config PINCTRL_SUN8I_H3_R | ||
59 | def_bool MACH_SUN8I | ||
60 | select PINCTRL_SUNXI_COMMON | ||
61 | |||
58 | config PINCTRL_SUN9I_A80 | 62 | config PINCTRL_SUN9I_A80 |
59 | def_bool MACH_SUN9I | 63 | def_bool MACH_SUN9I |
60 | select PINCTRL_SUNXI | 64 | select PINCTRL_SUNXI |
diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile index dac1bd0cda4a..f22de0e5c49a 100644 --- a/drivers/pinctrl/sunxi/Makefile +++ b/drivers/pinctrl/sunxi/Makefile | |||
@@ -14,5 +14,6 @@ obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o | |||
14 | obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o | 14 | obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o |
15 | obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o | 15 | obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o |
16 | obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o | 16 | obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o |
17 | obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o | ||
17 | obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o | 18 | obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o |
18 | obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o | 19 | obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o |
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c new file mode 100644 index 000000000000..686ec212120b --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | |||
@@ -0,0 +1,106 @@ | |||
1 | /* | ||
2 | * Allwinner H3 SoCs pinctrl driver. | ||
3 | * | ||
4 | * Copyright (C) 2016 Krzysztof Adamski <k@japko.eu> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/of.h> | ||
14 | #include <linux/of_device.h> | ||
15 | #include <linux/pinctrl/pinctrl.h> | ||
16 | |||
17 | #include "pinctrl-sunxi.h" | ||
18 | |||
19 | static const struct sunxi_desc_pin sun8i_h3_r_pins[] = { | ||
20 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), | ||
21 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
22 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
23 | SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */ | ||
24 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ | ||
25 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), | ||
26 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
27 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
28 | SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */ | ||
29 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ | ||
30 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), | ||
31 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
32 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
33 | SUNXI_FUNCTION(0x2, "s_uart"), /* TX */ | ||
34 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ | ||
35 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), | ||
36 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
37 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
38 | SUNXI_FUNCTION(0x2, "s_uart"), /* RX */ | ||
39 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ | ||
40 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), | ||
41 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
42 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
43 | SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ | ||
44 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ | ||
45 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), | ||
46 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
47 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
48 | SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ | ||
49 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ | ||
50 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), | ||
51 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
52 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
53 | SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ | ||
54 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ | ||
55 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), | ||
56 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
57 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
58 | SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ | ||
59 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ | ||
60 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), | ||
61 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
62 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
63 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ | ||
64 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), | ||
65 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
66 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
67 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ | ||
68 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), | ||
69 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
70 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
71 | SUNXI_FUNCTION(0x2, "s_pwm"), | ||
72 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ | ||
73 | SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11), | ||
74 | SUNXI_FUNCTION(0x0, "gpio_in"), | ||
75 | SUNXI_FUNCTION(0x1, "gpio_out"), | ||
76 | SUNXI_FUNCTION(0x2, "s_cir_rx"), | ||
77 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */ | ||
78 | }; | ||
79 | |||
80 | static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_data = { | ||
81 | .pins = sun8i_h3_r_pins, | ||
82 | .npins = ARRAY_SIZE(sun8i_h3_r_pins), | ||
83 | .irq_banks = 1, | ||
84 | .pin_base = PL_BASE, | ||
85 | .irq_read_needs_mux = true | ||
86 | }; | ||
87 | |||
88 | static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev) | ||
89 | { | ||
90 | return sunxi_pinctrl_init(pdev, | ||
91 | &sun8i_h3_r_pinctrl_data); | ||
92 | } | ||
93 | |||
94 | static const struct of_device_id sun8i_h3_r_pinctrl_match[] = { | ||
95 | { .compatible = "allwinner,sun8i-h3-r-pinctrl", }, | ||
96 | {} | ||
97 | }; | ||
98 | |||
99 | static struct platform_driver sun8i_h3_r_pinctrl_driver = { | ||
100 | .probe = sun8i_h3_r_pinctrl_probe, | ||
101 | .driver = { | ||
102 | .name = "sun8i-h3-r-pinctrl", | ||
103 | .of_match_table = sun8i_h3_r_pinctrl_match, | ||
104 | }, | ||
105 | }; | ||
106 | builtin_platform_driver(sun8i_h3_r_pinctrl_driver); | ||