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authorMaxime Coquelin <mcoquelin.stm32@gmail.com>2016-01-14 07:16:30 -0500
committerLinus Walleij <linus.walleij@linaro.org>2016-01-27 08:18:46 -0500
commitaceb16dc2da58341bda939defaff0682fac13747 (patch)
tree4672b4d0890fae1045617e6afe5545e9908cc6ca /drivers/pinctrl/stm32
parent936516bfb3a111982295675055d1659274be70f0 (diff)
pinctrl: Add STM32 MCUs support
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32 family of MCUs. While it only supports STM32F429 for now, it has been designed to enable support of other MCUs of the family (e.g. STM32F746). Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/stm32')
-rw-r--r--drivers/pinctrl/stm32/Kconfig16
-rw-r--r--drivers/pinctrl/stm32/Makefile5
-rw-r--r--drivers/pinctrl/stm32/pinctrl-stm32.c834
-rw-r--r--drivers/pinctrl/stm32/pinctrl-stm32.h43
-rw-r--r--drivers/pinctrl/stm32/pinctrl-stm32f429.c1598
5 files changed, 2496 insertions, 0 deletions
diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
new file mode 100644
index 000000000000..0f28841b2332
--- /dev/null
+++ b/drivers/pinctrl/stm32/Kconfig
@@ -0,0 +1,16 @@
1if ARCH_STM32 || COMPILE_TEST
2
3config PINCTRL_STM32
4 bool
5 depends on OF
6 select PINMUX
7 select GENERIC_PINCONF
8 select GPIOLIB
9
10config PINCTRL_STM32F429
11 bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429
12 depends on OF
13 default MACH_STM32F429
14 select PINCTRL_STM32
15
16endif
diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile
new file mode 100644
index 000000000000..fc17d4238845
--- /dev/null
+++ b/drivers/pinctrl/stm32/Makefile
@@ -0,0 +1,5 @@
1# Core
2obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o
3
4# SoC Drivers
5obj-$(CONFIG_PINCTRL_STM32F429) += pinctrl-stm32f429.o
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
new file mode 100644
index 000000000000..d25d4a064bad
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -0,0 +1,834 @@
1/*
2 * Copyright (C) Maxime Coquelin 2015
3 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * License terms: GNU General Public License (GPL), version 2
5 *
6 * Heavily based on Mediatek's pinctrl driver
7 */
8#include <linux/clk.h>
9#include <linux/gpio.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_address.h>
14#include <linux/of_device.h>
15#include <linux/of_irq.h>
16#include <linux/pinctrl/consumer.h>
17#include <linux/pinctrl/machine.h>
18#include <linux/pinctrl/pinconf.h>
19#include <linux/pinctrl/pinconf-generic.h>
20#include <linux/pinctrl/pinctrl.h>
21#include <linux/pinctrl/pinmux.h>
22#include <linux/platform_device.h>
23#include <linux/reset.h>
24#include <linux/slab.h>
25
26#include <dt-bindings/pinctrl/pinctrl-stm32.h>
27
28#include "../core.h"
29#include "../pinconf.h"
30#include "../pinctrl-utils.h"
31#include "pinctrl-stm32.h"
32
33#define STM32_GPIO_MODER 0x00
34#define STM32_GPIO_TYPER 0x04
35#define STM32_GPIO_SPEEDR 0x08
36#define STM32_GPIO_PUPDR 0x0c
37#define STM32_GPIO_IDR 0x10
38#define STM32_GPIO_ODR 0x14
39#define STM32_GPIO_BSRR 0x18
40#define STM32_GPIO_LCKR 0x1c
41#define STM32_GPIO_AFRL 0x20
42#define STM32_GPIO_AFRH 0x24
43
44#define STM32_GPIO_PINS_PER_BANK 16
45
46#define gpio_range_to_bank(chip) \
47 container_of(chip, struct stm32_gpio_bank, range)
48
49#define gpio_chip_to_bank(chip) \
50 container_of(chip, struct stm32_gpio_bank, gpio_chip)
51
52static const char * const stm32_gpio_functions[] = {
53 "gpio", "af0", "af1",
54 "af2", "af3", "af4",
55 "af5", "af6", "af7",
56 "af8", "af9", "af10",
57 "af11", "af12", "af13",
58 "af14", "af15", "analog",
59};
60
61struct stm32_pinctrl_group {
62 const char *name;
63 unsigned long config;
64 unsigned pin;
65};
66
67struct stm32_gpio_bank {
68 void __iomem *base;
69 struct clk *clk;
70 spinlock_t lock;
71 struct gpio_chip gpio_chip;
72 struct pinctrl_gpio_range range;
73};
74
75struct stm32_pinctrl {
76 struct device *dev;
77 struct pinctrl_dev *pctl_dev;
78 struct pinctrl_desc pctl_desc;
79 struct stm32_pinctrl_group *groups;
80 unsigned ngroups;
81 const char **grp_names;
82 struct stm32_gpio_bank *banks;
83 unsigned nbanks;
84 const struct stm32_pinctrl_match_data *match_data;
85};
86
87static inline int stm32_gpio_pin(int gpio)
88{
89 return gpio % STM32_GPIO_PINS_PER_BANK;
90}
91
92static inline u32 stm32_gpio_get_mode(u32 function)
93{
94 switch (function) {
95 case STM32_PIN_GPIO:
96 return 0;
97 case STM32_PIN_AF(0) ... STM32_PIN_AF(15):
98 return 2;
99 case STM32_PIN_ANALOG:
100 return 3;
101 }
102
103 return 0;
104}
105
106static inline u32 stm32_gpio_get_alt(u32 function)
107{
108 switch (function) {
109 case STM32_PIN_GPIO:
110 return 0;
111 case STM32_PIN_AF(0) ... STM32_PIN_AF(15):
112 return function - 1;
113 case STM32_PIN_ANALOG:
114 return 0;
115 }
116
117 return 0;
118}
119
120/* GPIO functions */
121
122static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank,
123 unsigned offset, int value)
124{
125 if (!value)
126 offset += STM32_GPIO_PINS_PER_BANK;
127
128 clk_enable(bank->clk);
129
130 writel_relaxed(BIT(offset), bank->base + STM32_GPIO_BSRR);
131
132 clk_disable(bank->clk);
133}
134
135static int stm32_gpio_request(struct gpio_chip *chip, unsigned offset)
136{
137 return pinctrl_request_gpio(chip->base + offset);
138}
139
140static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset)
141{
142 pinctrl_free_gpio(chip->base + offset);
143}
144
145static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset)
146{
147 struct stm32_gpio_bank *bank = gpio_chip_to_bank(chip);
148 int ret;
149
150 clk_enable(bank->clk);
151
152 ret = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
153
154 clk_disable(bank->clk);
155
156 return ret;
157}
158
159static void stm32_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
160{
161 struct stm32_gpio_bank *bank = gpio_chip_to_bank(chip);
162
163 __stm32_gpio_set(bank, offset, value);
164}
165
166static int stm32_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
167{
168 return pinctrl_gpio_direction_input(chip->base + offset);
169}
170
171static int stm32_gpio_direction_output(struct gpio_chip *chip,
172 unsigned offset, int value)
173{
174 struct stm32_gpio_bank *bank = gpio_chip_to_bank(chip);
175
176 __stm32_gpio_set(bank, offset, value);
177 pinctrl_gpio_direction_output(chip->base + offset);
178
179 return 0;
180}
181
182static struct gpio_chip stm32_gpio_template = {
183 .request = stm32_gpio_request,
184 .free = stm32_gpio_free,
185 .get = stm32_gpio_get,
186 .set = stm32_gpio_set,
187 .direction_input = stm32_gpio_direction_input,
188 .direction_output = stm32_gpio_direction_output,
189};
190
191/* Pinctrl functions */
192
193static struct stm32_pinctrl_group *
194stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin)
195{
196 int i;
197
198 for (i = 0; i < pctl->ngroups; i++) {
199 struct stm32_pinctrl_group *grp = pctl->groups + i;
200
201 if (grp->pin == pin)
202 return grp;
203 }
204
205 return NULL;
206}
207
208static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl,
209 u32 pin_num, u32 fnum)
210{
211 int i;
212
213 for (i = 0; i < pctl->match_data->npins; i++) {
214 const struct stm32_desc_pin *pin = pctl->match_data->pins + i;
215 const struct stm32_desc_function *func = pin->functions;
216
217 if (pin->pin.number != pin_num)
218 continue;
219
220 while (func && func->name) {
221 if (func->num == fnum)
222 return true;
223 func++;
224 }
225
226 break;
227 }
228
229 return false;
230}
231
232static int stm32_pctrl_dt_node_to_map_func(struct stm32_pinctrl *pctl,
233 u32 pin, u32 fnum, struct stm32_pinctrl_group *grp,
234 struct pinctrl_map **map, unsigned *reserved_maps,
235 unsigned *num_maps)
236{
237 if (*num_maps == *reserved_maps)
238 return -ENOSPC;
239
240 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
241 (*map)[*num_maps].data.mux.group = grp->name;
242
243 if (!stm32_pctrl_is_function_valid(pctl, pin, fnum)) {
244 dev_err(pctl->dev, "invalid function %d on pin %d .\n",
245 fnum, pin);
246 return -EINVAL;
247 }
248
249 (*map)[*num_maps].data.mux.function = stm32_gpio_functions[fnum];
250 (*num_maps)++;
251
252 return 0;
253}
254
255static int stm32_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
256 struct device_node *node,
257 struct pinctrl_map **map,
258 unsigned *reserved_maps,
259 unsigned *num_maps)
260{
261 struct stm32_pinctrl *pctl;
262 struct stm32_pinctrl_group *grp;
263 struct property *pins;
264 u32 pinfunc, pin, func;
265 unsigned long *configs;
266 unsigned int num_configs;
267 bool has_config = 0;
268 unsigned reserve = 0;
269 int num_pins, num_funcs, maps_per_pin, i, err;
270
271 pctl = pinctrl_dev_get_drvdata(pctldev);
272
273 pins = of_find_property(node, "pinmux", NULL);
274 if (!pins) {
275 dev_err(pctl->dev, "missing pins property in node %s .\n",
276 node->name);
277 return -EINVAL;
278 }
279
280 err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
281 &num_configs);
282 if (err)
283 return err;
284
285 if (num_configs)
286 has_config = 1;
287
288 num_pins = pins->length / sizeof(u32);
289 num_funcs = num_pins;
290 maps_per_pin = 0;
291 if (num_funcs)
292 maps_per_pin++;
293 if (has_config && num_pins >= 1)
294 maps_per_pin++;
295
296 if (!num_pins || !maps_per_pin)
297 return -EINVAL;
298
299 reserve = num_pins * maps_per_pin;
300
301 err = pinctrl_utils_reserve_map(pctldev, map,
302 reserved_maps, num_maps, reserve);
303 if (err)
304 return err;
305
306 for (i = 0; i < num_pins; i++) {
307 err = of_property_read_u32_index(node, "pinmux",
308 i, &pinfunc);
309 if (err)
310 return err;
311
312 pin = STM32_GET_PIN_NO(pinfunc);
313 func = STM32_GET_PIN_FUNC(pinfunc);
314
315 if (pin >= pctl->match_data->npins) {
316 dev_err(pctl->dev, "invalid pin number.\n");
317 return -EINVAL;
318 }
319
320 if (!stm32_pctrl_is_function_valid(pctl, pin, func)) {
321 dev_err(pctl->dev, "invalid function.\n");
322 return -EINVAL;
323 }
324
325 grp = stm32_pctrl_find_group_by_pin(pctl, pin);
326 if (!grp) {
327 dev_err(pctl->dev, "unable to match pin %d to group\n",
328 pin);
329 return -EINVAL;
330 }
331
332 err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map,
333 reserved_maps, num_maps);
334 if (err)
335 return err;
336
337 if (has_config) {
338 err = pinctrl_utils_add_map_configs(pctldev, map,
339 reserved_maps, num_maps, grp->name,
340 configs, num_configs,
341 PIN_MAP_TYPE_CONFIGS_GROUP);
342 if (err)
343 return err;
344 }
345 }
346
347 return 0;
348}
349
350static int stm32_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
351 struct device_node *np_config,
352 struct pinctrl_map **map, unsigned *num_maps)
353{
354 struct device_node *np;
355 unsigned reserved_maps;
356 int ret;
357
358 *map = NULL;
359 *num_maps = 0;
360 reserved_maps = 0;
361
362 for_each_child_of_node(np_config, np) {
363 ret = stm32_pctrl_dt_subnode_to_map(pctldev, np, map,
364 &reserved_maps, num_maps);
365 if (ret < 0) {
366 pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
367 return ret;
368 }
369 }
370
371 return 0;
372}
373
374static int stm32_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
375{
376 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
377
378 return pctl->ngroups;
379}
380
381static const char *stm32_pctrl_get_group_name(struct pinctrl_dev *pctldev,
382 unsigned group)
383{
384 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
385
386 return pctl->groups[group].name;
387}
388
389static int stm32_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
390 unsigned group,
391 const unsigned **pins,
392 unsigned *num_pins)
393{
394 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
395
396 *pins = (unsigned *)&pctl->groups[group].pin;
397 *num_pins = 1;
398
399 return 0;
400}
401
402static const struct pinctrl_ops stm32_pctrl_ops = {
403 .dt_node_to_map = stm32_pctrl_dt_node_to_map,
404 .dt_free_map = pinctrl_utils_dt_free_map,
405 .get_groups_count = stm32_pctrl_get_groups_count,
406 .get_group_name = stm32_pctrl_get_group_name,
407 .get_group_pins = stm32_pctrl_get_group_pins,
408};
409
410
411/* Pinmux functions */
412
413static int stm32_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
414{
415 return ARRAY_SIZE(stm32_gpio_functions);
416}
417
418static const char *stm32_pmx_get_func_name(struct pinctrl_dev *pctldev,
419 unsigned selector)
420{
421 return stm32_gpio_functions[selector];
422}
423
424static int stm32_pmx_get_func_groups(struct pinctrl_dev *pctldev,
425 unsigned function,
426 const char * const **groups,
427 unsigned * const num_groups)
428{
429 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
430
431 *groups = pctl->grp_names;
432 *num_groups = pctl->ngroups;
433
434 return 0;
435}
436
437static void stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
438 int pin, u32 mode, u32 alt)
439{
440 u32 val;
441 int alt_shift = (pin % 8) * 4;
442 int alt_offset = STM32_GPIO_AFRL + (pin / 8) * 4;
443 unsigned long flags;
444
445 clk_enable(bank->clk);
446 spin_lock_irqsave(&bank->lock, flags);
447
448 val = readl_relaxed(bank->base + alt_offset);
449 val &= ~GENMASK(alt_shift + 3, alt_shift);
450 val |= (alt << alt_shift);
451 writel_relaxed(val, bank->base + alt_offset);
452
453 val = readl_relaxed(bank->base + STM32_GPIO_MODER);
454 val &= ~GENMASK(pin * 2 + 1, pin * 2);
455 val |= mode << (pin * 2);
456 writel_relaxed(val, bank->base + STM32_GPIO_MODER);
457
458 spin_unlock_irqrestore(&bank->lock, flags);
459 clk_disable(bank->clk);
460}
461
462static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev,
463 unsigned function,
464 unsigned group)
465{
466 bool ret;
467 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
468 struct stm32_pinctrl_group *g = pctl->groups + group;
469 struct pinctrl_gpio_range *range;
470 struct stm32_gpio_bank *bank;
471 u32 mode, alt;
472 int pin;
473
474 ret = stm32_pctrl_is_function_valid(pctl, g->pin, function);
475 if (!ret) {
476 dev_err(pctl->dev, "invalid function %d on group %d .\n",
477 function, group);
478 return -EINVAL;
479 }
480
481 range = pinctrl_find_gpio_range_from_pin(pctldev, g->pin);
482 bank = gpio_range_to_bank(range);
483 pin = stm32_gpio_pin(g->pin);
484
485 mode = stm32_gpio_get_mode(function);
486 alt = stm32_gpio_get_alt(function);
487
488 stm32_pmx_set_mode(bank, pin, mode, alt);
489
490 return 0;
491}
492
493static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
494 struct pinctrl_gpio_range *range, unsigned gpio,
495 bool input)
496{
497 struct stm32_gpio_bank *bank = gpio_range_to_bank(range);
498 int pin = stm32_gpio_pin(gpio);
499
500 stm32_pmx_set_mode(bank, pin, !input, 0);
501
502 return 0;
503}
504
505static const struct pinmux_ops stm32_pmx_ops = {
506 .get_functions_count = stm32_pmx_get_funcs_cnt,
507 .get_function_name = stm32_pmx_get_func_name,
508 .get_function_groups = stm32_pmx_get_func_groups,
509 .set_mux = stm32_pmx_set_mux,
510 .gpio_set_direction = stm32_pmx_gpio_set_direction,
511};
512
513/* Pinconf functions */
514
515static void stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
516 unsigned offset, u32 drive)
517{
518 unsigned long flags;
519 u32 val;
520
521 clk_enable(bank->clk);
522 spin_lock_irqsave(&bank->lock, flags);
523
524 val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
525 val &= ~BIT(offset);
526 val |= drive << offset;
527 writel_relaxed(val, bank->base + STM32_GPIO_TYPER);
528
529 spin_unlock_irqrestore(&bank->lock, flags);
530 clk_disable(bank->clk);
531}
532
533static void stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
534 unsigned offset, u32 speed)
535{
536 unsigned long flags;
537 u32 val;
538
539 clk_enable(bank->clk);
540 spin_lock_irqsave(&bank->lock, flags);
541
542 val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
543 val &= ~GENMASK(offset * 2 + 1, offset * 2);
544 val |= speed << (offset * 2);
545 writel_relaxed(val, bank->base + STM32_GPIO_SPEEDR);
546
547 spin_unlock_irqrestore(&bank->lock, flags);
548 clk_disable(bank->clk);
549}
550
551static void stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
552 unsigned offset, u32 bias)
553{
554 unsigned long flags;
555 u32 val;
556
557 clk_enable(bank->clk);
558 spin_lock_irqsave(&bank->lock, flags);
559
560 val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
561 val &= ~GENMASK(offset * 2 + 1, offset * 2);
562 val |= bias << (offset * 2);
563 writel_relaxed(val, bank->base + STM32_GPIO_PUPDR);
564
565 spin_unlock_irqrestore(&bank->lock, flags);
566 clk_disable(bank->clk);
567}
568
569static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
570 unsigned int pin, enum pin_config_param param,
571 enum pin_config_param arg)
572{
573 struct pinctrl_gpio_range *range;
574 struct stm32_gpio_bank *bank;
575 int offset, ret = 0;
576
577 range = pinctrl_find_gpio_range_from_pin(pctldev, pin);
578 bank = gpio_range_to_bank(range);
579 offset = stm32_gpio_pin(pin);
580
581 switch (param) {
582 case PIN_CONFIG_DRIVE_PUSH_PULL:
583 stm32_pconf_set_driving(bank, offset, 0);
584 break;
585 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
586 stm32_pconf_set_driving(bank, offset, 1);
587 break;
588 case PIN_CONFIG_SLEW_RATE:
589 stm32_pconf_set_speed(bank, offset, arg);
590 break;
591 case PIN_CONFIG_BIAS_DISABLE:
592 stm32_pconf_set_bias(bank, offset, 0);
593 break;
594 case PIN_CONFIG_BIAS_PULL_UP:
595 stm32_pconf_set_bias(bank, offset, 1);
596 break;
597 case PIN_CONFIG_BIAS_PULL_DOWN:
598 stm32_pconf_set_bias(bank, offset, 2);
599 break;
600 case PIN_CONFIG_OUTPUT:
601 __stm32_gpio_set(bank, offset, arg);
602 ret = stm32_pmx_gpio_set_direction(pctldev, NULL, pin, false);
603 break;
604 default:
605 ret = -EINVAL;
606 }
607
608 return ret;
609}
610
611static int stm32_pconf_group_get(struct pinctrl_dev *pctldev,
612 unsigned group,
613 unsigned long *config)
614{
615 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
616
617 *config = pctl->groups[group].config;
618
619 return 0;
620}
621
622static int stm32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
623 unsigned long *configs, unsigned num_configs)
624{
625 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
626 struct stm32_pinctrl_group *g = &pctl->groups[group];
627 int i, ret;
628
629 for (i = 0; i < num_configs; i++) {
630 ret = stm32_pconf_parse_conf(pctldev, g->pin,
631 pinconf_to_config_param(configs[i]),
632 pinconf_to_config_argument(configs[i]));
633 if (ret < 0)
634 return ret;
635
636 g->config = configs[i];
637 }
638
639 return 0;
640}
641
642static const struct pinconf_ops stm32_pconf_ops = {
643 .pin_config_group_get = stm32_pconf_group_get,
644 .pin_config_group_set = stm32_pconf_group_set,
645};
646
647static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
648 struct device_node *np)
649{
650 int bank_nr = pctl->nbanks;
651 struct stm32_gpio_bank *bank = &pctl->banks[bank_nr];
652 struct pinctrl_gpio_range *range = &bank->range;
653 struct device *dev = pctl->dev;
654 struct resource res;
655 struct reset_control *rstc;
656 int err, npins;
657
658 rstc = of_reset_control_get(np, NULL);
659 if (!IS_ERR(rstc))
660 reset_control_deassert(rstc);
661
662 if (of_address_to_resource(np, 0, &res))
663 return -ENODEV;
664
665 bank->base = devm_ioremap_resource(dev, &res);
666 if (IS_ERR(bank->base))
667 return PTR_ERR(bank->base);
668
669 bank->clk = of_clk_get_by_name(np, NULL);
670 if (IS_ERR(bank->clk)) {
671 dev_err(dev, "failed to get clk (%ld)\n", PTR_ERR(bank->clk));
672 return PTR_ERR(bank->clk);
673 }
674
675 err = clk_prepare(bank->clk);
676 if (err) {
677 dev_err(dev, "failed to prepare clk (%d)\n", err);
678 return err;
679 }
680
681 npins = pctl->match_data->npins;
682 npins -= bank_nr * STM32_GPIO_PINS_PER_BANK;
683 if (npins < 0)
684 return -EINVAL;
685 else if (npins > STM32_GPIO_PINS_PER_BANK)
686 npins = STM32_GPIO_PINS_PER_BANK;
687
688 bank->gpio_chip = stm32_gpio_template;
689 bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
690 bank->gpio_chip.ngpio = npins;
691 bank->gpio_chip.of_node = np;
692 bank->gpio_chip.dev = dev;
693 spin_lock_init(&bank->lock);
694
695 of_property_read_string(np, "st,bank-name", &range->name);
696 bank->gpio_chip.label = range->name;
697
698 range->id = bank_nr;
699 range->pin_base = range->base = range->id * STM32_GPIO_PINS_PER_BANK;
700 range->npins = bank->gpio_chip.ngpio;
701 range->gc = &bank->gpio_chip;
702 err = gpiochip_add(&bank->gpio_chip);
703 if (err) {
704 dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_nr);
705 return err;
706 }
707
708 dev_info(dev, "%s bank added\n", range->name);
709 return 0;
710}
711
712static int stm32_pctrl_build_state(struct platform_device *pdev)
713{
714 struct stm32_pinctrl *pctl = platform_get_drvdata(pdev);
715 int i;
716
717 pctl->ngroups = pctl->match_data->npins;
718
719 /* Allocate groups */
720 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups,
721 sizeof(*pctl->groups), GFP_KERNEL);
722 if (!pctl->groups)
723 return -ENOMEM;
724
725 /* We assume that one pin is one group, use pin name as group name. */
726 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups,
727 sizeof(*pctl->grp_names), GFP_KERNEL);
728 if (!pctl->grp_names)
729 return -ENOMEM;
730
731 for (i = 0; i < pctl->match_data->npins; i++) {
732 const struct stm32_desc_pin *pin = pctl->match_data->pins + i;
733 struct stm32_pinctrl_group *group = pctl->groups + i;
734
735 group->name = pin->pin.name;
736 group->pin = pin->pin.number;
737
738 pctl->grp_names[i] = pin->pin.name;
739 }
740
741 return 0;
742}
743
744int stm32_pctl_probe(struct platform_device *pdev)
745{
746 struct device_node *np = pdev->dev.of_node;
747 struct device_node *child;
748 const struct of_device_id *match;
749 struct device *dev = &pdev->dev;
750 struct stm32_pinctrl *pctl;
751 struct pinctrl_pin_desc *pins;
752 int i, ret, banks = 0;
753
754 if (!np)
755 return -EINVAL;
756
757 match = of_match_device(dev->driver->of_match_table, dev);
758 if (!match || !match->data)
759 return -EINVAL;
760
761 if (!of_find_property(np, "pins-are-numbered", NULL)) {
762 dev_err(dev, "only support pins-are-numbered format\n");
763 return -EINVAL;
764 }
765
766 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL);
767 if (!pctl)
768 return -ENOMEM;
769
770 platform_set_drvdata(pdev, pctl);
771
772 pctl->dev = dev;
773 pctl->match_data = match->data;
774 ret = stm32_pctrl_build_state(pdev);
775 if (ret) {
776 dev_err(dev, "build state failed: %d\n", ret);
777 return -EINVAL;
778 }
779
780 for_each_child_of_node(np, child)
781 if (of_property_read_bool(child, "gpio-controller"))
782 banks++;
783
784 if (!banks) {
785 dev_err(dev, "at least one GPIO bank is required\n");
786 return -EINVAL;
787 }
788
789 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks),
790 GFP_KERNEL);
791 if (!pctl->banks)
792 return -ENOMEM;
793
794 for_each_child_of_node(np, child) {
795 if (of_property_read_bool(child, "gpio-controller")) {
796 ret = stm32_gpiolib_register_bank(pctl, child);
797 if (ret)
798 return ret;
799
800 pctl->nbanks++;
801 }
802 }
803
804 pins = devm_kcalloc(&pdev->dev, pctl->match_data->npins, sizeof(*pins),
805 GFP_KERNEL);
806 if (!pins)
807 return -ENOMEM;
808
809 for (i = 0; i < pctl->match_data->npins; i++)
810 pins[i] = pctl->match_data->pins[i].pin;
811
812 pctl->pctl_desc.name = dev_name(&pdev->dev);
813 pctl->pctl_desc.owner = THIS_MODULE;
814 pctl->pctl_desc.pins = pins;
815 pctl->pctl_desc.npins = pctl->match_data->npins;
816 pctl->pctl_desc.confops = &stm32_pconf_ops;
817 pctl->pctl_desc.pctlops = &stm32_pctrl_ops;
818 pctl->pctl_desc.pmxops = &stm32_pmx_ops;
819 pctl->dev = &pdev->dev;
820
821 pctl->pctl_dev = pinctrl_register(&pctl->pctl_desc, &pdev->dev, pctl);
822 if (!pctl->pctl_dev) {
823 dev_err(&pdev->dev, "Failed pinctrl registration\n");
824 return -EINVAL;
825 }
826
827 for (i = 0; i < pctl->nbanks; i++)
828 pinctrl_add_gpio_range(pctl->pctl_dev, &pctl->banks[i].range);
829
830 dev_info(dev, "Pinctrl STM32 initialized\n");
831
832 return 0;
833}
834
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.h b/drivers/pinctrl/stm32/pinctrl-stm32.h
new file mode 100644
index 000000000000..1b7c369acd8c
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright (C) Maxime Coquelin 2015
3 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * License terms: GNU General Public License (GPL), version 2
5 */
6#ifndef __PINCTRL_STM32_H
7#define __PINCTRL_STM32_H
8
9#include <linux/pinctrl/pinctrl.h>
10#include <linux/pinctrl/pinconf-generic.h>
11
12struct stm32_desc_function {
13 const char *name;
14 const unsigned char num;
15};
16
17struct stm32_desc_pin {
18 struct pinctrl_pin_desc pin;
19 const struct stm32_desc_function *functions;
20};
21
22#define STM32_PIN(_pin, ...) \
23 { \
24 .pin = _pin, \
25 .functions = (struct stm32_desc_function[]){ \
26 __VA_ARGS__, { } }, \
27 }
28
29#define STM32_FUNCTION(_num, _name) \
30 { \
31 .num = _num, \
32 .name = _name, \
33 }
34
35struct stm32_pinctrl_match_data {
36 const struct stm32_desc_pin *pins;
37 const unsigned int npins;
38};
39
40int stm32_pctl_probe(struct platform_device *pdev);
41
42#endif /* __PINCTRL_STM32_H */
43
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f429.c b/drivers/pinctrl/stm32/pinctrl-stm32f429.c
new file mode 100644
index 000000000000..f34016b51375
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32f429.c
@@ -0,0 +1,1598 @@
1/*
2 * Copyright (C) Maxime Coquelin 2015
3 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * License terms: GNU General Public License (GPL), version 2
5 */
6#include <linux/init.h>
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/platform_device.h>
10
11#include "pinctrl-stm32.h"
12
13static const struct stm32_desc_pin stm32f429_pins[] = {
14 STM32_PIN(
15 PINCTRL_PIN(0, "PA0"),
16 STM32_FUNCTION(0, "GPIOA0"),
17 STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
18 STM32_FUNCTION(3, "TIM5_CH1"),
19 STM32_FUNCTION(4, "TIM8_ETR"),
20 STM32_FUNCTION(8, "USART2_CTS"),
21 STM32_FUNCTION(9, "UART4_TX"),
22 STM32_FUNCTION(12, "ETH_MII_CRS"),
23 STM32_FUNCTION(16, "EVENTOUT"),
24 STM32_FUNCTION(17, "ANALOG")
25 ),
26 STM32_PIN(
27 PINCTRL_PIN(1, "PA1"),
28 STM32_FUNCTION(0, "GPIOA1"),
29 STM32_FUNCTION(2, "TIM2_CH2"),
30 STM32_FUNCTION(3, "TIM5_CH2"),
31 STM32_FUNCTION(8, "USART2_RTS"),
32 STM32_FUNCTION(9, "UART4_RX"),
33 STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"),
34 STM32_FUNCTION(16, "EVENTOUT"),
35 STM32_FUNCTION(17, "ANALOG")
36 ),
37 STM32_PIN(
38 PINCTRL_PIN(2, "PA2"),
39 STM32_FUNCTION(0, "GPIOA2"),
40 STM32_FUNCTION(2, "TIM2_CH3"),
41 STM32_FUNCTION(3, "TIM5_CH3"),
42 STM32_FUNCTION(4, "TIM9_CH1"),
43 STM32_FUNCTION(8, "USART2_TX"),
44 STM32_FUNCTION(12, "ETH_MDIO"),
45 STM32_FUNCTION(16, "EVENTOUT"),
46 STM32_FUNCTION(17, "ANALOG")
47 ),
48 STM32_PIN(
49 PINCTRL_PIN(3, "PA3"),
50 STM32_FUNCTION(0, "GPIOA3"),
51 STM32_FUNCTION(2, "TIM2_CH4"),
52 STM32_FUNCTION(3, "TIM5_CH4"),
53 STM32_FUNCTION(4, "TIM9_CH2"),
54 STM32_FUNCTION(8, "USART2_RX"),
55 STM32_FUNCTION(11, "OTG_HS_ULPI_D0"),
56 STM32_FUNCTION(12, "ETH_MII_COL"),
57 STM32_FUNCTION(15, "LCD_B5"),
58 STM32_FUNCTION(16, "EVENTOUT"),
59 STM32_FUNCTION(17, "ANALOG")
60 ),
61 STM32_PIN(
62 PINCTRL_PIN(4, "PA4"),
63 STM32_FUNCTION(0, "GPIOA4"),
64 STM32_FUNCTION(6, "SPI1_NSS"),
65 STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
66 STM32_FUNCTION(8, "USART2_CK"),
67 STM32_FUNCTION(13, "OTG_HS_SOF"),
68 STM32_FUNCTION(14, "DCMI_HSYNC"),
69 STM32_FUNCTION(15, "LCD_VSYNC"),
70 STM32_FUNCTION(16, "EVENTOUT"),
71 STM32_FUNCTION(17, "ANALOG")
72 ),
73 STM32_PIN(
74 PINCTRL_PIN(5, "PA5"),
75 STM32_FUNCTION(0, "GPIOA5"),
76 STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
77 STM32_FUNCTION(4, "TIM8_CH1N"),
78 STM32_FUNCTION(6, "SPI1_SCK"),
79 STM32_FUNCTION(11, "OTG_HS_ULPI_CK"),
80 STM32_FUNCTION(16, "EVENTOUT"),
81 STM32_FUNCTION(17, "ANALOG")
82 ),
83 STM32_PIN(
84 PINCTRL_PIN(6, "PA6"),
85 STM32_FUNCTION(0, "GPIOA6"),
86 STM32_FUNCTION(2, "TIM1_BKIN"),
87 STM32_FUNCTION(3, "TIM3_CH1"),
88 STM32_FUNCTION(4, "TIM8_BKIN"),
89 STM32_FUNCTION(6, "SPI1_MISO"),
90 STM32_FUNCTION(10, "TIM13_CH1"),
91 STM32_FUNCTION(14, "DCMI_PIXCLK"),
92 STM32_FUNCTION(15, "LCD_G2"),
93 STM32_FUNCTION(16, "EVENTOUT"),
94 STM32_FUNCTION(17, "ANALOG")
95 ),
96 STM32_PIN(
97 PINCTRL_PIN(7, "PA7"),
98 STM32_FUNCTION(0, "GPIOA7"),
99 STM32_FUNCTION(2, "TIM1_CH1N"),
100 STM32_FUNCTION(3, "TIM3_CH2"),
101 STM32_FUNCTION(4, "TIM8_CH1N"),
102 STM32_FUNCTION(6, "SPI1_MOSI"),
103 STM32_FUNCTION(10, "TIM14_CH1"),
104 STM32_FUNCTION(12, "ETH_MII_RX_DV ETH_RMII_CRS_DV"),
105 STM32_FUNCTION(16, "EVENTOUT"),
106 STM32_FUNCTION(17, "ANALOG")
107 ),
108 STM32_PIN(
109 PINCTRL_PIN(8, "PA8"),
110 STM32_FUNCTION(0, "GPIOA8"),
111 STM32_FUNCTION(1, "MCO1"),
112 STM32_FUNCTION(2, "TIM1_CH1"),
113 STM32_FUNCTION(5, "I2C3_SCL"),
114 STM32_FUNCTION(8, "USART1_CK"),
115 STM32_FUNCTION(11, "OTG_FS_SOF"),
116 STM32_FUNCTION(15, "LCD_R6"),
117 STM32_FUNCTION(16, "EVENTOUT"),
118 STM32_FUNCTION(17, "ANALOG")
119 ),
120 STM32_PIN(
121 PINCTRL_PIN(9, "PA9"),
122 STM32_FUNCTION(0, "GPIOA9"),
123 STM32_FUNCTION(2, "TIM1_CH2"),
124 STM32_FUNCTION(5, "I2C3_SMBA"),
125 STM32_FUNCTION(8, "USART1_TX"),
126 STM32_FUNCTION(14, "DCMI_D0"),
127 STM32_FUNCTION(16, "EVENTOUT"),
128 STM32_FUNCTION(17, "ANALOG")
129 ),
130 STM32_PIN(
131 PINCTRL_PIN(10, "PA10"),
132 STM32_FUNCTION(0, "GPIOA10"),
133 STM32_FUNCTION(2, "TIM1_CH3"),
134 STM32_FUNCTION(8, "USART1_RX"),
135 STM32_FUNCTION(11, "OTG_FS_ID"),
136 STM32_FUNCTION(14, "DCMI_D1"),
137 STM32_FUNCTION(16, "EVENTOUT"),
138 STM32_FUNCTION(17, "ANALOG")
139 ),
140 STM32_PIN(
141 PINCTRL_PIN(11, "PA11"),
142 STM32_FUNCTION(0, "GPIOA11"),
143 STM32_FUNCTION(2, "TIM1_CH4"),
144 STM32_FUNCTION(8, "USART1_CTS"),
145 STM32_FUNCTION(10, "CAN1_RX"),
146 STM32_FUNCTION(11, "OTG_FS_DM"),
147 STM32_FUNCTION(15, "LCD_R4"),
148 STM32_FUNCTION(16, "EVENTOUT"),
149 STM32_FUNCTION(17, "ANALOG")
150 ),
151 STM32_PIN(
152 PINCTRL_PIN(12, "PA12"),
153 STM32_FUNCTION(0, "GPIOA12"),
154 STM32_FUNCTION(2, "TIM1_ETR"),
155 STM32_FUNCTION(8, "USART1_RTS"),
156 STM32_FUNCTION(10, "CAN1_TX"),
157 STM32_FUNCTION(11, "OTG_FS_DP"),
158 STM32_FUNCTION(15, "LCD_R5"),
159 STM32_FUNCTION(16, "EVENTOUT"),
160 STM32_FUNCTION(17, "ANALOG")
161 ),
162 STM32_PIN(
163 PINCTRL_PIN(13, "PA13"),
164 STM32_FUNCTION(0, "GPIOA13"),
165 STM32_FUNCTION(1, "JTMS SWDIO"),
166 STM32_FUNCTION(16, "EVENTOUT"),
167 STM32_FUNCTION(17, "ANALOG")
168 ),
169 STM32_PIN(
170 PINCTRL_PIN(14, "PA14"),
171 STM32_FUNCTION(0, "GPIOA14"),
172 STM32_FUNCTION(1, "JTCK SWCLK"),
173 STM32_FUNCTION(16, "EVENTOUT"),
174 STM32_FUNCTION(17, "ANALOG")
175 ),
176 STM32_PIN(
177 PINCTRL_PIN(15, "PA15"),
178 STM32_FUNCTION(0, "GPIOA15"),
179 STM32_FUNCTION(1, "JTDI"),
180 STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
181 STM32_FUNCTION(6, "SPI1_NSS"),
182 STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
183 STM32_FUNCTION(16, "EVENTOUT"),
184 STM32_FUNCTION(17, "ANALOG")
185 ),
186 STM32_PIN(
187 PINCTRL_PIN(16, "PB0"),
188 STM32_FUNCTION(0, "GPIOB0"),
189 STM32_FUNCTION(2, "TIM1_CH2N"),
190 STM32_FUNCTION(3, "TIM3_CH3"),
191 STM32_FUNCTION(4, "TIM8_CH2N"),
192 STM32_FUNCTION(10, "LCD_R3"),
193 STM32_FUNCTION(11, "OTG_HS_ULPI_D1"),
194 STM32_FUNCTION(12, "ETH_MII_RXD2"),
195 STM32_FUNCTION(16, "EVENTOUT"),
196 STM32_FUNCTION(17, "ANALOG")
197 ),
198 STM32_PIN(
199 PINCTRL_PIN(17, "PB1"),
200 STM32_FUNCTION(0, "GPIOB1"),
201 STM32_FUNCTION(2, "TIM1_CH3N"),
202 STM32_FUNCTION(3, "TIM3_CH4"),
203 STM32_FUNCTION(4, "TIM8_CH3N"),
204 STM32_FUNCTION(10, "LCD_R6"),
205 STM32_FUNCTION(11, "OTG_HS_ULPI_D2"),
206 STM32_FUNCTION(12, "ETH_MII_RXD3"),
207 STM32_FUNCTION(16, "EVENTOUT"),
208 STM32_FUNCTION(17, "ANALOG")
209 ),
210 STM32_PIN(
211 PINCTRL_PIN(18, "PB2"),
212 STM32_FUNCTION(0, "GPIOB2"),
213 STM32_FUNCTION(16, "EVENTOUT"),
214 STM32_FUNCTION(17, "ANALOG")
215 ),
216 STM32_PIN(
217 PINCTRL_PIN(19, "PB3"),
218 STM32_FUNCTION(0, "GPIOB3"),
219 STM32_FUNCTION(1, "JTDO TRACESWO"),
220 STM32_FUNCTION(2, "TIM2_CH2"),
221 STM32_FUNCTION(6, "SPI1_SCK"),
222 STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
223 STM32_FUNCTION(16, "EVENTOUT"),
224 STM32_FUNCTION(17, "ANALOG")
225 ),
226 STM32_PIN(
227 PINCTRL_PIN(20, "PB4"),
228 STM32_FUNCTION(0, "GPIOB4"),
229 STM32_FUNCTION(1, "NJTRST"),
230 STM32_FUNCTION(3, "TIM3_CH1"),
231 STM32_FUNCTION(6, "SPI1_MISO"),
232 STM32_FUNCTION(7, "SPI3_MISO"),
233 STM32_FUNCTION(8, "I2S3EXT_SD"),
234 STM32_FUNCTION(16, "EVENTOUT"),
235 STM32_FUNCTION(17, "ANALOG")
236 ),
237 STM32_PIN(
238 PINCTRL_PIN(21, "PB5"),
239 STM32_FUNCTION(0, "GPIOB5"),
240 STM32_FUNCTION(3, "TIM3_CH2"),
241 STM32_FUNCTION(5, "I2C1_SMBA"),
242 STM32_FUNCTION(6, "SPI1_MOSI"),
243 STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
244 STM32_FUNCTION(10, "CAN2_RX"),
245 STM32_FUNCTION(11, "OTG_HS_ULPI_D7"),
246 STM32_FUNCTION(12, "ETH_PPS_OUT"),
247 STM32_FUNCTION(13, "FMC_SDCKE1"),
248 STM32_FUNCTION(14, "DCMI_D10"),
249 STM32_FUNCTION(16, "EVENTOUT"),
250 STM32_FUNCTION(17, "ANALOG")
251 ),
252 STM32_PIN(
253 PINCTRL_PIN(22, "PB6"),
254 STM32_FUNCTION(0, "GPIOB6"),
255 STM32_FUNCTION(3, "TIM4_CH1"),
256 STM32_FUNCTION(5, "I2C1_SCL"),
257 STM32_FUNCTION(8, "USART1_TX"),
258 STM32_FUNCTION(10, "CAN2_TX"),
259 STM32_FUNCTION(13, "FMC_SDNE1"),
260 STM32_FUNCTION(14, "DCMI_D5"),
261 STM32_FUNCTION(16, "EVENTOUT"),
262 STM32_FUNCTION(17, "ANALOG")
263 ),
264 STM32_PIN(
265 PINCTRL_PIN(23, "PB7"),
266 STM32_FUNCTION(0, "GPIOB7"),
267 STM32_FUNCTION(3, "TIM4_CH2"),
268 STM32_FUNCTION(5, "I2C1_SDA"),
269 STM32_FUNCTION(8, "USART1_RX"),
270 STM32_FUNCTION(13, "FMC_NL"),
271 STM32_FUNCTION(14, "DCMI_VSYNC"),
272 STM32_FUNCTION(16, "EVENTOUT"),
273 STM32_FUNCTION(17, "ANALOG")
274 ),
275 STM32_PIN(
276 PINCTRL_PIN(24, "PB8"),
277 STM32_FUNCTION(0, "GPIOB8"),
278 STM32_FUNCTION(3, "TIM4_CH3"),
279 STM32_FUNCTION(4, "TIM10_CH1"),
280 STM32_FUNCTION(5, "I2C1_SCL"),
281 STM32_FUNCTION(10, "CAN1_RX"),
282 STM32_FUNCTION(12, "ETH_MII_TXD3"),
283 STM32_FUNCTION(13, "SDIO_D4"),
284 STM32_FUNCTION(14, "DCMI_D6"),
285 STM32_FUNCTION(15, "LCD_B6"),
286 STM32_FUNCTION(16, "EVENTOUT"),
287 STM32_FUNCTION(17, "ANALOG")
288 ),
289 STM32_PIN(
290 PINCTRL_PIN(25, "PB9"),
291 STM32_FUNCTION(0, "GPIOB9"),
292 STM32_FUNCTION(3, "TIM4_CH4"),
293 STM32_FUNCTION(4, "TIM11_CH1"),
294 STM32_FUNCTION(5, "I2C1_SDA"),
295 STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
296 STM32_FUNCTION(10, "CAN1_TX"),
297 STM32_FUNCTION(13, "SDIO_D5"),
298 STM32_FUNCTION(14, "DCMI_D7"),
299 STM32_FUNCTION(15, "LCD_B7"),
300 STM32_FUNCTION(16, "EVENTOUT"),
301 STM32_FUNCTION(17, "ANALOG")
302 ),
303 STM32_PIN(
304 PINCTRL_PIN(26, "PB10"),
305 STM32_FUNCTION(0, "GPIOB10"),
306 STM32_FUNCTION(2, "TIM2_CH3"),
307 STM32_FUNCTION(5, "I2C2_SCL"),
308 STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
309 STM32_FUNCTION(8, "USART3_TX"),
310 STM32_FUNCTION(11, "OTG_HS_ULPI_D3"),
311 STM32_FUNCTION(12, "ETH_MII_RX_ER"),
312 STM32_FUNCTION(15, "LCD_G4"),
313 STM32_FUNCTION(16, "EVENTOUT"),
314 STM32_FUNCTION(17, "ANALOG")
315 ),
316 STM32_PIN(
317 PINCTRL_PIN(27, "PB11"),
318 STM32_FUNCTION(0, "GPIOB11"),
319 STM32_FUNCTION(2, "TIM2_CH4"),
320 STM32_FUNCTION(5, "I2C2_SDA"),
321 STM32_FUNCTION(8, "USART3_RX"),
322 STM32_FUNCTION(11, "OTG_HS_ULPI_D4"),
323 STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
324 STM32_FUNCTION(15, "LCD_G5"),
325 STM32_FUNCTION(16, "EVENTOUT"),
326 STM32_FUNCTION(17, "ANALOG")
327 ),
328 STM32_PIN(
329 PINCTRL_PIN(28, "PB12"),
330 STM32_FUNCTION(0, "GPIOB12"),
331 STM32_FUNCTION(2, "TIM1_BKIN"),
332 STM32_FUNCTION(5, "I2C2_SMBA"),
333 STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
334 STM32_FUNCTION(8, "USART3_CK"),
335 STM32_FUNCTION(10, "CAN2_RX"),
336 STM32_FUNCTION(11, "OTG_HS_ULPI_D5"),
337 STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
338 STM32_FUNCTION(13, "OTG_HS_ID"),
339 STM32_FUNCTION(16, "EVENTOUT"),
340 STM32_FUNCTION(17, "ANALOG")
341 ),
342 STM32_PIN(
343 PINCTRL_PIN(29, "PB13"),
344 STM32_FUNCTION(0, "GPIOB13"),
345 STM32_FUNCTION(2, "TIM1_CH1N"),
346 STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
347 STM32_FUNCTION(8, "USART3_CTS"),
348 STM32_FUNCTION(10, "CAN2_TX"),
349 STM32_FUNCTION(11, "OTG_HS_ULPI_D6"),
350 STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
351 STM32_FUNCTION(16, "EVENTOUT"),
352 STM32_FUNCTION(17, "ANALOG")
353 ),
354 STM32_PIN(
355 PINCTRL_PIN(30, "PB14"),
356 STM32_FUNCTION(0, "GPIOB14"),
357 STM32_FUNCTION(2, "TIM1_CH2N"),
358 STM32_FUNCTION(4, "TIM8_CH2N"),
359 STM32_FUNCTION(6, "SPI2_MISO"),
360 STM32_FUNCTION(7, "I2S2EXT_SD"),
361 STM32_FUNCTION(8, "USART3_RTS"),
362 STM32_FUNCTION(10, "TIM12_CH1"),
363 STM32_FUNCTION(13, "OTG_HS_DM"),
364 STM32_FUNCTION(16, "EVENTOUT"),
365 STM32_FUNCTION(17, "ANALOG")
366 ),
367 STM32_PIN(
368 PINCTRL_PIN(31, "PB15"),
369 STM32_FUNCTION(0, "GPIOB15"),
370 STM32_FUNCTION(1, "RTC_REFIN"),
371 STM32_FUNCTION(2, "TIM1_CH3N"),
372 STM32_FUNCTION(4, "TIM8_CH3N"),
373 STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
374 STM32_FUNCTION(10, "TIM12_CH2"),
375 STM32_FUNCTION(13, "OTG_HS_DP"),
376 STM32_FUNCTION(16, "EVENTOUT"),
377 STM32_FUNCTION(17, "ANALOG")
378 ),
379 STM32_PIN(
380 PINCTRL_PIN(32, "PC0"),
381 STM32_FUNCTION(0, "GPIOC0"),
382 STM32_FUNCTION(11, "OTG_HS_ULPI_STP"),
383 STM32_FUNCTION(13, "FMC_SDNWE"),
384 STM32_FUNCTION(16, "EVENTOUT"),
385 STM32_FUNCTION(17, "ANALOG")
386 ),
387 STM32_PIN(
388 PINCTRL_PIN(33, "PC1"),
389 STM32_FUNCTION(0, "GPIOC1"),
390 STM32_FUNCTION(12, "ETH_MDC"),
391 STM32_FUNCTION(16, "EVENTOUT"),
392 STM32_FUNCTION(17, "ANALOG")
393 ),
394 STM32_PIN(
395 PINCTRL_PIN(34, "PC2"),
396 STM32_FUNCTION(0, "GPIOC2"),
397 STM32_FUNCTION(6, "SPI2_MISO"),
398 STM32_FUNCTION(7, "I2S2EXT_SD"),
399 STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
400 STM32_FUNCTION(12, "ETH_MII_TXD2"),
401 STM32_FUNCTION(13, "FMC_SDNE0"),
402 STM32_FUNCTION(16, "EVENTOUT"),
403 STM32_FUNCTION(17, "ANALOG")
404 ),
405 STM32_PIN(
406 PINCTRL_PIN(35, "PC3"),
407 STM32_FUNCTION(0, "GPIOC3"),
408 STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
409 STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
410 STM32_FUNCTION(12, "ETH_MII_TX_CLK"),
411 STM32_FUNCTION(13, "FMC_SDCKE0"),
412 STM32_FUNCTION(16, "EVENTOUT"),
413 STM32_FUNCTION(17, "ANALOG")
414 ),
415 STM32_PIN(
416 PINCTRL_PIN(36, "PC4"),
417 STM32_FUNCTION(0, "GPIOC4"),
418 STM32_FUNCTION(12, "ETH_MII_RXD0 ETH_RMII_RXD0"),
419 STM32_FUNCTION(16, "EVENTOUT"),
420 STM32_FUNCTION(17, "ANALOG")
421 ),
422 STM32_PIN(
423 PINCTRL_PIN(37, "PC5"),
424 STM32_FUNCTION(0, "GPIOC5"),
425 STM32_FUNCTION(12, "ETH_MII_RXD1 ETH_RMII_RXD1"),
426 STM32_FUNCTION(16, "EVENTOUT"),
427 STM32_FUNCTION(17, "ANALOG")
428 ),
429 STM32_PIN(
430 PINCTRL_PIN(38, "PC6"),
431 STM32_FUNCTION(0, "GPIOC6"),
432 STM32_FUNCTION(3, "TIM3_CH1"),
433 STM32_FUNCTION(4, "TIM8_CH1"),
434 STM32_FUNCTION(6, "I2S2_MCK"),
435 STM32_FUNCTION(9, "USART6_TX"),
436 STM32_FUNCTION(13, "SDIO_D6"),
437 STM32_FUNCTION(14, "DCMI_D0"),
438 STM32_FUNCTION(15, "LCD_HSYNC"),
439 STM32_FUNCTION(16, "EVENTOUT"),
440 STM32_FUNCTION(17, "ANALOG")
441 ),
442 STM32_PIN(
443 PINCTRL_PIN(39, "PC7"),
444 STM32_FUNCTION(0, "GPIOC7"),
445 STM32_FUNCTION(3, "TIM3_CH2"),
446 STM32_FUNCTION(4, "TIM8_CH2"),
447 STM32_FUNCTION(7, "I2S3_MCK"),
448 STM32_FUNCTION(9, "USART6_RX"),
449 STM32_FUNCTION(13, "SDIO_D7"),
450 STM32_FUNCTION(14, "DCMI_D1"),
451 STM32_FUNCTION(15, "LCD_G6"),
452 STM32_FUNCTION(16, "EVENTOUT"),
453 STM32_FUNCTION(17, "ANALOG")
454 ),
455 STM32_PIN(
456 PINCTRL_PIN(40, "PC8"),
457 STM32_FUNCTION(0, "GPIOC8"),
458 STM32_FUNCTION(3, "TIM3_CH3"),
459 STM32_FUNCTION(4, "TIM8_CH3"),
460 STM32_FUNCTION(9, "USART6_CK"),
461 STM32_FUNCTION(13, "SDIO_D0"),
462 STM32_FUNCTION(14, "DCMI_D2"),
463 STM32_FUNCTION(16, "EVENTOUT"),
464 STM32_FUNCTION(17, "ANALOG")
465 ),
466 STM32_PIN(
467 PINCTRL_PIN(41, "PC9"),
468 STM32_FUNCTION(0, "GPIOC9"),
469 STM32_FUNCTION(1, "MCO2"),
470 STM32_FUNCTION(3, "TIM3_CH4"),
471 STM32_FUNCTION(4, "TIM8_CH4"),
472 STM32_FUNCTION(5, "I2C3_SDA"),
473 STM32_FUNCTION(6, "I2S_CKIN"),
474 STM32_FUNCTION(13, "SDIO_D1"),
475 STM32_FUNCTION(14, "DCMI_D3"),
476 STM32_FUNCTION(16, "EVENTOUT"),
477 STM32_FUNCTION(17, "ANALOG")
478 ),
479 STM32_PIN(
480 PINCTRL_PIN(42, "PC10"),
481 STM32_FUNCTION(0, "GPIOC10"),
482 STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
483 STM32_FUNCTION(8, "USART3_TX"),
484 STM32_FUNCTION(9, "UART4_TX"),
485 STM32_FUNCTION(13, "SDIO_D2"),
486 STM32_FUNCTION(14, "DCMI_D8"),
487 STM32_FUNCTION(15, "LCD_R2"),
488 STM32_FUNCTION(16, "EVENTOUT"),
489 STM32_FUNCTION(17, "ANALOG")
490 ),
491 STM32_PIN(
492 PINCTRL_PIN(43, "PC11"),
493 STM32_FUNCTION(0, "GPIOC11"),
494 STM32_FUNCTION(6, "I2S3EXT_SD"),
495 STM32_FUNCTION(7, "SPI3_MISO"),
496 STM32_FUNCTION(8, "USART3_RX"),
497 STM32_FUNCTION(9, "UART4_RX"),
498 STM32_FUNCTION(13, "SDIO_D3"),
499 STM32_FUNCTION(14, "DCMI_D4"),
500 STM32_FUNCTION(16, "EVENTOUT"),
501 STM32_FUNCTION(17, "ANALOG")
502 ),
503 STM32_PIN(
504 PINCTRL_PIN(44, "PC12"),
505 STM32_FUNCTION(0, "GPIOC12"),
506 STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
507 STM32_FUNCTION(8, "USART3_CK"),
508 STM32_FUNCTION(9, "UART5_TX"),
509 STM32_FUNCTION(13, "SDIO_CK"),
510 STM32_FUNCTION(14, "DCMI_D9"),
511 STM32_FUNCTION(16, "EVENTOUT"),
512 STM32_FUNCTION(17, "ANALOG")
513 ),
514 STM32_PIN(
515 PINCTRL_PIN(45, "PC13"),
516 STM32_FUNCTION(0, "GPIOC13"),
517 STM32_FUNCTION(16, "EVENTOUT"),
518 STM32_FUNCTION(17, "ANALOG")
519 ),
520 STM32_PIN(
521 PINCTRL_PIN(46, "PC14"),
522 STM32_FUNCTION(0, "GPIOC14"),
523 STM32_FUNCTION(16, "EVENTOUT"),
524 STM32_FUNCTION(17, "ANALOG")
525 ),
526 STM32_PIN(
527 PINCTRL_PIN(47, "PC15"),
528 STM32_FUNCTION(0, "GPIOC15"),
529 STM32_FUNCTION(16, "EVENTOUT"),
530 STM32_FUNCTION(17, "ANALOG")
531 ),
532 STM32_PIN(
533 PINCTRL_PIN(48, "PD0"),
534 STM32_FUNCTION(0, "GPIOD0"),
535 STM32_FUNCTION(10, "CAN1_RX"),
536 STM32_FUNCTION(13, "FMC_D2"),
537 STM32_FUNCTION(16, "EVENTOUT"),
538 STM32_FUNCTION(17, "ANALOG")
539 ),
540 STM32_PIN(
541 PINCTRL_PIN(49, "PD1"),
542 STM32_FUNCTION(0, "GPIOD1"),
543 STM32_FUNCTION(10, "CAN1_TX"),
544 STM32_FUNCTION(13, "FMC_D3"),
545 STM32_FUNCTION(16, "EVENTOUT"),
546 STM32_FUNCTION(17, "ANALOG")
547 ),
548 STM32_PIN(
549 PINCTRL_PIN(50, "PD2"),
550 STM32_FUNCTION(0, "GPIOD2"),
551 STM32_FUNCTION(3, "TIM3_ETR"),
552 STM32_FUNCTION(9, "UART5_RX"),
553 STM32_FUNCTION(13, "SDIO_CMD"),
554 STM32_FUNCTION(14, "DCMI_D11"),
555 STM32_FUNCTION(16, "EVENTOUT"),
556 STM32_FUNCTION(17, "ANALOG")
557 ),
558 STM32_PIN(
559 PINCTRL_PIN(51, "PD3"),
560 STM32_FUNCTION(0, "GPIOD3"),
561 STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
562 STM32_FUNCTION(8, "USART2_CTS"),
563 STM32_FUNCTION(13, "FMC_CLK"),
564 STM32_FUNCTION(14, "DCMI_D5"),
565 STM32_FUNCTION(15, "LCD_G7"),
566 STM32_FUNCTION(16, "EVENTOUT"),
567 STM32_FUNCTION(17, "ANALOG")
568 ),
569 STM32_PIN(
570 PINCTRL_PIN(52, "PD4"),
571 STM32_FUNCTION(0, "GPIOD4"),
572 STM32_FUNCTION(8, "USART2_RTS"),
573 STM32_FUNCTION(13, "FMC_NOE"),
574 STM32_FUNCTION(16, "EVENTOUT"),
575 STM32_FUNCTION(17, "ANALOG")
576 ),
577 STM32_PIN(
578 PINCTRL_PIN(53, "PD5"),
579 STM32_FUNCTION(0, "GPIOD5"),
580 STM32_FUNCTION(8, "USART2_TX"),
581 STM32_FUNCTION(13, "FMC_NWE"),
582 STM32_FUNCTION(16, "EVENTOUT"),
583 STM32_FUNCTION(17, "ANALOG")
584 ),
585 STM32_PIN(
586 PINCTRL_PIN(54, "PD6"),
587 STM32_FUNCTION(0, "GPIOD6"),
588 STM32_FUNCTION(6, "SPI3_MOSI I2S3_SD"),
589 STM32_FUNCTION(7, "SAI1_SD_A"),
590 STM32_FUNCTION(8, "USART2_RX"),
591 STM32_FUNCTION(13, "FMC_NWAIT"),
592 STM32_FUNCTION(14, "DCMI_D10"),
593 STM32_FUNCTION(15, "LCD_B2"),
594 STM32_FUNCTION(16, "EVENTOUT"),
595 STM32_FUNCTION(17, "ANALOG")
596 ),
597 STM32_PIN(
598 PINCTRL_PIN(55, "PD7"),
599 STM32_FUNCTION(0, "GPIOD7"),
600 STM32_FUNCTION(8, "USART2_CK"),
601 STM32_FUNCTION(13, "FMC_NE1 FMC_NCE2"),
602 STM32_FUNCTION(16, "EVENTOUT"),
603 STM32_FUNCTION(17, "ANALOG")
604 ),
605 STM32_PIN(
606 PINCTRL_PIN(56, "PD8"),
607 STM32_FUNCTION(0, "GPIOD8"),
608 STM32_FUNCTION(8, "USART3_TX"),
609 STM32_FUNCTION(13, "FMC_D13"),
610 STM32_FUNCTION(16, "EVENTOUT"),
611 STM32_FUNCTION(17, "ANALOG")
612 ),
613 STM32_PIN(
614 PINCTRL_PIN(57, "PD9"),
615 STM32_FUNCTION(0, "GPIOD9"),
616 STM32_FUNCTION(8, "USART3_RX"),
617 STM32_FUNCTION(13, "FMC_D14"),
618 STM32_FUNCTION(16, "EVENTOUT"),
619 STM32_FUNCTION(17, "ANALOG")
620 ),
621 STM32_PIN(
622 PINCTRL_PIN(58, "PD10"),
623 STM32_FUNCTION(0, "GPIOD10"),
624 STM32_FUNCTION(8, "USART3_CK"),
625 STM32_FUNCTION(13, "FMC_D15"),
626 STM32_FUNCTION(15, "LCD_B3"),
627 STM32_FUNCTION(16, "EVENTOUT"),
628 STM32_FUNCTION(17, "ANALOG")
629 ),
630 STM32_PIN(
631 PINCTRL_PIN(59, "PD11"),
632 STM32_FUNCTION(0, "GPIOD11"),
633 STM32_FUNCTION(8, "USART3_CTS"),
634 STM32_FUNCTION(13, "FMC_A16"),
635 STM32_FUNCTION(16, "EVENTOUT"),
636 STM32_FUNCTION(17, "ANALOG")
637 ),
638 STM32_PIN(
639 PINCTRL_PIN(60, "PD12"),
640 STM32_FUNCTION(0, "GPIOD12"),
641 STM32_FUNCTION(3, "TIM4_CH1"),
642 STM32_FUNCTION(8, "USART3_RTS"),
643 STM32_FUNCTION(13, "FMC_A17"),
644 STM32_FUNCTION(16, "EVENTOUT"),
645 STM32_FUNCTION(17, "ANALOG")
646 ),
647 STM32_PIN(
648 PINCTRL_PIN(61, "PD13"),
649 STM32_FUNCTION(0, "GPIOD13"),
650 STM32_FUNCTION(3, "TIM4_CH2"),
651 STM32_FUNCTION(13, "FMC_A18"),
652 STM32_FUNCTION(16, "EVENTOUT"),
653 STM32_FUNCTION(17, "ANALOG")
654 ),
655 STM32_PIN(
656 PINCTRL_PIN(62, "PD14"),
657 STM32_FUNCTION(0, "GPIOD14"),
658 STM32_FUNCTION(3, "TIM4_CH3"),
659 STM32_FUNCTION(13, "FMC_D0"),
660 STM32_FUNCTION(16, "EVENTOUT"),
661 STM32_FUNCTION(17, "ANALOG")
662 ),
663 STM32_PIN(
664 PINCTRL_PIN(63, "PD15"),
665 STM32_FUNCTION(0, "GPIOD15"),
666 STM32_FUNCTION(3, "TIM4_CH4"),
667 STM32_FUNCTION(13, "FMC_D1"),
668 STM32_FUNCTION(16, "EVENTOUT"),
669 STM32_FUNCTION(17, "ANALOG")
670 ),
671 STM32_PIN(
672 PINCTRL_PIN(64, "PE0"),
673 STM32_FUNCTION(0, "GPIOE0"),
674 STM32_FUNCTION(3, "TIM4_ETR"),
675 STM32_FUNCTION(9, "UART8_RX"),
676 STM32_FUNCTION(13, "FMC_NBL0"),
677 STM32_FUNCTION(14, "DCMI_D2"),
678 STM32_FUNCTION(16, "EVENTOUT"),
679 STM32_FUNCTION(17, "ANALOG")
680 ),
681 STM32_PIN(
682 PINCTRL_PIN(65, "PE1"),
683 STM32_FUNCTION(0, "GPIOE1"),
684 STM32_FUNCTION(9, "UART8_TX"),
685 STM32_FUNCTION(13, "FMC_NBL1"),
686 STM32_FUNCTION(14, "DCMI_D3"),
687 STM32_FUNCTION(16, "EVENTOUT"),
688 STM32_FUNCTION(17, "ANALOG")
689 ),
690 STM32_PIN(
691 PINCTRL_PIN(66, "PE2"),
692 STM32_FUNCTION(0, "GPIOE2"),
693 STM32_FUNCTION(1, "TRACECLK"),
694 STM32_FUNCTION(6, "SPI4_SCK"),
695 STM32_FUNCTION(7, "SAI1_MCLK_A"),
696 STM32_FUNCTION(12, "ETH_MII_TXD3"),
697 STM32_FUNCTION(13, "FMC_A23"),
698 STM32_FUNCTION(16, "EVENTOUT"),
699 STM32_FUNCTION(17, "ANALOG")
700 ),
701 STM32_PIN(
702 PINCTRL_PIN(67, "PE3"),
703 STM32_FUNCTION(0, "GPIOE3"),
704 STM32_FUNCTION(1, "TRACED0"),
705 STM32_FUNCTION(7, "SAI1_SD_B"),
706 STM32_FUNCTION(13, "FMC_A19"),
707 STM32_FUNCTION(16, "EVENTOUT"),
708 STM32_FUNCTION(17, "ANALOG")
709 ),
710 STM32_PIN(
711 PINCTRL_PIN(68, "PE4"),
712 STM32_FUNCTION(0, "GPIOE4"),
713 STM32_FUNCTION(1, "TRACED1"),
714 STM32_FUNCTION(6, "SPI4_NSS"),
715 STM32_FUNCTION(7, "SAI1_FS_A"),
716 STM32_FUNCTION(13, "FMC_A20"),
717 STM32_FUNCTION(14, "DCMI_D4"),
718 STM32_FUNCTION(15, "LCD_B0"),
719 STM32_FUNCTION(16, "EVENTOUT"),
720 STM32_FUNCTION(17, "ANALOG")
721 ),
722 STM32_PIN(
723 PINCTRL_PIN(69, "PE5"),
724 STM32_FUNCTION(0, "GPIOE5"),
725 STM32_FUNCTION(1, "TRACED2"),
726 STM32_FUNCTION(4, "TIM9_CH1"),
727 STM32_FUNCTION(6, "SPI4_MISO"),
728 STM32_FUNCTION(7, "SAI1_SCK_A"),
729 STM32_FUNCTION(13, "FMC_A21"),
730 STM32_FUNCTION(14, "DCMI_D6"),
731 STM32_FUNCTION(15, "LCD_G0"),
732 STM32_FUNCTION(16, "EVENTOUT"),
733 STM32_FUNCTION(17, "ANALOG")
734 ),
735 STM32_PIN(
736 PINCTRL_PIN(70, "PE6"),
737 STM32_FUNCTION(0, "GPIOE6"),
738 STM32_FUNCTION(1, "TRACED3"),
739 STM32_FUNCTION(4, "TIM9_CH2"),
740 STM32_FUNCTION(6, "SPI4_MOSI"),
741 STM32_FUNCTION(7, "SAI1_SD_A"),
742 STM32_FUNCTION(13, "FMC_A22"),
743 STM32_FUNCTION(14, "DCMI_D7"),
744 STM32_FUNCTION(15, "LCD_G1"),
745 STM32_FUNCTION(16, "EVENTOUT"),
746 STM32_FUNCTION(17, "ANALOG")
747 ),
748 STM32_PIN(
749 PINCTRL_PIN(71, "PE7"),
750 STM32_FUNCTION(0, "GPIOE7"),
751 STM32_FUNCTION(2, "TIM1_ETR"),
752 STM32_FUNCTION(9, "UART7_RX"),
753 STM32_FUNCTION(13, "FMC_D4"),
754 STM32_FUNCTION(16, "EVENTOUT"),
755 STM32_FUNCTION(17, "ANALOG")
756 ),
757 STM32_PIN(
758 PINCTRL_PIN(72, "PE8"),
759 STM32_FUNCTION(0, "GPIOE8"),
760 STM32_FUNCTION(2, "TIM1_CH1N"),
761 STM32_FUNCTION(9, "UART7_TX"),
762 STM32_FUNCTION(13, "FMC_D5"),
763 STM32_FUNCTION(16, "EVENTOUT"),
764 STM32_FUNCTION(17, "ANALOG")
765 ),
766 STM32_PIN(
767 PINCTRL_PIN(73, "PE9"),
768 STM32_FUNCTION(0, "GPIOE9"),
769 STM32_FUNCTION(2, "TIM1_CH1"),
770 STM32_FUNCTION(13, "FMC_D6"),
771 STM32_FUNCTION(16, "EVENTOUT"),
772 STM32_FUNCTION(17, "ANALOG")
773 ),
774 STM32_PIN(
775 PINCTRL_PIN(74, "PE10"),
776 STM32_FUNCTION(0, "GPIOE10"),
777 STM32_FUNCTION(2, "TIM1_CH2N"),
778 STM32_FUNCTION(13, "FMC_D7"),
779 STM32_FUNCTION(16, "EVENTOUT"),
780 STM32_FUNCTION(17, "ANALOG")
781 ),
782 STM32_PIN(
783 PINCTRL_PIN(75, "PE11"),
784 STM32_FUNCTION(0, "GPIOE11"),
785 STM32_FUNCTION(2, "TIM1_CH2"),
786 STM32_FUNCTION(6, "SPI4_NSS"),
787 STM32_FUNCTION(13, "FMC_D8"),
788 STM32_FUNCTION(15, "LCD_G3"),
789 STM32_FUNCTION(16, "EVENTOUT"),
790 STM32_FUNCTION(17, "ANALOG")
791 ),
792 STM32_PIN(
793 PINCTRL_PIN(76, "PE12"),
794 STM32_FUNCTION(0, "GPIOE12"),
795 STM32_FUNCTION(2, "TIM1_CH3N"),
796 STM32_FUNCTION(6, "SPI4_SCK"),
797 STM32_FUNCTION(13, "FMC_D9"),
798 STM32_FUNCTION(15, "LCD_B4"),
799 STM32_FUNCTION(16, "EVENTOUT"),
800 STM32_FUNCTION(17, "ANALOG")
801 ),
802 STM32_PIN(
803 PINCTRL_PIN(77, "PE13"),
804 STM32_FUNCTION(0, "GPIOE13"),
805 STM32_FUNCTION(2, "TIM1_CH3"),
806 STM32_FUNCTION(6, "SPI4_MISO"),
807 STM32_FUNCTION(13, "FMC_D10"),
808 STM32_FUNCTION(15, "LCD_DE"),
809 STM32_FUNCTION(16, "EVENTOUT"),
810 STM32_FUNCTION(17, "ANALOG")
811 ),
812 STM32_PIN(
813 PINCTRL_PIN(78, "PE14"),
814 STM32_FUNCTION(0, "GPIOE14"),
815 STM32_FUNCTION(2, "TIM1_CH4"),
816 STM32_FUNCTION(6, "SPI4_MOSI"),
817 STM32_FUNCTION(13, "FMC_D11"),
818 STM32_FUNCTION(15, "LCD_CLK"),
819 STM32_FUNCTION(16, "EVENTOUT"),
820 STM32_FUNCTION(17, "ANALOG")
821 ),
822 STM32_PIN(
823 PINCTRL_PIN(79, "PE15"),
824 STM32_FUNCTION(0, "GPIOE15"),
825 STM32_FUNCTION(2, "TIM1_BKIN"),
826 STM32_FUNCTION(13, "FMC_D12"),
827 STM32_FUNCTION(15, "LCD_R7"),
828 STM32_FUNCTION(16, "EVENTOUT"),
829 STM32_FUNCTION(17, "ANALOG")
830 ),
831 STM32_PIN(
832 PINCTRL_PIN(80, "PF0"),
833 STM32_FUNCTION(0, "GPIOF0"),
834 STM32_FUNCTION(5, "I2C2_SDA"),
835 STM32_FUNCTION(13, "FMC_A0"),
836 STM32_FUNCTION(16, "EVENTOUT"),
837 STM32_FUNCTION(17, "ANALOG")
838 ),
839 STM32_PIN(
840 PINCTRL_PIN(81, "PF1"),
841 STM32_FUNCTION(0, "GPIOF1"),
842 STM32_FUNCTION(5, "I2C2_SCL"),
843 STM32_FUNCTION(13, "FMC_A1"),
844 STM32_FUNCTION(16, "EVENTOUT"),
845 STM32_FUNCTION(17, "ANALOG")
846 ),
847 STM32_PIN(
848 PINCTRL_PIN(82, "PF2"),
849 STM32_FUNCTION(0, "GPIOF2"),
850 STM32_FUNCTION(5, "I2C2_SMBA"),
851 STM32_FUNCTION(13, "FMC_A2"),
852 STM32_FUNCTION(16, "EVENTOUT"),
853 STM32_FUNCTION(17, "ANALOG")
854 ),
855 STM32_PIN(
856 PINCTRL_PIN(83, "PF3"),
857 STM32_FUNCTION(0, "GPIOF3"),
858 STM32_FUNCTION(13, "FMC_A3"),
859 STM32_FUNCTION(16, "EVENTOUT"),
860 STM32_FUNCTION(17, "ANALOG")
861 ),
862 STM32_PIN(
863 PINCTRL_PIN(84, "PF4"),
864 STM32_FUNCTION(0, "GPIOF4"),
865 STM32_FUNCTION(13, "FMC_A4"),
866 STM32_FUNCTION(16, "EVENTOUT"),
867 STM32_FUNCTION(17, "ANALOG")
868 ),
869 STM32_PIN(
870 PINCTRL_PIN(85, "PF5"),
871 STM32_FUNCTION(0, "GPIOF5"),
872 STM32_FUNCTION(13, "FMC_A5"),
873 STM32_FUNCTION(16, "EVENTOUT"),
874 STM32_FUNCTION(17, "ANALOG")
875 ),
876 STM32_PIN(
877 PINCTRL_PIN(86, "PF6"),
878 STM32_FUNCTION(0, "GPIOF6"),
879 STM32_FUNCTION(4, "TIM10_CH1"),
880 STM32_FUNCTION(6, "SPI5_NSS"),
881 STM32_FUNCTION(7, "SAI1_SD_B"),
882 STM32_FUNCTION(9, "UART7_RX"),
883 STM32_FUNCTION(13, "FMC_NIORD"),
884 STM32_FUNCTION(16, "EVENTOUT"),
885 STM32_FUNCTION(17, "ANALOG")
886 ),
887 STM32_PIN(
888 PINCTRL_PIN(87, "PF7"),
889 STM32_FUNCTION(0, "GPIOF7"),
890 STM32_FUNCTION(4, "TIM11_CH1"),
891 STM32_FUNCTION(6, "SPI5_SCK"),
892 STM32_FUNCTION(7, "SAI1_MCLK_B"),
893 STM32_FUNCTION(9, "UART7_TX"),
894 STM32_FUNCTION(13, "FMC_NREG"),
895 STM32_FUNCTION(16, "EVENTOUT"),
896 STM32_FUNCTION(17, "ANALOG")
897 ),
898 STM32_PIN(
899 PINCTRL_PIN(88, "PF8"),
900 STM32_FUNCTION(0, "GPIOF8"),
901 STM32_FUNCTION(6, "SPI5_MISO"),
902 STM32_FUNCTION(7, "SAI1_SCK_B"),
903 STM32_FUNCTION(10, "TIM13_CH1"),
904 STM32_FUNCTION(13, "FMC_NIOWR"),
905 STM32_FUNCTION(16, "EVENTOUT"),
906 STM32_FUNCTION(17, "ANALOG")
907 ),
908 STM32_PIN(
909 PINCTRL_PIN(89, "PF9"),
910 STM32_FUNCTION(0, "GPIOF9"),
911 STM32_FUNCTION(6, "SPI5_MOSI"),
912 STM32_FUNCTION(7, "SAI1_FS_B"),
913 STM32_FUNCTION(10, "TIM14_CH1"),
914 STM32_FUNCTION(13, "FMC_CD"),
915 STM32_FUNCTION(16, "EVENTOUT"),
916 STM32_FUNCTION(17, "ANALOG")
917 ),
918 STM32_PIN(
919 PINCTRL_PIN(90, "PF10"),
920 STM32_FUNCTION(0, "GPIOF10"),
921 STM32_FUNCTION(13, "FMC_INTR"),
922 STM32_FUNCTION(14, "DCMI_D11"),
923 STM32_FUNCTION(15, "LCD_DE"),
924 STM32_FUNCTION(16, "EVENTOUT"),
925 STM32_FUNCTION(17, "ANALOG")
926 ),
927 STM32_PIN(
928 PINCTRL_PIN(91, "PF11"),
929 STM32_FUNCTION(0, "GPIOF11"),
930 STM32_FUNCTION(6, "SPI5_MOSI"),
931 STM32_FUNCTION(13, "FMC_SDNRAS"),
932 STM32_FUNCTION(14, "DCMI_D12"),
933 STM32_FUNCTION(16, "EVENTOUT"),
934 STM32_FUNCTION(17, "ANALOG")
935 ),
936 STM32_PIN(
937 PINCTRL_PIN(92, "PF12"),
938 STM32_FUNCTION(0, "GPIOF12"),
939 STM32_FUNCTION(13, "FMC_A6"),
940 STM32_FUNCTION(16, "EVENTOUT"),
941 STM32_FUNCTION(17, "ANALOG")
942 ),
943 STM32_PIN(
944 PINCTRL_PIN(93, "PF13"),
945 STM32_FUNCTION(0, "GPIOF13"),
946 STM32_FUNCTION(13, "FMC_A7"),
947 STM32_FUNCTION(16, "EVENTOUT"),
948 STM32_FUNCTION(17, "ANALOG")
949 ),
950 STM32_PIN(
951 PINCTRL_PIN(94, "PF14"),
952 STM32_FUNCTION(0, "GPIOF14"),
953 STM32_FUNCTION(13, "FMC_A8"),
954 STM32_FUNCTION(16, "EVENTOUT"),
955 STM32_FUNCTION(17, "ANALOG")
956 ),
957 STM32_PIN(
958 PINCTRL_PIN(95, "PF15"),
959 STM32_FUNCTION(0, "GPIOF15"),
960 STM32_FUNCTION(13, "FMC_A9"),
961 STM32_FUNCTION(16, "EVENTOUT"),
962 STM32_FUNCTION(17, "ANALOG")
963 ),
964 STM32_PIN(
965 PINCTRL_PIN(96, "PG0"),
966 STM32_FUNCTION(0, "GPIOG0"),
967 STM32_FUNCTION(13, "FMC_A10"),
968 STM32_FUNCTION(16, "EVENTOUT"),
969 STM32_FUNCTION(17, "ANALOG")
970 ),
971 STM32_PIN(
972 PINCTRL_PIN(97, "PG1"),
973 STM32_FUNCTION(0, "GPIOG1"),
974 STM32_FUNCTION(13, "FMC_A11"),
975 STM32_FUNCTION(16, "EVENTOUT"),
976 STM32_FUNCTION(17, "ANALOG")
977 ),
978 STM32_PIN(
979 PINCTRL_PIN(98, "PG2"),
980 STM32_FUNCTION(0, "GPIOG2"),
981 STM32_FUNCTION(13, "FMC_A12"),
982 STM32_FUNCTION(16, "EVENTOUT"),
983 STM32_FUNCTION(17, "ANALOG")
984 ),
985 STM32_PIN(
986 PINCTRL_PIN(99, "PG3"),
987 STM32_FUNCTION(0, "GPIOG3"),
988 STM32_FUNCTION(13, "FMC_A13"),
989 STM32_FUNCTION(16, "EVENTOUT"),
990 STM32_FUNCTION(17, "ANALOG")
991 ),
992 STM32_PIN(
993 PINCTRL_PIN(100, "PG4"),
994 STM32_FUNCTION(0, "GPIOG4"),
995 STM32_FUNCTION(13, "FMC_A14 FMC_BA0"),
996 STM32_FUNCTION(16, "EVENTOUT"),
997 STM32_FUNCTION(17, "ANALOG")
998 ),
999 STM32_PIN(
1000 PINCTRL_PIN(101, "PG5"),
1001 STM32_FUNCTION(0, "GPIOG5"),
1002 STM32_FUNCTION(13, "FMC_A15 FMC_BA1"),
1003 STM32_FUNCTION(16, "EVENTOUT"),
1004 STM32_FUNCTION(17, "ANALOG")
1005 ),
1006 STM32_PIN(
1007 PINCTRL_PIN(102, "PG6"),
1008 STM32_FUNCTION(0, "GPIOG6"),
1009 STM32_FUNCTION(13, "FMC_INT2"),
1010 STM32_FUNCTION(14, "DCMI_D12"),
1011 STM32_FUNCTION(15, "LCD_R7"),
1012 STM32_FUNCTION(16, "EVENTOUT"),
1013 STM32_FUNCTION(17, "ANALOG")
1014 ),
1015 STM32_PIN(
1016 PINCTRL_PIN(103, "PG7"),
1017 STM32_FUNCTION(0, "GPIOG7"),
1018 STM32_FUNCTION(9, "USART6_CK"),
1019 STM32_FUNCTION(13, "FMC_INT3"),
1020 STM32_FUNCTION(14, "DCMI_D13"),
1021 STM32_FUNCTION(15, "LCD_CLK"),
1022 STM32_FUNCTION(16, "EVENTOUT"),
1023 STM32_FUNCTION(17, "ANALOG")
1024 ),
1025 STM32_PIN(
1026 PINCTRL_PIN(104, "PG8"),
1027 STM32_FUNCTION(0, "GPIOG8"),
1028 STM32_FUNCTION(6, "SPI6_NSS"),
1029 STM32_FUNCTION(9, "USART6_RTS"),
1030 STM32_FUNCTION(12, "ETH_PPS_OUT"),
1031 STM32_FUNCTION(13, "FMC_SDCLK"),
1032 STM32_FUNCTION(16, "EVENTOUT"),
1033 STM32_FUNCTION(17, "ANALOG")
1034 ),
1035 STM32_PIN(
1036 PINCTRL_PIN(105, "PG9"),
1037 STM32_FUNCTION(0, "GPIOG9"),
1038 STM32_FUNCTION(9, "USART6_RX"),
1039 STM32_FUNCTION(13, "FMC_NE2 FMC_NCE3"),
1040 STM32_FUNCTION(14, "DCMI_VSYNC"),
1041 STM32_FUNCTION(16, "EVENTOUT"),
1042 STM32_FUNCTION(17, "ANALOG")
1043 ),
1044 STM32_PIN(
1045 PINCTRL_PIN(106, "PG10"),
1046 STM32_FUNCTION(0, "GPIOG10"),
1047 STM32_FUNCTION(10, "LCD_G3"),
1048 STM32_FUNCTION(13, "FMC_NCE4_1 FMC_NE3"),
1049 STM32_FUNCTION(14, "DCMI_D2"),
1050 STM32_FUNCTION(15, "LCD_B2"),
1051 STM32_FUNCTION(16, "EVENTOUT"),
1052 STM32_FUNCTION(17, "ANALOG")
1053 ),
1054 STM32_PIN(
1055 PINCTRL_PIN(107, "PG11"),
1056 STM32_FUNCTION(0, "GPIOG11"),
1057 STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
1058 STM32_FUNCTION(13, "FMC_NCE4_2"),
1059 STM32_FUNCTION(14, "DCMI_D3"),
1060 STM32_FUNCTION(15, "LCD_B3"),
1061 STM32_FUNCTION(16, "EVENTOUT"),
1062 STM32_FUNCTION(17, "ANALOG")
1063 ),
1064 STM32_PIN(
1065 PINCTRL_PIN(108, "PG12"),
1066 STM32_FUNCTION(0, "GPIOG12"),
1067 STM32_FUNCTION(6, "SPI6_MISO"),
1068 STM32_FUNCTION(9, "USART6_RTS"),
1069 STM32_FUNCTION(10, "LCD_B4"),
1070 STM32_FUNCTION(13, "FMC_NE4"),
1071 STM32_FUNCTION(15, "LCD_B1"),
1072 STM32_FUNCTION(16, "EVENTOUT"),
1073 STM32_FUNCTION(17, "ANALOG")
1074 ),
1075 STM32_PIN(
1076 PINCTRL_PIN(109, "PG13"),
1077 STM32_FUNCTION(0, "GPIOG13"),
1078 STM32_FUNCTION(6, "SPI6_SCK"),
1079 STM32_FUNCTION(9, "USART6_CTS"),
1080 STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
1081 STM32_FUNCTION(13, "FMC_A24"),
1082 STM32_FUNCTION(16, "EVENTOUT"),
1083 STM32_FUNCTION(17, "ANALOG")
1084 ),
1085 STM32_PIN(
1086 PINCTRL_PIN(110, "PG14"),
1087 STM32_FUNCTION(0, "GPIOG14"),
1088 STM32_FUNCTION(6, "SPI6_MOSI"),
1089 STM32_FUNCTION(9, "USART6_TX"),
1090 STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
1091 STM32_FUNCTION(13, "FMC_A25"),
1092 STM32_FUNCTION(16, "EVENTOUT"),
1093 STM32_FUNCTION(17, "ANALOG")
1094 ),
1095 STM32_PIN(
1096 PINCTRL_PIN(111, "PG15"),
1097 STM32_FUNCTION(0, "GPIOG15"),
1098 STM32_FUNCTION(9, "USART6_CTS"),
1099 STM32_FUNCTION(13, "FMC_SDNCAS"),
1100 STM32_FUNCTION(14, "DCMI_D13"),
1101 STM32_FUNCTION(16, "EVENTOUT"),
1102 STM32_FUNCTION(17, "ANALOG")
1103 ),
1104 STM32_PIN(
1105 PINCTRL_PIN(112, "PH0"),
1106 STM32_FUNCTION(0, "GPIOH0"),
1107 STM32_FUNCTION(16, "EVENTOUT"),
1108 STM32_FUNCTION(17, "ANALOG")
1109 ),
1110 STM32_PIN(
1111 PINCTRL_PIN(113, "PH1"),
1112 STM32_FUNCTION(0, "GPIOH1"),
1113 STM32_FUNCTION(16, "EVENTOUT"),
1114 STM32_FUNCTION(17, "ANALOG")
1115 ),
1116 STM32_PIN(
1117 PINCTRL_PIN(114, "PH2"),
1118 STM32_FUNCTION(0, "GPIOH2"),
1119 STM32_FUNCTION(12, "ETH_MII_CRS"),
1120 STM32_FUNCTION(13, "FMC_SDCKE0"),
1121 STM32_FUNCTION(15, "LCD_R0"),
1122 STM32_FUNCTION(16, "EVENTOUT"),
1123 STM32_FUNCTION(17, "ANALOG")
1124 ),
1125 STM32_PIN(
1126 PINCTRL_PIN(115, "PH3"),
1127 STM32_FUNCTION(0, "GPIOH3"),
1128 STM32_FUNCTION(12, "ETH_MII_COL"),
1129 STM32_FUNCTION(13, "FMC_SDNE0"),
1130 STM32_FUNCTION(15, "LCD_R1"),
1131 STM32_FUNCTION(16, "EVENTOUT"),
1132 STM32_FUNCTION(17, "ANALOG")
1133 ),
1134 STM32_PIN(
1135 PINCTRL_PIN(116, "PH4"),
1136 STM32_FUNCTION(0, "GPIOH4"),
1137 STM32_FUNCTION(5, "I2C2_SCL"),
1138 STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
1139 STM32_FUNCTION(16, "EVENTOUT"),
1140 STM32_FUNCTION(17, "ANALOG")
1141 ),
1142 STM32_PIN(
1143 PINCTRL_PIN(117, "PH5"),
1144 STM32_FUNCTION(0, "GPIOH5"),
1145 STM32_FUNCTION(5, "I2C2_SDA"),
1146 STM32_FUNCTION(6, "SPI5_NSS"),
1147 STM32_FUNCTION(13, "FMC_SDNWE"),
1148 STM32_FUNCTION(16, "EVENTOUT"),
1149 STM32_FUNCTION(17, "ANALOG")
1150 ),
1151 STM32_PIN(
1152 PINCTRL_PIN(118, "PH6"),
1153 STM32_FUNCTION(0, "GPIOH6"),
1154 STM32_FUNCTION(5, "I2C2_SMBA"),
1155 STM32_FUNCTION(6, "SPI5_SCK"),
1156 STM32_FUNCTION(10, "TIM12_CH1"),
1157 STM32_FUNCTION(12, "ETH_MII_RXD2"),
1158 STM32_FUNCTION(13, "FMC_SDNE1"),
1159 STM32_FUNCTION(14, "DCMI_D8"),
1160 STM32_FUNCTION(16, "EVENTOUT"),
1161 STM32_FUNCTION(17, "ANALOG")
1162 ),
1163 STM32_PIN(
1164 PINCTRL_PIN(119, "PH7"),
1165 STM32_FUNCTION(0, "GPIOH7"),
1166 STM32_FUNCTION(5, "I2C3_SCL"),
1167 STM32_FUNCTION(6, "SPI5_MISO"),
1168 STM32_FUNCTION(12, "ETH_MII_RXD3"),
1169 STM32_FUNCTION(13, "FMC_SDCKE1"),
1170 STM32_FUNCTION(14, "DCMI_D9"),
1171 STM32_FUNCTION(16, "EVENTOUT"),
1172 STM32_FUNCTION(17, "ANALOG")
1173 ),
1174 STM32_PIN(
1175 PINCTRL_PIN(120, "PH8"),
1176 STM32_FUNCTION(0, "GPIOH8"),
1177 STM32_FUNCTION(5, "I2C3_SDA"),
1178 STM32_FUNCTION(13, "FMC_D16"),
1179 STM32_FUNCTION(14, "DCMI_HSYNC"),
1180 STM32_FUNCTION(15, "LCD_R2"),
1181 STM32_FUNCTION(16, "EVENTOUT"),
1182 STM32_FUNCTION(17, "ANALOG")
1183 ),
1184 STM32_PIN(
1185 PINCTRL_PIN(121, "PH9"),
1186 STM32_FUNCTION(0, "GPIOH9"),
1187 STM32_FUNCTION(5, "I2C3_SMBA"),
1188 STM32_FUNCTION(10, "TIM12_CH2"),
1189 STM32_FUNCTION(13, "FMC_D17"),
1190 STM32_FUNCTION(14, "DCMI_D0"),
1191 STM32_FUNCTION(15, "LCD_R3"),
1192 STM32_FUNCTION(16, "EVENTOUT"),
1193 STM32_FUNCTION(17, "ANALOG")
1194 ),
1195 STM32_PIN(
1196 PINCTRL_PIN(122, "PH10"),
1197 STM32_FUNCTION(0, "GPIOH10"),
1198 STM32_FUNCTION(3, "TIM5_CH1"),
1199 STM32_FUNCTION(13, "FMC_D18"),
1200 STM32_FUNCTION(14, "DCMI_D1"),
1201 STM32_FUNCTION(15, "LCD_R4"),
1202 STM32_FUNCTION(16, "EVENTOUT"),
1203 STM32_FUNCTION(17, "ANALOG")
1204 ),
1205 STM32_PIN(
1206 PINCTRL_PIN(123, "PH11"),
1207 STM32_FUNCTION(0, "GPIOH11"),
1208 STM32_FUNCTION(3, "TIM5_CH2"),
1209 STM32_FUNCTION(13, "FMC_D19"),
1210 STM32_FUNCTION(14, "DCMI_D2"),
1211 STM32_FUNCTION(15, "LCD_R5"),
1212 STM32_FUNCTION(16, "EVENTOUT"),
1213 STM32_FUNCTION(17, "ANALOG")
1214 ),
1215 STM32_PIN(
1216 PINCTRL_PIN(124, "PH12"),
1217 STM32_FUNCTION(0, "GPIOH12"),
1218 STM32_FUNCTION(3, "TIM5_CH3"),
1219 STM32_FUNCTION(13, "FMC_D20"),
1220 STM32_FUNCTION(14, "DCMI_D3"),
1221 STM32_FUNCTION(15, "LCD_R6"),
1222 STM32_FUNCTION(16, "EVENTOUT"),
1223 STM32_FUNCTION(17, "ANALOG")
1224 ),
1225 STM32_PIN(
1226 PINCTRL_PIN(125, "PH13"),
1227 STM32_FUNCTION(0, "GPIOH13"),
1228 STM32_FUNCTION(4, "TIM8_CH1N"),
1229 STM32_FUNCTION(10, "CAN1_TX"),
1230 STM32_FUNCTION(13, "FMC_D21"),
1231 STM32_FUNCTION(15, "LCD_G2"),
1232 STM32_FUNCTION(16, "EVENTOUT"),
1233 STM32_FUNCTION(17, "ANALOG")
1234 ),
1235 STM32_PIN(
1236 PINCTRL_PIN(126, "PH14"),
1237 STM32_FUNCTION(0, "GPIOH14"),
1238 STM32_FUNCTION(4, "TIM8_CH2N"),
1239 STM32_FUNCTION(13, "FMC_D22"),
1240 STM32_FUNCTION(14, "DCMI_D4"),
1241 STM32_FUNCTION(15, "LCD_G3"),
1242 STM32_FUNCTION(16, "EVENTOUT"),
1243 STM32_FUNCTION(17, "ANALOG")
1244 ),
1245 STM32_PIN(
1246 PINCTRL_PIN(127, "PH15"),
1247 STM32_FUNCTION(0, "GPIOH15"),
1248 STM32_FUNCTION(4, "TIM8_CH3N"),
1249 STM32_FUNCTION(13, "FMC_D23"),
1250 STM32_FUNCTION(14, "DCMI_D11"),
1251 STM32_FUNCTION(15, "LCD_G4"),
1252 STM32_FUNCTION(16, "EVENTOUT"),
1253 STM32_FUNCTION(17, "ANALOG")
1254 ),
1255 STM32_PIN(
1256 PINCTRL_PIN(128, "PI0"),
1257 STM32_FUNCTION(0, "GPIOI0"),
1258 STM32_FUNCTION(3, "TIM5_CH4"),
1259 STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
1260 STM32_FUNCTION(13, "FMC_D24"),
1261 STM32_FUNCTION(14, "DCMI_D13"),
1262 STM32_FUNCTION(15, "LCD_G5"),
1263 STM32_FUNCTION(16, "EVENTOUT"),
1264 STM32_FUNCTION(17, "ANALOG")
1265 ),
1266 STM32_PIN(
1267 PINCTRL_PIN(129, "PI1"),
1268 STM32_FUNCTION(0, "GPIOI1"),
1269 STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
1270 STM32_FUNCTION(13, "FMC_D25"),
1271 STM32_FUNCTION(14, "DCMI_D8"),
1272 STM32_FUNCTION(15, "LCD_G6"),
1273 STM32_FUNCTION(16, "EVENTOUT"),
1274 STM32_FUNCTION(17, "ANALOG")
1275 ),
1276 STM32_PIN(
1277 PINCTRL_PIN(130, "PI2"),
1278 STM32_FUNCTION(0, "GPIOI2"),
1279 STM32_FUNCTION(4, "TIM8_CH4"),
1280 STM32_FUNCTION(6, "SPI2_MISO"),
1281 STM32_FUNCTION(7, "I2S2EXT_SD"),
1282 STM32_FUNCTION(13, "FMC_D26"),
1283 STM32_FUNCTION(14, "DCMI_D9"),
1284 STM32_FUNCTION(15, "LCD_G7"),
1285 STM32_FUNCTION(16, "EVENTOUT"),
1286 STM32_FUNCTION(17, "ANALOG")
1287 ),
1288 STM32_PIN(
1289 PINCTRL_PIN(131, "PI3"),
1290 STM32_FUNCTION(0, "GPIOI3"),
1291 STM32_FUNCTION(4, "TIM8_ETR"),
1292 STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
1293 STM32_FUNCTION(13, "FMC_D27"),
1294 STM32_FUNCTION(14, "DCMI_D10"),
1295 STM32_FUNCTION(16, "EVENTOUT"),
1296 STM32_FUNCTION(17, "ANALOG")
1297 ),
1298 STM32_PIN(
1299 PINCTRL_PIN(132, "PI4"),
1300 STM32_FUNCTION(0, "GPIOI4"),
1301 STM32_FUNCTION(4, "TIM8_BKIN"),
1302 STM32_FUNCTION(13, "FMC_NBL2"),
1303 STM32_FUNCTION(14, "DCMI_D5"),
1304 STM32_FUNCTION(15, "LCD_B4"),
1305 STM32_FUNCTION(16, "EVENTOUT"),
1306 STM32_FUNCTION(17, "ANALOG")
1307 ),
1308 STM32_PIN(
1309 PINCTRL_PIN(133, "PI5"),
1310 STM32_FUNCTION(0, "GPIOI5"),
1311 STM32_FUNCTION(4, "TIM8_CH1"),
1312 STM32_FUNCTION(13, "FMC_NBL3"),
1313 STM32_FUNCTION(14, "DCMI_VSYNC"),
1314 STM32_FUNCTION(15, "LCD_B5"),
1315 STM32_FUNCTION(16, "EVENTOUT"),
1316 STM32_FUNCTION(17, "ANALOG")
1317 ),
1318 STM32_PIN(
1319 PINCTRL_PIN(134, "PI6"),
1320 STM32_FUNCTION(0, "GPIOI6"),
1321 STM32_FUNCTION(4, "TIM8_CH2"),
1322 STM32_FUNCTION(13, "FMC_D28"),
1323 STM32_FUNCTION(14, "DCMI_D6"),
1324 STM32_FUNCTION(15, "LCD_B6"),
1325 STM32_FUNCTION(16, "EVENTOUT"),
1326 STM32_FUNCTION(17, "ANALOG")
1327 ),
1328 STM32_PIN(
1329 PINCTRL_PIN(135, "PI7"),
1330 STM32_FUNCTION(0, "GPIOI7"),
1331 STM32_FUNCTION(4, "TIM8_CH3"),
1332 STM32_FUNCTION(13, "FMC_D29"),
1333 STM32_FUNCTION(14, "DCMI_D7"),
1334 STM32_FUNCTION(15, "LCD_B7"),
1335 STM32_FUNCTION(16, "EVENTOUT"),
1336 STM32_FUNCTION(17, "ANALOG")
1337 ),
1338 STM32_PIN(
1339 PINCTRL_PIN(136, "PI8"),
1340 STM32_FUNCTION(0, "GPIOI8"),
1341 STM32_FUNCTION(16, "EVENTOUT"),
1342 STM32_FUNCTION(17, "ANALOG")
1343 ),
1344 STM32_PIN(
1345 PINCTRL_PIN(137, "PI9"),
1346 STM32_FUNCTION(0, "GPIOI9"),
1347 STM32_FUNCTION(10, "CAN1_RX"),
1348 STM32_FUNCTION(13, "FMC_D30"),
1349 STM32_FUNCTION(15, "LCD_VSYNC"),
1350 STM32_FUNCTION(16, "EVENTOUT"),
1351 STM32_FUNCTION(17, "ANALOG")
1352 ),
1353 STM32_PIN(
1354 PINCTRL_PIN(138, "PI10"),
1355 STM32_FUNCTION(0, "GPIOI10"),
1356 STM32_FUNCTION(12, "ETH_MII_RX_ER"),
1357 STM32_FUNCTION(13, "FMC_D31"),
1358 STM32_FUNCTION(15, "LCD_HSYNC"),
1359 STM32_FUNCTION(16, "EVENTOUT"),
1360 STM32_FUNCTION(17, "ANALOG")
1361 ),
1362 STM32_PIN(
1363 PINCTRL_PIN(139, "PI11"),
1364 STM32_FUNCTION(0, "GPIOI11"),
1365 STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
1366 STM32_FUNCTION(16, "EVENTOUT"),
1367 STM32_FUNCTION(17, "ANALOG")
1368 ),
1369 STM32_PIN(
1370 PINCTRL_PIN(140, "PI12"),
1371 STM32_FUNCTION(0, "GPIOI12"),
1372 STM32_FUNCTION(15, "LCD_HSYNC"),
1373 STM32_FUNCTION(16, "EVENTOUT"),
1374 STM32_FUNCTION(17, "ANALOG")
1375 ),
1376 STM32_PIN(
1377 PINCTRL_PIN(141, "PI13"),
1378 STM32_FUNCTION(0, "GPIOI13"),
1379 STM32_FUNCTION(15, "LCD_VSYNC"),
1380 STM32_FUNCTION(16, "EVENTOUT"),
1381 STM32_FUNCTION(17, "ANALOG")
1382 ),
1383 STM32_PIN(
1384 PINCTRL_PIN(142, "PI14"),
1385 STM32_FUNCTION(0, "GPIOI14"),
1386 STM32_FUNCTION(15, "LCD_CLK"),
1387 STM32_FUNCTION(16, "EVENTOUT"),
1388 STM32_FUNCTION(17, "ANALOG")
1389 ),
1390 STM32_PIN(
1391 PINCTRL_PIN(143, "PI15"),
1392 STM32_FUNCTION(0, "GPIOI15"),
1393 STM32_FUNCTION(15, "LCD_R0"),
1394 STM32_FUNCTION(16, "EVENTOUT"),
1395 STM32_FUNCTION(17, "ANALOG")
1396 ),
1397 STM32_PIN(
1398 PINCTRL_PIN(144, "PJ0"),
1399 STM32_FUNCTION(0, "GPIOJ0"),
1400 STM32_FUNCTION(15, "LCD_R1"),
1401 STM32_FUNCTION(16, "EVENTOUT"),
1402 STM32_FUNCTION(17, "ANALOG")
1403 ),
1404 STM32_PIN(
1405 PINCTRL_PIN(145, "PJ1"),
1406 STM32_FUNCTION(0, "GPIOJ1"),
1407 STM32_FUNCTION(15, "LCD_R2"),
1408 STM32_FUNCTION(16, "EVENTOUT"),
1409 STM32_FUNCTION(17, "ANALOG")
1410 ),
1411 STM32_PIN(
1412 PINCTRL_PIN(146, "PJ2"),
1413 STM32_FUNCTION(0, "GPIOJ2"),
1414 STM32_FUNCTION(15, "LCD_R3"),
1415 STM32_FUNCTION(16, "EVENTOUT"),
1416 STM32_FUNCTION(17, "ANALOG")
1417 ),
1418 STM32_PIN(
1419 PINCTRL_PIN(147, "PJ3"),
1420 STM32_FUNCTION(0, "GPIOJ3"),
1421 STM32_FUNCTION(15, "LCD_R4"),
1422 STM32_FUNCTION(16, "EVENTOUT"),
1423 STM32_FUNCTION(17, "ANALOG")
1424 ),
1425 STM32_PIN(
1426 PINCTRL_PIN(148, "PJ4"),
1427 STM32_FUNCTION(0, "GPIOJ4"),
1428 STM32_FUNCTION(15, "LCD_R5"),
1429 STM32_FUNCTION(16, "EVENTOUT"),
1430 STM32_FUNCTION(17, "ANALOG")
1431 ),
1432 STM32_PIN(
1433 PINCTRL_PIN(149, "PJ5"),
1434 STM32_FUNCTION(0, "GPIOJ5"),
1435 STM32_FUNCTION(15, "LCD_R6"),
1436 STM32_FUNCTION(16, "EVENTOUT"),
1437 STM32_FUNCTION(17, "ANALOG")
1438 ),
1439 STM32_PIN(
1440 PINCTRL_PIN(150, "PJ6"),
1441 STM32_FUNCTION(0, "GPIOJ6"),
1442 STM32_FUNCTION(15, "LCD_R7"),
1443 STM32_FUNCTION(16, "EVENTOUT"),
1444 STM32_FUNCTION(17, "ANALOG")
1445 ),
1446 STM32_PIN(
1447 PINCTRL_PIN(151, "PJ7"),
1448 STM32_FUNCTION(0, "GPIOJ7"),
1449 STM32_FUNCTION(15, "LCD_G0"),
1450 STM32_FUNCTION(16, "EVENTOUT"),
1451 STM32_FUNCTION(17, "ANALOG")
1452 ),
1453 STM32_PIN(
1454 PINCTRL_PIN(152, "PJ8"),
1455 STM32_FUNCTION(0, "GPIOJ8"),
1456 STM32_FUNCTION(15, "LCD_G1"),
1457 STM32_FUNCTION(16, "EVENTOUT"),
1458 STM32_FUNCTION(17, "ANALOG")
1459 ),
1460 STM32_PIN(
1461 PINCTRL_PIN(153, "PJ9"),
1462 STM32_FUNCTION(0, "GPIOJ9"),
1463 STM32_FUNCTION(15, "LCD_G2"),
1464 STM32_FUNCTION(16, "EVENTOUT"),
1465 STM32_FUNCTION(17, "ANALOG")
1466 ),
1467 STM32_PIN(
1468 PINCTRL_PIN(154, "PJ10"),
1469 STM32_FUNCTION(0, "GPIOJ10"),
1470 STM32_FUNCTION(15, "LCD_G3"),
1471 STM32_FUNCTION(16, "EVENTOUT"),
1472 STM32_FUNCTION(17, "ANALOG")
1473 ),
1474 STM32_PIN(
1475 PINCTRL_PIN(155, "PJ11"),
1476 STM32_FUNCTION(0, "GPIOJ11"),
1477 STM32_FUNCTION(15, "LCD_G4"),
1478 STM32_FUNCTION(16, "EVENTOUT"),
1479 STM32_FUNCTION(17, "ANALOG")
1480 ),
1481 STM32_PIN(
1482 PINCTRL_PIN(156, "PJ12"),
1483 STM32_FUNCTION(0, "GPIOJ12"),
1484 STM32_FUNCTION(15, "LCD_B0"),
1485 STM32_FUNCTION(16, "EVENTOUT"),
1486 STM32_FUNCTION(17, "ANALOG")
1487 ),
1488 STM32_PIN(
1489 PINCTRL_PIN(157, "PJ13"),
1490 STM32_FUNCTION(0, "GPIOJ13"),
1491 STM32_FUNCTION(15, "LCD_B1"),
1492 STM32_FUNCTION(16, "EVENTOUT"),
1493 STM32_FUNCTION(17, "ANALOG")
1494 ),
1495 STM32_PIN(
1496 PINCTRL_PIN(158, "PJ14"),
1497 STM32_FUNCTION(0, "GPIOJ14"),
1498 STM32_FUNCTION(15, "LCD_B2"),
1499 STM32_FUNCTION(16, "EVENTOUT"),
1500 STM32_FUNCTION(17, "ANALOG")
1501 ),
1502 STM32_PIN(
1503 PINCTRL_PIN(159, "PJ15"),
1504 STM32_FUNCTION(0, "GPIOJ15"),
1505 STM32_FUNCTION(15, "LCD_B3"),
1506 STM32_FUNCTION(16, "EVENTOUT"),
1507 STM32_FUNCTION(17, "ANALOG")
1508 ),
1509 STM32_PIN(
1510 PINCTRL_PIN(160, "PK0"),
1511 STM32_FUNCTION(0, "GPIOK0"),
1512 STM32_FUNCTION(15, "LCD_G5"),
1513 STM32_FUNCTION(16, "EVENTOUT"),
1514 STM32_FUNCTION(17, "ANALOG")
1515 ),
1516 STM32_PIN(
1517 PINCTRL_PIN(161, "PK1"),
1518 STM32_FUNCTION(0, "GPIOK1"),
1519 STM32_FUNCTION(15, "LCD_G6"),
1520 STM32_FUNCTION(16, "EVENTOUT"),
1521 STM32_FUNCTION(17, "ANALOG")
1522 ),
1523 STM32_PIN(
1524 PINCTRL_PIN(162, "PK2"),
1525 STM32_FUNCTION(0, "GPIOK2"),
1526 STM32_FUNCTION(15, "LCD_G7"),
1527 STM32_FUNCTION(16, "EVENTOUT"),
1528 STM32_FUNCTION(17, "ANALOG")
1529 ),
1530 STM32_PIN(
1531 PINCTRL_PIN(163, "PK3"),
1532 STM32_FUNCTION(0, "GPIOK3"),
1533 STM32_FUNCTION(15, "LCD_B4"),
1534 STM32_FUNCTION(16, "EVENTOUT"),
1535 STM32_FUNCTION(17, "ANALOG")
1536 ),
1537 STM32_PIN(
1538 PINCTRL_PIN(164, "PK4"),
1539 STM32_FUNCTION(0, "GPIOK4"),
1540 STM32_FUNCTION(15, "LCD_B5"),
1541 STM32_FUNCTION(16, "EVENTOUT"),
1542 STM32_FUNCTION(17, "ANALOG")
1543 ),
1544 STM32_PIN(
1545 PINCTRL_PIN(165, "PK5"),
1546 STM32_FUNCTION(0, "GPIOK5"),
1547 STM32_FUNCTION(15, "LCD_B6"),
1548 STM32_FUNCTION(16, "EVENTOUT"),
1549 STM32_FUNCTION(17, "ANALOG")
1550 ),
1551 STM32_PIN(
1552 PINCTRL_PIN(166, "PK6"),
1553 STM32_FUNCTION(0, "GPIOK6"),
1554 STM32_FUNCTION(15, "LCD_B7"),
1555 STM32_FUNCTION(16, "EVENTOUT"),
1556 STM32_FUNCTION(17, "ANALOG")
1557 ),
1558 STM32_PIN(
1559 PINCTRL_PIN(167, "PK7"),
1560 STM32_FUNCTION(0, "GPIOK7"),
1561 STM32_FUNCTION(15, "LCD_DE"),
1562 STM32_FUNCTION(16, "EVENTOUT"),
1563 STM32_FUNCTION(17, "ANALOG")
1564 ),
1565};
1566
1567static struct stm32_pinctrl_match_data stm32f429_match_data = {
1568 .pins = stm32f429_pins,
1569 .npins = ARRAY_SIZE(stm32f429_pins),
1570};
1571
1572static const struct of_device_id stm32f429_pctrl_match[] = {
1573 {
1574 .compatible = "st,stm32f429-pinctrl",
1575 .data = &stm32f429_match_data,
1576 },
1577 { }
1578};
1579MODULE_DEVICE_TABLE(of, stm32f429_pctrl_match);
1580
1581static struct platform_driver stm32f429_pinctrl_driver = {
1582 .probe = stm32_pctl_probe,
1583 .driver = {
1584 .name = "stm32f429-pinctrl",
1585 .of_match_table = stm32f429_pctrl_match,
1586 },
1587};
1588
1589static int __init stm32f429_pinctrl_init(void)
1590{
1591 return platform_driver_register(&stm32f429_pinctrl_driver);
1592}
1593
1594module_init(stm32f429_pinctrl_init);
1595
1596MODULE_LICENSE("GPL");
1597MODULE_DESCRIPTION("STM32F429 Pinctrl Driver");
1598MODULE_AUTHOR("Maxime Coquelin <mcoquelin.stm32@gmail.com>");
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 18:59:34 -0400