summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/sirf
diff options
context:
space:
mode:
authorWei Chen <Wei.Chen@csr.com>2015-10-09 02:31:18 -0400
committerLinus Walleij <linus.walleij@linaro.org>2015-10-16 15:56:07 -0400
commit3fa508cd233da76eb00377440600f53eebfec08a (patch)
treea89d01c664db990da79fef61daaacd4c07d5a259 /drivers/pinctrl/sirf
parent3c6531c7461b80c18284d43b59791c60cd67582f (diff)
pinctrl: atlas7: support atlas7 step B changes
The the pin groups and pin functions have been changed in atlas7 step B soc. We have to update the driver to support step B chip. Changes: 1. add 5 jtag pins to IOC_TOP: "jtag_tdo", "jtag_tms","jtag_tck", "jtag_tdi", "jtag_trstn" these 5 pins can be mutiplex with other functions, so we have to conver these 5 pins in pinmux. 2. add pin groups for audio digmic, audio spdif, can transceiver en, can transceiver stb, i2s0, i2s1 and jtag. 3. serval pins can be located to more PADs: audio_uart0_urfs, audio_uart1_urfs, audio_uart2_urfs, audio_uart2_urxd, audio_uart2_usclk, audio_uart2_utfs, audio_uart2_utxd, can0_rxd, can0_txd, can1_rxd, can1_txd jtag_ntrst, jtag_swdiotms, jtag_tck, jtag_tdi, jtag_tdo, pw_cko0, pw_cko1, pw_i2s01, pw_pwm0, pw_pwm1, sd2_cdb, sd2_wpb, uart2_cts, uart2_rts, uart2_rxd, uart2_txd, uart3_cts, uart3_rts, uart3_rxd, uart3_txd, uart4_cts, uart4_rts, usb0_drvvbus, usb1_drvvbus. Because of Changes#3, some functions should have more than one pin groups. So we have to split the original pin group to serval pin groups. For example: audio_uart0 has 5 pins, on STEPA, each of these 5 pins only has one related PAD. But on STEPB, audio_uart0_urfs has 4 related PAD. So we place the 4 pins with one PAD into a single pin group: audio_uart0_basic_group. and place urfs pin wtih different PADs to 4 different pin groups: audio_uart0_urfs_group0, ..., audio_uart0_urfs_group3 A full audio_uart0 pin group can be: pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group0>; If audio_uart0 pin group encountered some confiction, we only have to change the urfs group: pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group2>; Signed-off-by: Wei Chen <Wei.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sirf')
-rw-r--r--drivers/pinctrl/sirf/pinctrl-atlas7.c1828
1 files changed, 1540 insertions, 288 deletions
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c
index 0d24d9e4b70c..829018c812bd 100644
--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c
+++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c
@@ -544,6 +544,11 @@ static const struct pinctrl_pin_desc atlas7_ioc_pads[] = {
544 PINCTRL_PIN(156, "lvds_tx0d1n"), 544 PINCTRL_PIN(156, "lvds_tx0d1n"),
545 PINCTRL_PIN(157, "lvds_tx0d0p"), 545 PINCTRL_PIN(157, "lvds_tx0d0p"),
546 PINCTRL_PIN(158, "lvds_tx0d0n"), 546 PINCTRL_PIN(158, "lvds_tx0d0n"),
547 PINCTRL_PIN(159, "jtag_tdo"),
548 PINCTRL_PIN(160, "jtag_tms"),
549 PINCTRL_PIN(161, "jtag_tck"),
550 PINCTRL_PIN(162, "jtag_tdi"),
551 PINCTRL_PIN(163, "jtag_trstn"),
547}; 552};
548 553
549struct atlas7_pad_config atlas7_ioc_pad_confs[] = { 554struct atlas7_pad_config atlas7_ioc_pad_confs[] = {
@@ -708,6 +713,11 @@ struct atlas7_pad_config atlas7_ioc_pad_confs[] = {
708 PADCONF(156, 7, 0x130, 0x270, -1, 0x480, 28, 14, 0, 7), 713 PADCONF(156, 7, 0x130, 0x270, -1, 0x480, 28, 14, 0, 7),
709 PADCONF(157, 7, 0x138, 0x278, -1, 0x480, 0, 0, 0, 8), 714 PADCONF(157, 7, 0x138, 0x278, -1, 0x480, 0, 0, 0, 8),
710 PADCONF(158, 7, 0x138, 0x278, -1, 0x480, 4, 2, 0, 9), 715 PADCONF(158, 7, 0x138, 0x278, -1, 0x480, 4, 2, 0, 9),
716 PADCONF(159, 5, 0x140, 0x280, 0x380, -1, 0, 0, 0, 0),
717 PADCONF(160, 6, 0x140, 0x280, 0x380, -1, 4, 2, 2, 0),
718 PADCONF(161, 5, 0x140, 0x280, 0x380, -1, 8, 4, 4, 0),
719 PADCONF(162, 6, 0x140, 0x280, 0x380, -1, 12, 6, 6, 0),
720 PADCONF(163, 6, 0x140, 0x280, 0x380, -1, 16, 8, 8, 0),
711}; 721};
712 722
713/* pin list of each pin group */ 723/* pin list of each pin group */
@@ -724,12 +734,15 @@ static const unsigned int sp_rgmii_gpio_pins[] = { 97, 98, 99, 100, 101, 102,
724 141, 142, 143, 144, 145, 146, 147, 148, }; 734 141, 142, 143, 144, 145, 146, 147, 148, };
725static const unsigned int lvds_gpio_pins[] = { 157, 158, 155, 156, 153, 154, 735static const unsigned int lvds_gpio_pins[] = { 157, 158, 155, 156, 153, 154,
726 151, 152, 149, 150, }; 736 151, 152, 149, 150, };
727static const unsigned int uart_nand_gpio_pins[] = { 44, 43, 42, 41, 40, 39, 737static const unsigned int jtag_uart_nand_gpio_pins[] = { 44, 43, 42, 41, 40,
728 38, 37, 46, 47, 48, 49, 50, 52, 51, 45, 133, 134, 135, 136, 738 39, 38, 37, 46, 47, 48, 49, 50, 52, 51, 45, 133, 134, 135,
729 137, 138, 139, 140, }; 739 136, 137, 138, 139, 140, 159, 160, 161, 162, 163, };
730static const unsigned int rtc_gpio_pins[] = { 0, 1, 2, 3, 4, 10, 11, 12, 13, 740static const unsigned int rtc_gpio_pins[] = { 0, 1, 2, 3, 4, 10, 11, 12, 13,
731 14, 15, 16, 17, }; 741 14, 15, 16, 17, 9, };
732static const unsigned int audio_ac97_pins[] = { 113, 118, 115, 114, }; 742static const unsigned int audio_ac97_pins[] = { 113, 118, 115, 114, };
743static const unsigned int audio_digmic_pins0[] = { 51, };
744static const unsigned int audio_digmic_pins1[] = { 122, };
745static const unsigned int audio_digmic_pins2[] = { 161, };
733static const unsigned int audio_func_dbg_pins[] = { 141, 144, 44, 43, 42, 41, 746static const unsigned int audio_func_dbg_pins[] = { 141, 144, 44, 43, 42, 41,
734 40, 39, 38, 37, 74, 75, 76, 77, 78, 79, 81, 113, 114, 118, 747 40, 39, 38, 37, 74, 75, 76, 77, 78, 79, 81, 113, 114, 118,
735 115, 49, 50, 142, 143, 80, }; 748 115, 49, 50, 142, 143, 80, };
@@ -737,16 +750,49 @@ static const unsigned int audio_i2s_pins[] = { 118, 115, 116, 117, 112, 113,
737 114, }; 750 114, };
738static const unsigned int audio_i2s_2ch_pins[] = { 118, 115, 112, 113, 114, }; 751static const unsigned int audio_i2s_2ch_pins[] = { 118, 115, 112, 113, 114, };
739static const unsigned int audio_i2s_extclk_pins[] = { 112, }; 752static const unsigned int audio_i2s_extclk_pins[] = { 112, };
740static const unsigned int audio_uart0_pins[] = { 143, 142, 141, 144, }; 753static const unsigned int audio_spdif_out_pins0[] = { 112, };
741static const unsigned int audio_uart1_pins[] = { 147, 146, 145, 148, }; 754static const unsigned int audio_spdif_out_pins1[] = { 116, };
742static const unsigned int audio_uart2_pins0[] = { 20, 21, 19, 18, }; 755static const unsigned int audio_spdif_out_pins2[] = { 142, };
743static const unsigned int audio_uart2_pins1[] = { 109, 110, 101, 111, }; 756static const unsigned int audio_uart0_basic_pins[] = { 143, 142, 141, 144, };
744static const unsigned int c_can_trnsvr_pins[] = { 1, }; 757static const unsigned int audio_uart0_urfs_pins0[] = { 117, };
745static const unsigned int c0_can_pins0[] = { 11, 10, }; 758static const unsigned int audio_uart0_urfs_pins1[] = { 139, };
746static const unsigned int c0_can_pins1[] = { 2, 3, }; 759static const unsigned int audio_uart0_urfs_pins2[] = { 163, };
747static const unsigned int c1_can_pins0[] = { 138, 137, }; 760static const unsigned int audio_uart0_urfs_pins3[] = { 162, };
748static const unsigned int c1_can_pins1[] = { 147, 146, }; 761static const unsigned int audio_uart1_basic_pins[] = { 147, 146, 145, 148, };
749static const unsigned int c1_can_pins2[] = { 2, 3, }; 762static const unsigned int audio_uart1_urfs_pins0[] = { 117, };
763static const unsigned int audio_uart1_urfs_pins1[] = { 140, };
764static const unsigned int audio_uart1_urfs_pins2[] = { 163, };
765static const unsigned int audio_uart2_urfs_pins0[] = { 139, };
766static const unsigned int audio_uart2_urfs_pins1[] = { 163, };
767static const unsigned int audio_uart2_urfs_pins2[] = { 96, };
768static const unsigned int audio_uart2_urxd_pins0[] = { 20, };
769static const unsigned int audio_uart2_urxd_pins1[] = { 109, };
770static const unsigned int audio_uart2_urxd_pins2[] = { 93, };
771static const unsigned int audio_uart2_usclk_pins0[] = { 19, };
772static const unsigned int audio_uart2_usclk_pins1[] = { 101, };
773static const unsigned int audio_uart2_usclk_pins2[] = { 91, };
774static const unsigned int audio_uart2_utfs_pins0[] = { 18, };
775static const unsigned int audio_uart2_utfs_pins1[] = { 111, };
776static const unsigned int audio_uart2_utfs_pins2[] = { 94, };
777static const unsigned int audio_uart2_utxd_pins0[] = { 21, };
778static const unsigned int audio_uart2_utxd_pins1[] = { 110, };
779static const unsigned int audio_uart2_utxd_pins2[] = { 92, };
780static const unsigned int c_can_trnsvr_en_pins0[] = { 2, };
781static const unsigned int c_can_trnsvr_en_pins1[] = { 0, };
782static const unsigned int c_can_trnsvr_intr_pins[] = { 1, };
783static const unsigned int c_can_trnsvr_stb_n_pins[] = { 3, };
784static const unsigned int c0_can_rxd_trnsv0_pins[] = { 11, };
785static const unsigned int c0_can_rxd_trnsv1_pins[] = { 2, };
786static const unsigned int c0_can_txd_trnsv0_pins[] = { 10, };
787static const unsigned int c0_can_txd_trnsv1_pins[] = { 3, };
788static const unsigned int c1_can_rxd_pins0[] = { 138, };
789static const unsigned int c1_can_rxd_pins1[] = { 147, };
790static const unsigned int c1_can_rxd_pins2[] = { 2, };
791static const unsigned int c1_can_rxd_pins3[] = { 162, };
792static const unsigned int c1_can_txd_pins0[] = { 137, };
793static const unsigned int c1_can_txd_pins1[] = { 146, };
794static const unsigned int c1_can_txd_pins2[] = { 3, };
795static const unsigned int c1_can_txd_pins3[] = { 161, };
750static const unsigned int ca_audio_lpc_pins[] = { 62, 63, 64, 65, 66, 67, 68, 796static const unsigned int ca_audio_lpc_pins[] = { 62, 63, 64, 65, 66, 67, 68,
751 69, 70, 71, }; 797 69, 70, 71, };
752static const unsigned int ca_bt_lpc_pins[] = { 85, 86, 87, 88, 89, 90, }; 798static const unsigned int ca_bt_lpc_pins[] = { 85, 86, 87, 88, 89, 90, };
@@ -804,7 +850,29 @@ static const unsigned int gn_trg_shutdown_pins2[] = { 117, };
804static const unsigned int gn_trg_shutdown_pins3[] = { 123, }; 850static const unsigned int gn_trg_shutdown_pins3[] = { 123, };
805static const unsigned int i2c0_pins[] = { 128, 127, }; 851static const unsigned int i2c0_pins[] = { 128, 127, };
806static const unsigned int i2c1_pins[] = { 126, 125, }; 852static const unsigned int i2c1_pins[] = { 126, 125, };
807static const unsigned int jtag_pins0[] = { 125, 4, 2, 0, 1, 3, }; 853static const unsigned int i2s0_pins[] = { 91, 93, 94, 92, };
854static const unsigned int i2s1_basic_pins[] = { 95, 96, };
855static const unsigned int i2s1_rxd0_pins0[] = { 61, };
856static const unsigned int i2s1_rxd0_pins1[] = { 131, };
857static const unsigned int i2s1_rxd0_pins2[] = { 129, };
858static const unsigned int i2s1_rxd0_pins3[] = { 117, };
859static const unsigned int i2s1_rxd0_pins4[] = { 83, };
860static const unsigned int i2s1_rxd1_pins0[] = { 72, };
861static const unsigned int i2s1_rxd1_pins1[] = { 132, };
862static const unsigned int i2s1_rxd1_pins2[] = { 130, };
863static const unsigned int i2s1_rxd1_pins3[] = { 118, };
864static const unsigned int i2s1_rxd1_pins4[] = { 84, };
865static const unsigned int jtag_jt_dbg_nsrst_pins[] = { 125, };
866static const unsigned int jtag_ntrst_pins0[] = { 4, };
867static const unsigned int jtag_ntrst_pins1[] = { 163, };
868static const unsigned int jtag_swdiotms_pins0[] = { 2, };
869static const unsigned int jtag_swdiotms_pins1[] = { 160, };
870static const unsigned int jtag_tck_pins0[] = { 0, };
871static const unsigned int jtag_tck_pins1[] = { 161, };
872static const unsigned int jtag_tdi_pins0[] = { 1, };
873static const unsigned int jtag_tdi_pins1[] = { 162, };
874static const unsigned int jtag_tdo_pins0[] = { 3, };
875static const unsigned int jtag_tdo_pins1[] = { 159, };
808static const unsigned int ks_kas_spi_pins0[] = { 141, 144, 143, 142, }; 876static const unsigned int ks_kas_spi_pins0[] = { 141, 144, 143, 142, };
809static const unsigned int ld_ldd_pins[] = { 57, 58, 59, 60, 61, 62, 63, 64, 877static const unsigned int ld_ldd_pins[] = { 57, 58, 59, 60, 61, 62, 63, 64,
810 65, 66, 67, 68, 69, 70, 71, 72, 74, 75, 76, 77, 78, 79, 80, 878 65, 66, 67, 68, 69, 70, 71, 72, 74, 75, 76, 77, 78, 79, 80,
@@ -821,7 +889,7 @@ static const unsigned int nd_df_pins[] = { 44, 43, 42, 41, 40, 39, 38, 37,
821 47, 46, 52, 51, 45, 49, 50, 48, 124, }; 889 47, 46, 52, 51, 45, 49, 50, 48, 124, };
822static const unsigned int nd_df_nowp_pins[] = { 44, 43, 42, 41, 40, 39, 38, 890static const unsigned int nd_df_nowp_pins[] = { 44, 43, 42, 41, 40, 39, 38,
823 37, 47, 46, 52, 51, 45, 49, 50, 48, }; 891 37, 47, 46, 52, 51, 45, 49, 50, 48, };
824static const unsigned int ps_pins[] = { 120, 119, }; 892static const unsigned int ps_pins[] = { 120, 119, 121, };
825static const unsigned int pwc_core_on_pins[] = { 8, }; 893static const unsigned int pwc_core_on_pins[] = { 8, };
826static const unsigned int pwc_ext_on_pins[] = { 6, }; 894static const unsigned int pwc_ext_on_pins[] = { 6, };
827static const unsigned int pwc_gpio3_clk_pins[] = { 3, }; 895static const unsigned int pwc_gpio3_clk_pins[] = { 3, };
@@ -836,18 +904,26 @@ static const unsigned int pwc_wakeup_src3_pins[] = { 3, };
836static const unsigned int pw_cko0_pins0[] = { 123, }; 904static const unsigned int pw_cko0_pins0[] = { 123, };
837static const unsigned int pw_cko0_pins1[] = { 101, }; 905static const unsigned int pw_cko0_pins1[] = { 101, };
838static const unsigned int pw_cko0_pins2[] = { 82, }; 906static const unsigned int pw_cko0_pins2[] = { 82, };
907static const unsigned int pw_cko0_pins3[] = { 162, };
839static const unsigned int pw_cko1_pins0[] = { 124, }; 908static const unsigned int pw_cko1_pins0[] = { 124, };
840static const unsigned int pw_cko1_pins1[] = { 110, }; 909static const unsigned int pw_cko1_pins1[] = { 110, };
910static const unsigned int pw_cko1_pins2[] = { 163, };
841static const unsigned int pw_i2s01_clk_pins0[] = { 125, }; 911static const unsigned int pw_i2s01_clk_pins0[] = { 125, };
842static const unsigned int pw_i2s01_clk_pins1[] = { 117, }; 912static const unsigned int pw_i2s01_clk_pins1[] = { 117, };
843static const unsigned int pw_pwm0_pins[] = { 119, }; 913static const unsigned int pw_i2s01_clk_pins2[] = { 132, };
844static const unsigned int pw_pwm1_pins[] = { 120, }; 914static const unsigned int pw_pwm0_pins0[] = { 119, };
915static const unsigned int pw_pwm0_pins1[] = { 159, };
916static const unsigned int pw_pwm1_pins0[] = { 120, };
917static const unsigned int pw_pwm1_pins1[] = { 160, };
918static const unsigned int pw_pwm1_pins2[] = { 131, };
845static const unsigned int pw_pwm2_pins0[] = { 121, }; 919static const unsigned int pw_pwm2_pins0[] = { 121, };
846static const unsigned int pw_pwm2_pins1[] = { 98, }; 920static const unsigned int pw_pwm2_pins1[] = { 98, };
921static const unsigned int pw_pwm2_pins2[] = { 161, };
847static const unsigned int pw_pwm3_pins0[] = { 122, }; 922static const unsigned int pw_pwm3_pins0[] = { 122, };
848static const unsigned int pw_pwm3_pins1[] = { 73, }; 923static const unsigned int pw_pwm3_pins1[] = { 73, };
849static const unsigned int pw_pwm_cpu_vol_pins0[] = { 121, }; 924static const unsigned int pw_pwm_cpu_vol_pins0[] = { 121, };
850static const unsigned int pw_pwm_cpu_vol_pins1[] = { 98, }; 925static const unsigned int pw_pwm_cpu_vol_pins1[] = { 98, };
926static const unsigned int pw_pwm_cpu_vol_pins2[] = { 161, };
851static const unsigned int pw_backlight_pins0[] = { 122, }; 927static const unsigned int pw_backlight_pins0[] = { 122, };
852static const unsigned int pw_backlight_pins1[] = { 73, }; 928static const unsigned int pw_backlight_pins1[] = { 73, };
853static const unsigned int rg_eth_mac_pins[] = { 108, 103, 104, 105, 106, 107, 929static const unsigned int rg_eth_mac_pins[] = { 108, 103, 104, 105, 106, 107,
@@ -863,8 +939,11 @@ static const unsigned int sd1_pins[] = { 48, 49, 44, 43, 42, 41, 40, 39, 38,
863 37, }; 939 37, };
864static const unsigned int sd1_4bit_pins0[] = { 48, 49, 44, 43, 42, 41, }; 940static const unsigned int sd1_4bit_pins0[] = { 48, 49, 44, 43, 42, 41, };
865static const unsigned int sd1_4bit_pins1[] = { 48, 49, 40, 39, 38, 37, }; 941static const unsigned int sd1_4bit_pins1[] = { 48, 49, 40, 39, 38, 37, };
866static const unsigned int sd2_pins0[] = { 124, 31, 32, 33, 34, 35, 36, 123, }; 942static const unsigned int sd2_basic_pins[] = { 31, 32, 33, 34, 35, 36, };
867static const unsigned int sd2_no_cdb_pins0[] = { 31, 32, 33, 34, 35, 36, 123, }; 943static const unsigned int sd2_cdb_pins0[] = { 124, };
944static const unsigned int sd2_cdb_pins1[] = { 161, };
945static const unsigned int sd2_wpb_pins0[] = { 123, };
946static const unsigned int sd2_wpb_pins1[] = { 163, };
868static const unsigned int sd3_pins[] = { 85, 86, 87, 88, 89, 90, }; 947static const unsigned int sd3_pins[] = { 85, 86, 87, 88, 89, 90, };
869static const unsigned int sd5_pins[] = { 91, 92, 93, 94, 95, 96, }; 948static const unsigned int sd5_pins[] = { 91, 92, 93, 94, 95, 96, };
870static const unsigned int sd6_pins0[] = { 79, 78, 74, 75, 76, 77, }; 949static const unsigned int sd6_pins0[] = { 79, 78, 74, 75, 76, 77, };
@@ -877,19 +956,39 @@ static const unsigned int tpiu_trace_pins[] = { 53, 56, 57, 58, 59, 60, 61,
877static const unsigned int uart0_pins[] = { 121, 120, 134, 133, }; 956static const unsigned int uart0_pins[] = { 121, 120, 134, 133, };
878static const unsigned int uart0_nopause_pins[] = { 134, 133, }; 957static const unsigned int uart0_nopause_pins[] = { 134, 133, };
879static const unsigned int uart1_pins[] = { 136, 135, }; 958static const unsigned int uart1_pins[] = { 136, 135, };
880static const unsigned int uart2_pins[] = { 11, 10, }; 959static const unsigned int uart2_cts_pins0[] = { 132, };
881static const unsigned int uart3_pins0[] = { 125, 126, 138, 137, }; 960static const unsigned int uart2_cts_pins1[] = { 162, };
882static const unsigned int uart3_pins1[] = { 111, 109, 84, 83, }; 961static const unsigned int uart2_rts_pins0[] = { 131, };
883static const unsigned int uart3_pins2[] = { 140, 139, 138, 137, }; 962static const unsigned int uart2_rts_pins1[] = { 161, };
884static const unsigned int uart3_pins3[] = { 139, 140, 84, 83, }; 963static const unsigned int uart2_rxd_pins0[] = { 11, };
885static const unsigned int uart3_nopause_pins0[] = { 138, 137, }; 964static const unsigned int uart2_rxd_pins1[] = { 160, };
886static const unsigned int uart3_nopause_pins1[] = { 84, 83, }; 965static const unsigned int uart2_rxd_pins2[] = { 130, };
887static const unsigned int uart4_pins0[] = { 122, 123, 140, 139, }; 966static const unsigned int uart2_txd_pins0[] = { 10, };
888static const unsigned int uart4_pins1[] = { 100, 99, 140, 139, }; 967static const unsigned int uart2_txd_pins1[] = { 159, };
889static const unsigned int uart4_pins2[] = { 117, 116, 140, 139, }; 968static const unsigned int uart2_txd_pins2[] = { 129, };
890static const unsigned int uart4_nopause_pins[] = { 140, 139, }; 969static const unsigned int uart3_cts_pins0[] = { 125, };
891static const unsigned int usb0_drvvbus_pins[] = { 51, }; 970static const unsigned int uart3_cts_pins1[] = { 111, };
892static const unsigned int usb1_drvvbus_pins[] = { 134, }; 971static const unsigned int uart3_cts_pins2[] = { 140, };
972static const unsigned int uart3_rts_pins0[] = { 126, };
973static const unsigned int uart3_rts_pins1[] = { 109, };
974static const unsigned int uart3_rts_pins2[] = { 139, };
975static const unsigned int uart3_rxd_pins0[] = { 138, };
976static const unsigned int uart3_rxd_pins1[] = { 84, };
977static const unsigned int uart3_rxd_pins2[] = { 162, };
978static const unsigned int uart3_txd_pins0[] = { 137, };
979static const unsigned int uart3_txd_pins1[] = { 83, };
980static const unsigned int uart3_txd_pins2[] = { 161, };
981static const unsigned int uart4_basic_pins[] = { 140, 139, };
982static const unsigned int uart4_cts_pins0[] = { 122, };
983static const unsigned int uart4_cts_pins1[] = { 100, };
984static const unsigned int uart4_cts_pins2[] = { 117, };
985static const unsigned int uart4_rts_pins0[] = { 123, };
986static const unsigned int uart4_rts_pins1[] = { 99, };
987static const unsigned int uart4_rts_pins2[] = { 116, };
988static const unsigned int usb0_drvvbus_pins0[] = { 51, };
989static const unsigned int usb0_drvvbus_pins1[] = { 162, };
990static const unsigned int usb1_drvvbus_pins0[] = { 134, };
991static const unsigned int usb1_drvvbus_pins1[] = { 163, };
893static const unsigned int visbus_dout_pins[] = { 57, 58, 59, 60, 61, 62, 63, 992static const unsigned int visbus_dout_pins[] = { 57, 58, 59, 60, 61, 62, 63,
894 64, 65, 66, 67, 68, 69, 70, 71, 72, 53, 54, 55, 56, 85, 86, 993 64, 65, 66, 67, 68, 69, 70, 71, 72, 53, 54, 55, 56, 85, 86,
895 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, }; 994 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, };
@@ -910,23 +1009,59 @@ struct atlas7_pin_group altas7_pin_groups[] = {
910 GROUP("sdio_i2s_gpio_grp", sdio_i2s_gpio_pins), 1009 GROUP("sdio_i2s_gpio_grp", sdio_i2s_gpio_pins),
911 GROUP("sp_rgmii_gpio_grp", sp_rgmii_gpio_pins), 1010 GROUP("sp_rgmii_gpio_grp", sp_rgmii_gpio_pins),
912 GROUP("lvds_gpio_grp", lvds_gpio_pins), 1011 GROUP("lvds_gpio_grp", lvds_gpio_pins),
913 GROUP("uart_nand_gpio_grp", uart_nand_gpio_pins), 1012 GROUP("jtag_uart_nand_gpio_grp", jtag_uart_nand_gpio_pins),
914 GROUP("rtc_gpio_grp", rtc_gpio_pins), 1013 GROUP("rtc_gpio_grp", rtc_gpio_pins),
915 GROUP("audio_ac97_grp", audio_ac97_pins), 1014 GROUP("audio_ac97_grp", audio_ac97_pins),
1015 GROUP("audio_digmic_grp0", audio_digmic_pins0),
1016 GROUP("audio_digmic_grp1", audio_digmic_pins1),
1017 GROUP("audio_digmic_grp2", audio_digmic_pins2),
916 GROUP("audio_func_dbg_grp", audio_func_dbg_pins), 1018 GROUP("audio_func_dbg_grp", audio_func_dbg_pins),
917 GROUP("audio_i2s_grp", audio_i2s_pins), 1019 GROUP("audio_i2s_grp", audio_i2s_pins),
918 GROUP("audio_i2s_2ch_grp", audio_i2s_2ch_pins), 1020 GROUP("audio_i2s_2ch_grp", audio_i2s_2ch_pins),
919 GROUP("audio_i2s_extclk_grp", audio_i2s_extclk_pins), 1021 GROUP("audio_i2s_extclk_grp", audio_i2s_extclk_pins),
920 GROUP("audio_uart0_grp", audio_uart0_pins), 1022 GROUP("audio_spdif_out_grp0", audio_spdif_out_pins0),
921 GROUP("audio_uart1_grp", audio_uart1_pins), 1023 GROUP("audio_spdif_out_grp1", audio_spdif_out_pins1),
922 GROUP("audio_uart2_grp0", audio_uart2_pins0), 1024 GROUP("audio_spdif_out_grp2", audio_spdif_out_pins2),
923 GROUP("audio_uart2_grp1", audio_uart2_pins1), 1025 GROUP("audio_uart0_basic_grp", audio_uart0_basic_pins),
924 GROUP("c_can_trnsvr_grp", c_can_trnsvr_pins), 1026 GROUP("audio_uart0_urfs_grp0", audio_uart0_urfs_pins0),
925 GROUP("c0_can_grp0", c0_can_pins0), 1027 GROUP("audio_uart0_urfs_grp1", audio_uart0_urfs_pins1),
926 GROUP("c0_can_grp1", c0_can_pins1), 1028 GROUP("audio_uart0_urfs_grp2", audio_uart0_urfs_pins2),
927 GROUP("c1_can_grp0", c1_can_pins0), 1029 GROUP("audio_uart0_urfs_grp3", audio_uart0_urfs_pins3),
928 GROUP("c1_can_grp1", c1_can_pins1), 1030 GROUP("audio_uart1_basic_grp", audio_uart1_basic_pins),
929 GROUP("c1_can_grp2", c1_can_pins2), 1031 GROUP("audio_uart1_urfs_grp0", audio_uart1_urfs_pins0),
1032 GROUP("audio_uart1_urfs_grp1", audio_uart1_urfs_pins1),
1033 GROUP("audio_uart1_urfs_grp2", audio_uart1_urfs_pins2),
1034 GROUP("audio_uart2_urfs_grp0", audio_uart2_urfs_pins0),
1035 GROUP("audio_uart2_urfs_grp1", audio_uart2_urfs_pins1),
1036 GROUP("audio_uart2_urfs_grp2", audio_uart2_urfs_pins2),
1037 GROUP("audio_uart2_urxd_grp0", audio_uart2_urxd_pins0),
1038 GROUP("audio_uart2_urxd_grp1", audio_uart2_urxd_pins1),
1039 GROUP("audio_uart2_urxd_grp2", audio_uart2_urxd_pins2),
1040 GROUP("audio_uart2_usclk_grp0", audio_uart2_usclk_pins0),
1041 GROUP("audio_uart2_usclk_grp1", audio_uart2_usclk_pins1),
1042 GROUP("audio_uart2_usclk_grp2", audio_uart2_usclk_pins2),
1043 GROUP("audio_uart2_utfs_grp0", audio_uart2_utfs_pins0),
1044 GROUP("audio_uart2_utfs_grp1", audio_uart2_utfs_pins1),
1045 GROUP("audio_uart2_utfs_grp2", audio_uart2_utfs_pins2),
1046 GROUP("audio_uart2_utxd_grp0", audio_uart2_utxd_pins0),
1047 GROUP("audio_uart2_utxd_grp1", audio_uart2_utxd_pins1),
1048 GROUP("audio_uart2_utxd_grp2", audio_uart2_utxd_pins2),
1049 GROUP("c_can_trnsvr_en_grp0", c_can_trnsvr_en_pins0),
1050 GROUP("c_can_trnsvr_en_grp1", c_can_trnsvr_en_pins1),
1051 GROUP("c_can_trnsvr_intr_grp", c_can_trnsvr_intr_pins),
1052 GROUP("c_can_trnsvr_stb_n_grp", c_can_trnsvr_stb_n_pins),
1053 GROUP("c0_can_rxd_trnsv0_grp", c0_can_rxd_trnsv0_pins),
1054 GROUP("c0_can_rxd_trnsv1_grp", c0_can_rxd_trnsv1_pins),
1055 GROUP("c0_can_txd_trnsv0_grp", c0_can_txd_trnsv0_pins),
1056 GROUP("c0_can_txd_trnsv1_grp", c0_can_txd_trnsv1_pins),
1057 GROUP("c1_can_rxd_grp0", c1_can_rxd_pins0),
1058 GROUP("c1_can_rxd_grp1", c1_can_rxd_pins1),
1059 GROUP("c1_can_rxd_grp2", c1_can_rxd_pins2),
1060 GROUP("c1_can_rxd_grp3", c1_can_rxd_pins3),
1061 GROUP("c1_can_txd_grp0", c1_can_txd_pins0),
1062 GROUP("c1_can_txd_grp1", c1_can_txd_pins1),
1063 GROUP("c1_can_txd_grp2", c1_can_txd_pins2),
1064 GROUP("c1_can_txd_grp3", c1_can_txd_pins3),
930 GROUP("ca_audio_lpc_grp", ca_audio_lpc_pins), 1065 GROUP("ca_audio_lpc_grp", ca_audio_lpc_pins),
931 GROUP("ca_bt_lpc_grp", ca_bt_lpc_pins), 1066 GROUP("ca_bt_lpc_grp", ca_bt_lpc_pins),
932 GROUP("ca_coex_grp", ca_coex_pins), 1067 GROUP("ca_coex_grp", ca_coex_pins),
@@ -977,7 +1112,29 @@ struct atlas7_pin_group altas7_pin_groups[] = {
977 GROUP("gn_trg_shutdown_grp3", gn_trg_shutdown_pins3), 1112 GROUP("gn_trg_shutdown_grp3", gn_trg_shutdown_pins3),
978 GROUP("i2c0_grp", i2c0_pins), 1113 GROUP("i2c0_grp", i2c0_pins),
979 GROUP("i2c1_grp", i2c1_pins), 1114 GROUP("i2c1_grp", i2c1_pins),
980 GROUP("jtag_grp0", jtag_pins0), 1115 GROUP("i2s0_grp", i2s0_pins),
1116 GROUP("i2s1_basic_grp", i2s1_basic_pins),
1117 GROUP("i2s1_rxd0_grp0", i2s1_rxd0_pins0),
1118 GROUP("i2s1_rxd0_grp1", i2s1_rxd0_pins1),
1119 GROUP("i2s1_rxd0_grp2", i2s1_rxd0_pins2),
1120 GROUP("i2s1_rxd0_grp3", i2s1_rxd0_pins3),
1121 GROUP("i2s1_rxd0_grp4", i2s1_rxd0_pins4),
1122 GROUP("i2s1_rxd1_grp0", i2s1_rxd1_pins0),
1123 GROUP("i2s1_rxd1_grp1", i2s1_rxd1_pins1),
1124 GROUP("i2s1_rxd1_grp2", i2s1_rxd1_pins2),
1125 GROUP("i2s1_rxd1_grp3", i2s1_rxd1_pins3),
1126 GROUP("i2s1_rxd1_grp4", i2s1_rxd1_pins4),
1127 GROUP("jtag_jt_dbg_nsrst_grp", jtag_jt_dbg_nsrst_pins),
1128 GROUP("jtag_ntrst_grp0", jtag_ntrst_pins0),
1129 GROUP("jtag_ntrst_grp1", jtag_ntrst_pins1),
1130 GROUP("jtag_swdiotms_grp0", jtag_swdiotms_pins0),
1131 GROUP("jtag_swdiotms_grp1", jtag_swdiotms_pins1),
1132 GROUP("jtag_tck_grp0", jtag_tck_pins0),
1133 GROUP("jtag_tck_grp1", jtag_tck_pins1),
1134 GROUP("jtag_tdi_grp0", jtag_tdi_pins0),
1135 GROUP("jtag_tdi_grp1", jtag_tdi_pins1),
1136 GROUP("jtag_tdo_grp0", jtag_tdo_pins0),
1137 GROUP("jtag_tdo_grp1", jtag_tdo_pins1),
981 GROUP("ks_kas_spi_grp0", ks_kas_spi_pins0), 1138 GROUP("ks_kas_spi_grp0", ks_kas_spi_pins0),
982 GROUP("ld_ldd_grp", ld_ldd_pins), 1139 GROUP("ld_ldd_grp", ld_ldd_pins),
983 GROUP("ld_ldd_16bit_grp", ld_ldd_16bit_pins), 1140 GROUP("ld_ldd_16bit_grp", ld_ldd_16bit_pins),
@@ -1002,18 +1159,26 @@ struct atlas7_pin_group altas7_pin_groups[] = {
1002 GROUP("pw_cko0_grp0", pw_cko0_pins0), 1159 GROUP("pw_cko0_grp0", pw_cko0_pins0),
1003 GROUP("pw_cko0_grp1", pw_cko0_pins1), 1160 GROUP("pw_cko0_grp1", pw_cko0_pins1),
1004 GROUP("pw_cko0_grp2", pw_cko0_pins2), 1161 GROUP("pw_cko0_grp2", pw_cko0_pins2),
1162 GROUP("pw_cko0_grp3", pw_cko0_pins3),
1005 GROUP("pw_cko1_grp0", pw_cko1_pins0), 1163 GROUP("pw_cko1_grp0", pw_cko1_pins0),
1006 GROUP("pw_cko1_grp1", pw_cko1_pins1), 1164 GROUP("pw_cko1_grp1", pw_cko1_pins1),
1165 GROUP("pw_cko1_grp2", pw_cko1_pins2),
1007 GROUP("pw_i2s01_clk_grp0", pw_i2s01_clk_pins0), 1166 GROUP("pw_i2s01_clk_grp0", pw_i2s01_clk_pins0),
1008 GROUP("pw_i2s01_clk_grp1", pw_i2s01_clk_pins1), 1167 GROUP("pw_i2s01_clk_grp1", pw_i2s01_clk_pins1),
1009 GROUP("pw_pwm0_grp", pw_pwm0_pins), 1168 GROUP("pw_i2s01_clk_grp2", pw_i2s01_clk_pins2),
1010 GROUP("pw_pwm1_grp", pw_pwm1_pins), 1169 GROUP("pw_pwm0_grp0", pw_pwm0_pins0),
1170 GROUP("pw_pwm0_grp1", pw_pwm0_pins1),
1171 GROUP("pw_pwm1_grp0", pw_pwm1_pins0),
1172 GROUP("pw_pwm1_grp1", pw_pwm1_pins1),
1173 GROUP("pw_pwm1_grp2", pw_pwm1_pins2),
1011 GROUP("pw_pwm2_grp0", pw_pwm2_pins0), 1174 GROUP("pw_pwm2_grp0", pw_pwm2_pins0),
1012 GROUP("pw_pwm2_grp1", pw_pwm2_pins1), 1175 GROUP("pw_pwm2_grp1", pw_pwm2_pins1),
1176 GROUP("pw_pwm2_grp2", pw_pwm2_pins2),
1013 GROUP("pw_pwm3_grp0", pw_pwm3_pins0), 1177 GROUP("pw_pwm3_grp0", pw_pwm3_pins0),
1014 GROUP("pw_pwm3_grp1", pw_pwm3_pins1), 1178 GROUP("pw_pwm3_grp1", pw_pwm3_pins1),
1015 GROUP("pw_pwm_cpu_vol_grp0", pw_pwm_cpu_vol_pins0), 1179 GROUP("pw_pwm_cpu_vol_grp0", pw_pwm_cpu_vol_pins0),
1016 GROUP("pw_pwm_cpu_vol_grp1", pw_pwm_cpu_vol_pins1), 1180 GROUP("pw_pwm_cpu_vol_grp1", pw_pwm_cpu_vol_pins1),
1181 GROUP("pw_pwm_cpu_vol_grp2", pw_pwm_cpu_vol_pins2),
1017 GROUP("pw_backlight_grp0", pw_backlight_pins0), 1182 GROUP("pw_backlight_grp0", pw_backlight_pins0),
1018 GROUP("pw_backlight_grp1", pw_backlight_pins1), 1183 GROUP("pw_backlight_grp1", pw_backlight_pins1),
1019 GROUP("rg_eth_mac_grp", rg_eth_mac_pins), 1184 GROUP("rg_eth_mac_grp", rg_eth_mac_pins),
@@ -1026,8 +1191,11 @@ struct atlas7_pin_group altas7_pin_groups[] = {
1026 GROUP("sd1_grp", sd1_pins), 1191 GROUP("sd1_grp", sd1_pins),
1027 GROUP("sd1_4bit_grp0", sd1_4bit_pins0), 1192 GROUP("sd1_4bit_grp0", sd1_4bit_pins0),
1028 GROUP("sd1_4bit_grp1", sd1_4bit_pins1), 1193 GROUP("sd1_4bit_grp1", sd1_4bit_pins1),
1029 GROUP("sd2_grp0", sd2_pins0), 1194 GROUP("sd2_basic_grp", sd2_basic_pins),
1030 GROUP("sd2_no_cdb_grp0", sd2_no_cdb_pins0), 1195 GROUP("sd2_cdb_grp0", sd2_cdb_pins0),
1196 GROUP("sd2_cdb_grp1", sd2_cdb_pins1),
1197 GROUP("sd2_wpb_grp0", sd2_wpb_pins0),
1198 GROUP("sd2_wpb_grp1", sd2_wpb_pins1),
1031 GROUP("sd3_grp", sd3_pins), 1199 GROUP("sd3_grp", sd3_pins),
1032 GROUP("sd5_grp", sd5_pins), 1200 GROUP("sd5_grp", sd5_pins),
1033 GROUP("sd6_grp0", sd6_pins0), 1201 GROUP("sd6_grp0", sd6_pins0),
@@ -1039,19 +1207,39 @@ struct atlas7_pin_group altas7_pin_groups[] = {
1039 GROUP("uart0_grp", uart0_pins), 1207 GROUP("uart0_grp", uart0_pins),
1040 GROUP("uart0_nopause_grp", uart0_nopause_pins), 1208 GROUP("uart0_nopause_grp", uart0_nopause_pins),
1041 GROUP("uart1_grp", uart1_pins), 1209 GROUP("uart1_grp", uart1_pins),
1042 GROUP("uart2_grp", uart2_pins), 1210 GROUP("uart2_cts_grp0", uart2_cts_pins0),
1043 GROUP("uart3_grp0", uart3_pins0), 1211 GROUP("uart2_cts_grp1", uart2_cts_pins1),
1044 GROUP("uart3_grp1", uart3_pins1), 1212 GROUP("uart2_rts_grp0", uart2_rts_pins0),
1045 GROUP("uart3_grp2", uart3_pins2), 1213 GROUP("uart2_rts_grp1", uart2_rts_pins1),
1046 GROUP("uart3_grp3", uart3_pins3), 1214 GROUP("uart2_rxd_grp0", uart2_rxd_pins0),
1047 GROUP("uart3_nopause_grp0", uart3_nopause_pins0), 1215 GROUP("uart2_rxd_grp1", uart2_rxd_pins1),
1048 GROUP("uart3_nopause_grp1", uart3_nopause_pins1), 1216 GROUP("uart2_rxd_grp2", uart2_rxd_pins2),
1049 GROUP("uart4_grp0", uart4_pins0), 1217 GROUP("uart2_txd_grp0", uart2_txd_pins0),
1050 GROUP("uart4_grp1", uart4_pins1), 1218 GROUP("uart2_txd_grp1", uart2_txd_pins1),
1051 GROUP("uart4_grp2", uart4_pins2), 1219 GROUP("uart2_txd_grp2", uart2_txd_pins2),
1052 GROUP("uart4_nopause_grp", uart4_nopause_pins), 1220 GROUP("uart3_cts_grp0", uart3_cts_pins0),
1053 GROUP("usb0_drvvbus_grp", usb0_drvvbus_pins), 1221 GROUP("uart3_cts_grp1", uart3_cts_pins1),
1054 GROUP("usb1_drvvbus_grp", usb1_drvvbus_pins), 1222 GROUP("uart3_cts_grp2", uart3_cts_pins2),
1223 GROUP("uart3_rts_grp0", uart3_rts_pins0),
1224 GROUP("uart3_rts_grp1", uart3_rts_pins1),
1225 GROUP("uart3_rts_grp2", uart3_rts_pins2),
1226 GROUP("uart3_rxd_grp0", uart3_rxd_pins0),
1227 GROUP("uart3_rxd_grp1", uart3_rxd_pins1),
1228 GROUP("uart3_rxd_grp2", uart3_rxd_pins2),
1229 GROUP("uart3_txd_grp0", uart3_txd_pins0),
1230 GROUP("uart3_txd_grp1", uart3_txd_pins1),
1231 GROUP("uart3_txd_grp2", uart3_txd_pins2),
1232 GROUP("uart4_basic_grp", uart4_basic_pins),
1233 GROUP("uart4_cts_grp0", uart4_cts_pins0),
1234 GROUP("uart4_cts_grp1", uart4_cts_pins1),
1235 GROUP("uart4_cts_grp2", uart4_cts_pins2),
1236 GROUP("uart4_rts_grp0", uart4_rts_pins0),
1237 GROUP("uart4_rts_grp1", uart4_rts_pins1),
1238 GROUP("uart4_rts_grp2", uart4_rts_pins2),
1239 GROUP("usb0_drvvbus_grp0", usb0_drvvbus_pins0),
1240 GROUP("usb0_drvvbus_grp1", usb0_drvvbus_pins1),
1241 GROUP("usb1_drvvbus_grp0", usb1_drvvbus_pins0),
1242 GROUP("usb1_drvvbus_grp1", usb1_drvvbus_pins1),
1055 GROUP("visbus_dout_grp", visbus_dout_pins), 1243 GROUP("visbus_dout_grp", visbus_dout_pins),
1056 GROUP("vi_vip1_grp", vi_vip1_pins), 1244 GROUP("vi_vip1_grp", vi_vip1_pins),
1057 GROUP("vi_vip1_ext_grp", vi_vip1_ext_pins), 1245 GROUP("vi_vip1_ext_grp", vi_vip1_ext_pins),
@@ -1065,23 +1253,90 @@ static const char * const lcd_vip_gpio_grp[] = { "lcd_vip_gpio_grp", };
1065static const char * const sdio_i2s_gpio_grp[] = { "sdio_i2s_gpio_grp", }; 1253static const char * const sdio_i2s_gpio_grp[] = { "sdio_i2s_gpio_grp", };
1066static const char * const sp_rgmii_gpio_grp[] = { "sp_rgmii_gpio_grp", }; 1254static const char * const sp_rgmii_gpio_grp[] = { "sp_rgmii_gpio_grp", };
1067static const char * const lvds_gpio_grp[] = { "lvds_gpio_grp", }; 1255static const char * const lvds_gpio_grp[] = { "lvds_gpio_grp", };
1068static const char * const uart_nand_gpio_grp[] = { "uart_nand_gpio_grp", }; 1256static const char * const jtag_uart_nand_gpio_grp[] = {
1257 "jtag_uart_nand_gpio_grp", };
1069static const char * const rtc_gpio_grp[] = { "rtc_gpio_grp", }; 1258static const char * const rtc_gpio_grp[] = { "rtc_gpio_grp", };
1070static const char * const audio_ac97_grp[] = { "audio_ac97_grp", }; 1259static const char * const audio_ac97_grp[] = { "audio_ac97_grp", };
1260static const char * const audio_digmic_grp0[] = { "audio_digmic_grp0", };
1261static const char * const audio_digmic_grp1[] = { "audio_digmic_grp1", };
1262static const char * const audio_digmic_grp2[] = { "audio_digmic_grp2", };
1071static const char * const audio_func_dbg_grp[] = { "audio_func_dbg_grp", }; 1263static const char * const audio_func_dbg_grp[] = { "audio_func_dbg_grp", };
1072static const char * const audio_i2s_grp[] = { "audio_i2s_grp", }; 1264static const char * const audio_i2s_grp[] = { "audio_i2s_grp", };
1073static const char * const audio_i2s_2ch_grp[] = { "audio_i2s_2ch_grp", }; 1265static const char * const audio_i2s_2ch_grp[] = { "audio_i2s_2ch_grp", };
1074static const char * const audio_i2s_extclk_grp[] = { "audio_i2s_extclk_grp", }; 1266static const char * const audio_i2s_extclk_grp[] = { "audio_i2s_extclk_grp", };
1075static const char * const audio_uart0_grp[] = { "audio_uart0_grp", }; 1267static const char * const audio_spdif_out_grp0[] = { "audio_spdif_out_grp0", };
1076static const char * const audio_uart1_grp[] = { "audio_uart1_grp", }; 1268static const char * const audio_spdif_out_grp1[] = { "audio_spdif_out_grp1", };
1077static const char * const audio_uart2_grp0[] = { "audio_uart2_grp0", }; 1269static const char * const audio_spdif_out_grp2[] = { "audio_spdif_out_grp2", };
1078static const char * const audio_uart2_grp1[] = { "audio_uart2_grp1", }; 1270static const char * const audio_uart0_basic_grp[] = {
1079static const char * const c_can_trnsvr_grp[] = { "c_can_trnsvr_grp", }; 1271 "audio_uart0_basic_grp", };
1080static const char * const c0_can_grp0[] = { "c0_can_grp0", }; 1272static const char * const audio_uart0_urfs_grp0[] = {
1081static const char * const c0_can_grp1[] = { "c0_can_grp1", }; 1273 "audio_uart0_urfs_grp0", };
1082static const char * const c1_can_grp0[] = { "c1_can_grp0", }; 1274static const char * const audio_uart0_urfs_grp1[] = {
1083static const char * const c1_can_grp1[] = { "c1_can_grp1", }; 1275 "audio_uart0_urfs_grp1", };
1084static const char * const c1_can_grp2[] = { "c1_can_grp2", }; 1276static const char * const audio_uart0_urfs_grp2[] = {
1277 "audio_uart0_urfs_grp2", };
1278static const char * const audio_uart0_urfs_grp3[] = {
1279 "audio_uart0_urfs_grp3", };
1280static const char * const audio_uart1_basic_grp[] = {
1281 "audio_uart1_basic_grp", };
1282static const char * const audio_uart1_urfs_grp0[] = {
1283 "audio_uart1_urfs_grp0", };
1284static const char * const audio_uart1_urfs_grp1[] = {
1285 "audio_uart1_urfs_grp1", };
1286static const char * const audio_uart1_urfs_grp2[] = {
1287 "audio_uart1_urfs_grp2", };
1288static const char * const audio_uart2_urfs_grp0[] = {
1289 "audio_uart2_urfs_grp0", };
1290static const char * const audio_uart2_urfs_grp1[] = {
1291 "audio_uart2_urfs_grp1", };
1292static const char * const audio_uart2_urfs_grp2[] = {
1293 "audio_uart2_urfs_grp2", };
1294static const char * const audio_uart2_urxd_grp0[] = {
1295 "audio_uart2_urxd_grp0", };
1296static const char * const audio_uart2_urxd_grp1[] = {
1297 "audio_uart2_urxd_grp1", };
1298static const char * const audio_uart2_urxd_grp2[] = {
1299 "audio_uart2_urxd_grp2", };
1300static const char * const audio_uart2_usclk_grp0[] = {
1301 "audio_uart2_usclk_grp0", };
1302static const char * const audio_uart2_usclk_grp1[] = {
1303 "audio_uart2_usclk_grp1", };
1304static const char * const audio_uart2_usclk_grp2[] = {
1305 "audio_uart2_usclk_grp2", };
1306static const char * const audio_uart2_utfs_grp0[] = {
1307 "audio_uart2_utfs_grp0", };
1308static const char * const audio_uart2_utfs_grp1[] = {
1309 "audio_uart2_utfs_grp1", };
1310static const char * const audio_uart2_utfs_grp2[] = {
1311 "audio_uart2_utfs_grp2", };
1312static const char * const audio_uart2_utxd_grp0[] = {
1313 "audio_uart2_utxd_grp0", };
1314static const char * const audio_uart2_utxd_grp1[] = {
1315 "audio_uart2_utxd_grp1", };
1316static const char * const audio_uart2_utxd_grp2[] = {
1317 "audio_uart2_utxd_grp2", };
1318static const char * const c_can_trnsvr_en_grp0[] = { "c_can_trnsvr_en_grp0", };
1319static const char * const c_can_trnsvr_en_grp1[] = { "c_can_trnsvr_en_grp1", };
1320static const char * const c_can_trnsvr_intr_grp[] = {
1321 "c_can_trnsvr_intr_grp", };
1322static const char * const c_can_trnsvr_stb_n_grp[] = {
1323 "c_can_trnsvr_stb_n_grp", };
1324static const char * const c0_can_rxd_trnsv0_grp[] = {
1325 "c0_can_rxd_trnsv0_grp", };
1326static const char * const c0_can_rxd_trnsv1_grp[] = {
1327 "c0_can_rxd_trnsv1_grp", };
1328static const char * const c0_can_txd_trnsv0_grp[] = {
1329 "c0_can_txd_trnsv0_grp", };
1330static const char * const c0_can_txd_trnsv1_grp[] = {
1331 "c0_can_txd_trnsv1_grp", };
1332static const char * const c1_can_rxd_grp0[] = { "c1_can_rxd_grp0", };
1333static const char * const c1_can_rxd_grp1[] = { "c1_can_rxd_grp1", };
1334static const char * const c1_can_rxd_grp2[] = { "c1_can_rxd_grp2", };
1335static const char * const c1_can_rxd_grp3[] = { "c1_can_rxd_grp3", };
1336static const char * const c1_can_txd_grp0[] = { "c1_can_txd_grp0", };
1337static const char * const c1_can_txd_grp1[] = { "c1_can_txd_grp1", };
1338static const char * const c1_can_txd_grp2[] = { "c1_can_txd_grp2", };
1339static const char * const c1_can_txd_grp3[] = { "c1_can_txd_grp3", };
1085static const char * const ca_audio_lpc_grp[] = { "ca_audio_lpc_grp", }; 1340static const char * const ca_audio_lpc_grp[] = { "ca_audio_lpc_grp", };
1086static const char * const ca_bt_lpc_grp[] = { "ca_bt_lpc_grp", }; 1341static const char * const ca_bt_lpc_grp[] = { "ca_bt_lpc_grp", };
1087static const char * const ca_coex_grp[] = { "ca_coex_grp", }; 1342static const char * const ca_coex_grp[] = { "ca_coex_grp", };
@@ -1135,7 +1390,30 @@ static const char * const gn_trg_shutdown_grp2[] = { "gn_trg_shutdown_grp2", };
1135static const char * const gn_trg_shutdown_grp3[] = { "gn_trg_shutdown_grp3", }; 1390static const char * const gn_trg_shutdown_grp3[] = { "gn_trg_shutdown_grp3", };
1136static const char * const i2c0_grp[] = { "i2c0_grp", }; 1391static const char * const i2c0_grp[] = { "i2c0_grp", };
1137static const char * const i2c1_grp[] = { "i2c1_grp", }; 1392static const char * const i2c1_grp[] = { "i2c1_grp", };
1138static const char * const jtag_grp0[] = { "jtag_grp0", }; 1393static const char * const i2s0_grp[] = { "i2s0_grp", };
1394static const char * const i2s1_basic_grp[] = { "i2s1_basic_grp", };
1395static const char * const i2s1_rxd0_grp0[] = { "i2s1_rxd0_grp0", };
1396static const char * const i2s1_rxd0_grp1[] = { "i2s1_rxd0_grp1", };
1397static const char * const i2s1_rxd0_grp2[] = { "i2s1_rxd0_grp2", };
1398static const char * const i2s1_rxd0_grp3[] = { "i2s1_rxd0_grp3", };
1399static const char * const i2s1_rxd0_grp4[] = { "i2s1_rxd0_grp4", };
1400static const char * const i2s1_rxd1_grp0[] = { "i2s1_rxd1_grp0", };
1401static const char * const i2s1_rxd1_grp1[] = { "i2s1_rxd1_grp1", };
1402static const char * const i2s1_rxd1_grp2[] = { "i2s1_rxd1_grp2", };
1403static const char * const i2s1_rxd1_grp3[] = { "i2s1_rxd1_grp3", };
1404static const char * const i2s1_rxd1_grp4[] = { "i2s1_rxd1_grp4", };
1405static const char * const jtag_jt_dbg_nsrst_grp[] = {
1406 "jtag_jt_dbg_nsrst_grp", };
1407static const char * const jtag_ntrst_grp0[] = { "jtag_ntrst_grp0", };
1408static const char * const jtag_ntrst_grp1[] = { "jtag_ntrst_grp1", };
1409static const char * const jtag_swdiotms_grp0[] = { "jtag_swdiotms_grp0", };
1410static const char * const jtag_swdiotms_grp1[] = { "jtag_swdiotms_grp1", };
1411static const char * const jtag_tck_grp0[] = { "jtag_tck_grp0", };
1412static const char * const jtag_tck_grp1[] = { "jtag_tck_grp1", };
1413static const char * const jtag_tdi_grp0[] = { "jtag_tdi_grp0", };
1414static const char * const jtag_tdi_grp1[] = { "jtag_tdi_grp1", };
1415static const char * const jtag_tdo_grp0[] = { "jtag_tdo_grp0", };
1416static const char * const jtag_tdo_grp1[] = { "jtag_tdo_grp1", };
1139static const char * const ks_kas_spi_grp0[] = { "ks_kas_spi_grp0", }; 1417static const char * const ks_kas_spi_grp0[] = { "ks_kas_spi_grp0", };
1140static const char * const ld_ldd_grp[] = { "ld_ldd_grp", }; 1418static const char * const ld_ldd_grp[] = { "ld_ldd_grp", };
1141static const char * const ld_ldd_16bit_grp[] = { "ld_ldd_16bit_grp", }; 1419static const char * const ld_ldd_16bit_grp[] = { "ld_ldd_16bit_grp", };
@@ -1160,18 +1438,26 @@ static const char * const pwc_wakeup_src3_grp[] = { "pwc_wakeup_src3_grp", };
1160static const char * const pw_cko0_grp0[] = { "pw_cko0_grp0", }; 1438static const char * const pw_cko0_grp0[] = { "pw_cko0_grp0", };
1161static const char * const pw_cko0_grp1[] = { "pw_cko0_grp1", }; 1439static const char * const pw_cko0_grp1[] = { "pw_cko0_grp1", };
1162static const char * const pw_cko0_grp2[] = { "pw_cko0_grp2", }; 1440static const char * const pw_cko0_grp2[] = { "pw_cko0_grp2", };
1441static const char * const pw_cko0_grp3[] = { "pw_cko0_grp3", };
1163static const char * const pw_cko1_grp0[] = { "pw_cko1_grp0", }; 1442static const char * const pw_cko1_grp0[] = { "pw_cko1_grp0", };
1164static const char * const pw_cko1_grp1[] = { "pw_cko1_grp1", }; 1443static const char * const pw_cko1_grp1[] = { "pw_cko1_grp1", };
1444static const char * const pw_cko1_grp2[] = { "pw_cko1_grp2", };
1165static const char * const pw_i2s01_clk_grp0[] = { "pw_i2s01_clk_grp0", }; 1445static const char * const pw_i2s01_clk_grp0[] = { "pw_i2s01_clk_grp0", };
1166static const char * const pw_i2s01_clk_grp1[] = { "pw_i2s01_clk_grp1", }; 1446static const char * const pw_i2s01_clk_grp1[] = { "pw_i2s01_clk_grp1", };
1167static const char * const pw_pwm0_grp[] = { "pw_pwm0_grp", }; 1447static const char * const pw_i2s01_clk_grp2[] = { "pw_i2s01_clk_grp2", };
1168static const char * const pw_pwm1_grp[] = { "pw_pwm1_grp", }; 1448static const char * const pw_pwm0_grp0[] = { "pw_pwm0_grp0", };
1449static const char * const pw_pwm0_grp1[] = { "pw_pwm0_grp1", };
1450static const char * const pw_pwm1_grp0[] = { "pw_pwm1_grp0", };
1451static const char * const pw_pwm1_grp1[] = { "pw_pwm1_grp1", };
1452static const char * const pw_pwm1_grp2[] = { "pw_pwm1_grp2", };
1169static const char * const pw_pwm2_grp0[] = { "pw_pwm2_grp0", }; 1453static const char * const pw_pwm2_grp0[] = { "pw_pwm2_grp0", };
1170static const char * const pw_pwm2_grp1[] = { "pw_pwm2_grp1", }; 1454static const char * const pw_pwm2_grp1[] = { "pw_pwm2_grp1", };
1455static const char * const pw_pwm2_grp2[] = { "pw_pwm2_grp2", };
1171static const char * const pw_pwm3_grp0[] = { "pw_pwm3_grp0", }; 1456static const char * const pw_pwm3_grp0[] = { "pw_pwm3_grp0", };
1172static const char * const pw_pwm3_grp1[] = { "pw_pwm3_grp1", }; 1457static const char * const pw_pwm3_grp1[] = { "pw_pwm3_grp1", };
1173static const char * const pw_pwm_cpu_vol_grp0[] = { "pw_pwm_cpu_vol_grp0", }; 1458static const char * const pw_pwm_cpu_vol_grp0[] = { "pw_pwm_cpu_vol_grp0", };
1174static const char * const pw_pwm_cpu_vol_grp1[] = { "pw_pwm_cpu_vol_grp1", }; 1459static const char * const pw_pwm_cpu_vol_grp1[] = { "pw_pwm_cpu_vol_grp1", };
1460static const char * const pw_pwm_cpu_vol_grp2[] = { "pw_pwm_cpu_vol_grp2", };
1175static const char * const pw_backlight_grp0[] = { "pw_backlight_grp0", }; 1461static const char * const pw_backlight_grp0[] = { "pw_backlight_grp0", };
1176static const char * const pw_backlight_grp1[] = { "pw_backlight_grp1", }; 1462static const char * const pw_backlight_grp1[] = { "pw_backlight_grp1", };
1177static const char * const rg_eth_mac_grp[] = { "rg_eth_mac_grp", }; 1463static const char * const rg_eth_mac_grp[] = { "rg_eth_mac_grp", };
@@ -1187,8 +1473,11 @@ static const char * const sd0_4bit_grp[] = { "sd0_4bit_grp", };
1187static const char * const sd1_grp[] = { "sd1_grp", }; 1473static const char * const sd1_grp[] = { "sd1_grp", };
1188static const char * const sd1_4bit_grp0[] = { "sd1_4bit_grp0", }; 1474static const char * const sd1_4bit_grp0[] = { "sd1_4bit_grp0", };
1189static const char * const sd1_4bit_grp1[] = { "sd1_4bit_grp1", }; 1475static const char * const sd1_4bit_grp1[] = { "sd1_4bit_grp1", };
1190static const char * const sd2_grp0[] = { "sd2_grp0", }; 1476static const char * const sd2_basic_grp[] = { "sd2_basic_grp", };
1191static const char * const sd2_no_cdb_grp0[] = { "sd2_no_cdb_grp0", }; 1477static const char * const sd2_cdb_grp0[] = { "sd2_cdb_grp0", };
1478static const char * const sd2_cdb_grp1[] = { "sd2_cdb_grp1", };
1479static const char * const sd2_wpb_grp0[] = { "sd2_wpb_grp0", };
1480static const char * const sd2_wpb_grp1[] = { "sd2_wpb_grp1", };
1192static const char * const sd3_grp[] = { "sd3_grp", }; 1481static const char * const sd3_grp[] = { "sd3_grp", };
1193static const char * const sd5_grp[] = { "sd5_grp", }; 1482static const char * const sd5_grp[] = { "sd5_grp", };
1194static const char * const sd6_grp0[] = { "sd6_grp0", }; 1483static const char * const sd6_grp0[] = { "sd6_grp0", };
@@ -1200,19 +1489,39 @@ static const char * const tpiu_trace_grp[] = { "tpiu_trace_grp", };
1200static const char * const uart0_grp[] = { "uart0_grp", }; 1489static const char * const uart0_grp[] = { "uart0_grp", };
1201static const char * const uart0_nopause_grp[] = { "uart0_nopause_grp", }; 1490static const char * const uart0_nopause_grp[] = { "uart0_nopause_grp", };
1202static const char * const uart1_grp[] = { "uart1_grp", }; 1491static const char * const uart1_grp[] = { "uart1_grp", };
1203static const char * const uart2_grp[] = { "uart2_grp", }; 1492static const char * const uart2_cts_grp0[] = { "uart2_cts_grp0", };
1204static const char * const uart3_grp0[] = { "uart3_grp0", }; 1493static const char * const uart2_cts_grp1[] = { "uart2_cts_grp1", };
1205static const char * const uart3_grp1[] = { "uart3_grp1", }; 1494static const char * const uart2_rts_grp0[] = { "uart2_rts_grp0", };
1206static const char * const uart3_grp2[] = { "uart3_grp2", }; 1495static const char * const uart2_rts_grp1[] = { "uart2_rts_grp1", };
1207static const char * const uart3_grp3[] = { "uart3_grp3", }; 1496static const char * const uart2_rxd_grp0[] = { "uart2_rxd_grp0", };
1208static const char * const uart3_nopause_grp0[] = { "uart3_nopause_grp0", }; 1497static const char * const uart2_rxd_grp1[] = { "uart2_rxd_grp1", };
1209static const char * const uart3_nopause_grp1[] = { "uart3_nopause_grp1", }; 1498static const char * const uart2_rxd_grp2[] = { "uart2_rxd_grp2", };
1210static const char * const uart4_grp0[] = { "uart4_grp0", }; 1499static const char * const uart2_txd_grp0[] = { "uart2_txd_grp0", };
1211static const char * const uart4_grp1[] = { "uart4_grp1", }; 1500static const char * const uart2_txd_grp1[] = { "uart2_txd_grp1", };
1212static const char * const uart4_grp2[] = { "uart4_grp2", }; 1501static const char * const uart2_txd_grp2[] = { "uart2_txd_grp2", };
1213static const char * const uart4_nopause_grp[] = { "uart4_nopause_grp", }; 1502static const char * const uart3_cts_grp0[] = { "uart3_cts_grp0", };
1214static const char * const usb0_drvvbus_grp[] = { "usb0_drvvbus_grp", }; 1503static const char * const uart3_cts_grp1[] = { "uart3_cts_grp1", };
1215static const char * const usb1_drvvbus_grp[] = { "usb1_drvvbus_grp", }; 1504static const char * const uart3_cts_grp2[] = { "uart3_cts_grp2", };
1505static const char * const uart3_rts_grp0[] = { "uart3_rts_grp0", };
1506static const char * const uart3_rts_grp1[] = { "uart3_rts_grp1", };
1507static const char * const uart3_rts_grp2[] = { "uart3_rts_grp2", };
1508static const char * const uart3_rxd_grp0[] = { "uart3_rxd_grp0", };
1509static const char * const uart3_rxd_grp1[] = { "uart3_rxd_grp1", };
1510static const char * const uart3_rxd_grp2[] = { "uart3_rxd_grp2", };
1511static const char * const uart3_txd_grp0[] = { "uart3_txd_grp0", };
1512static const char * const uart3_txd_grp1[] = { "uart3_txd_grp1", };
1513static const char * const uart3_txd_grp2[] = { "uart3_txd_grp2", };
1514static const char * const uart4_basic_grp[] = { "uart4_basic_grp", };
1515static const char * const uart4_cts_grp0[] = { "uart4_cts_grp0", };
1516static const char * const uart4_cts_grp1[] = { "uart4_cts_grp1", };
1517static const char * const uart4_cts_grp2[] = { "uart4_cts_grp2", };
1518static const char * const uart4_rts_grp0[] = { "uart4_rts_grp0", };
1519static const char * const uart4_rts_grp1[] = { "uart4_rts_grp1", };
1520static const char * const uart4_rts_grp2[] = { "uart4_rts_grp2", };
1521static const char * const usb0_drvvbus_grp0[] = { "usb0_drvvbus_grp0", };
1522static const char * const usb0_drvvbus_grp1[] = { "usb0_drvvbus_grp1", };
1523static const char * const usb1_drvvbus_grp0[] = { "usb1_drvvbus_grp0", };
1524static const char * const usb1_drvvbus_grp1[] = { "usb1_drvvbus_grp1", };
1216static const char * const visbus_dout_grp[] = { "visbus_dout_grp", }; 1525static const char * const visbus_dout_grp[] = { "visbus_dout_grp", };
1217static const char * const vi_vip1_grp[] = { "vi_vip1_grp", }; 1526static const char * const vi_vip1_grp[] = { "vi_vip1_grp", };
1218static const char * const vi_vip1_ext_grp[] = { "vi_vip1_ext_grp", }; 1527static const char * const vi_vip1_ext_grp[] = { "vi_vip1_ext_grp", };
@@ -1376,7 +1685,7 @@ static struct atlas7_grp_mux lvds_gpio_grp_mux = {
1376 .pad_mux_list = lvds_gpio_grp_pad_mux, 1685 .pad_mux_list = lvds_gpio_grp_pad_mux,
1377}; 1686};
1378 1687
1379static struct atlas7_pad_mux uart_nand_gpio_grp_pad_mux[] = { 1688static struct atlas7_pad_mux jtag_uart_nand_gpio_grp_pad_mux[] = {
1380 MUX(1, 44, 0, N, N, N, N), 1689 MUX(1, 44, 0, N, N, N, N),
1381 MUX(1, 43, 0, N, N, N, N), 1690 MUX(1, 43, 0, N, N, N, N),
1382 MUX(1, 42, 0, N, N, N, N), 1691 MUX(1, 42, 0, N, N, N, N),
@@ -1401,11 +1710,16 @@ static struct atlas7_pad_mux uart_nand_gpio_grp_pad_mux[] = {
1401 MUX(1, 138, 0, N, N, N, N), 1710 MUX(1, 138, 0, N, N, N, N),
1402 MUX(1, 139, 0, N, N, N, N), 1711 MUX(1, 139, 0, N, N, N, N),
1403 MUX(1, 140, 0, N, N, N, N), 1712 MUX(1, 140, 0, N, N, N, N),
1713 MUX(1, 159, 0, N, N, N, N),
1714 MUX(1, 160, 0, N, N, N, N),
1715 MUX(1, 161, 0, N, N, N, N),
1716 MUX(1, 162, 0, N, N, N, N),
1717 MUX(1, 163, 0, N, N, N, N),
1404}; 1718};
1405 1719
1406static struct atlas7_grp_mux uart_nand_gpio_grp_mux = { 1720static struct atlas7_grp_mux jtag_uart_nand_gpio_grp_mux = {
1407 .pad_mux_count = ARRAY_SIZE(uart_nand_gpio_grp_pad_mux), 1721 .pad_mux_count = ARRAY_SIZE(jtag_uart_nand_gpio_grp_pad_mux),
1408 .pad_mux_list = uart_nand_gpio_grp_pad_mux, 1722 .pad_mux_list = jtag_uart_nand_gpio_grp_pad_mux,
1409}; 1723};
1410 1724
1411static struct atlas7_pad_mux rtc_gpio_grp_pad_mux[] = { 1725static struct atlas7_pad_mux rtc_gpio_grp_pad_mux[] = {
@@ -1422,6 +1736,7 @@ static struct atlas7_pad_mux rtc_gpio_grp_pad_mux[] = {
1422 MUX(0, 15, 0, N, N, N, N), 1736 MUX(0, 15, 0, N, N, N, N),
1423 MUX(0, 16, 0, N, N, N, N), 1737 MUX(0, 16, 0, N, N, N, N),
1424 MUX(0, 17, 0, N, N, N, N), 1738 MUX(0, 17, 0, N, N, N, N),
1739 MUX(0, 9, 0, N, N, N, N),
1425}; 1740};
1426 1741
1427static struct atlas7_grp_mux rtc_gpio_grp_mux = { 1742static struct atlas7_grp_mux rtc_gpio_grp_mux = {
@@ -1441,6 +1756,33 @@ static struct atlas7_grp_mux audio_ac97_grp_mux = {
1441 .pad_mux_list = audio_ac97_grp_pad_mux, 1756 .pad_mux_list = audio_ac97_grp_pad_mux,
1442}; 1757};
1443 1758
1759static struct atlas7_pad_mux audio_digmic_grp0_pad_mux[] = {
1760 MUX(1, 51, 3, 0xa10, 20, 0xa90, 20),
1761};
1762
1763static struct atlas7_grp_mux audio_digmic_grp0_mux = {
1764 .pad_mux_count = ARRAY_SIZE(audio_digmic_grp0_pad_mux),
1765 .pad_mux_list = audio_digmic_grp0_pad_mux,
1766};
1767
1768static struct atlas7_pad_mux audio_digmic_grp1_pad_mux[] = {
1769 MUX(1, 122, 5, 0xa10, 20, 0xa90, 20),
1770};
1771
1772static struct atlas7_grp_mux audio_digmic_grp1_mux = {
1773 .pad_mux_count = ARRAY_SIZE(audio_digmic_grp1_pad_mux),
1774 .pad_mux_list = audio_digmic_grp1_pad_mux,
1775};
1776
1777static struct atlas7_pad_mux audio_digmic_grp2_pad_mux[] = {
1778 MUX(1, 161, 7, 0xa10, 20, 0xa90, 20),
1779};
1780
1781static struct atlas7_grp_mux audio_digmic_grp2_mux = {
1782 .pad_mux_count = ARRAY_SIZE(audio_digmic_grp2_pad_mux),
1783 .pad_mux_list = audio_digmic_grp2_pad_mux,
1784};
1785
1444static struct atlas7_pad_mux audio_func_dbg_grp_pad_mux[] = { 1786static struct atlas7_pad_mux audio_func_dbg_grp_pad_mux[] = {
1445 MUX(1, 141, 4, N, N, N, N), 1787 MUX(1, 141, 4, N, N, N, N),
1446 MUX(1, 144, 4, N, N, N, N), 1788 MUX(1, 144, 4, N, N, N, N),
@@ -1512,111 +1854,397 @@ static struct atlas7_grp_mux audio_i2s_extclk_grp_mux = {
1512 .pad_mux_list = audio_i2s_extclk_grp_pad_mux, 1854 .pad_mux_list = audio_i2s_extclk_grp_pad_mux,
1513}; 1855};
1514 1856
1515static struct atlas7_pad_mux audio_uart0_grp_pad_mux[] = { 1857static struct atlas7_pad_mux audio_spdif_out_grp0_pad_mux[] = {
1858 MUX(1, 112, 3, N, N, N, N),
1859};
1860
1861static struct atlas7_grp_mux audio_spdif_out_grp0_mux = {
1862 .pad_mux_count = ARRAY_SIZE(audio_spdif_out_grp0_pad_mux),
1863 .pad_mux_list = audio_spdif_out_grp0_pad_mux,
1864};
1865
1866static struct atlas7_pad_mux audio_spdif_out_grp1_pad_mux[] = {
1867 MUX(1, 116, 3, N, N, N, N),
1868};
1869
1870static struct atlas7_grp_mux audio_spdif_out_grp1_mux = {
1871 .pad_mux_count = ARRAY_SIZE(audio_spdif_out_grp1_pad_mux),
1872 .pad_mux_list = audio_spdif_out_grp1_pad_mux,
1873};
1874
1875static struct atlas7_pad_mux audio_spdif_out_grp2_pad_mux[] = {
1876 MUX(1, 142, 3, N, N, N, N),
1877};
1878
1879static struct atlas7_grp_mux audio_spdif_out_grp2_mux = {
1880 .pad_mux_count = ARRAY_SIZE(audio_spdif_out_grp2_pad_mux),
1881 .pad_mux_list = audio_spdif_out_grp2_pad_mux,
1882};
1883
1884static struct atlas7_pad_mux audio_uart0_basic_grp_pad_mux[] = {
1516 MUX(1, 143, 1, N, N, N, N), 1885 MUX(1, 143, 1, N, N, N, N),
1517 MUX(1, 142, 1, N, N, N, N), 1886 MUX(1, 142, 1, N, N, N, N),
1518 MUX(1, 141, 1, N, N, N, N), 1887 MUX(1, 141, 1, N, N, N, N),
1519 MUX(1, 144, 1, N, N, N, N), 1888 MUX(1, 144, 1, N, N, N, N),
1520}; 1889};
1521 1890
1522static struct atlas7_grp_mux audio_uart0_grp_mux = { 1891static struct atlas7_grp_mux audio_uart0_basic_grp_mux = {
1523 .pad_mux_count = ARRAY_SIZE(audio_uart0_grp_pad_mux), 1892 .pad_mux_count = ARRAY_SIZE(audio_uart0_basic_grp_pad_mux),
1524 .pad_mux_list = audio_uart0_grp_pad_mux, 1893 .pad_mux_list = audio_uart0_basic_grp_pad_mux,
1894};
1895
1896static struct atlas7_pad_mux audio_uart0_urfs_grp0_pad_mux[] = {
1897 MUX(1, 117, 5, 0xa10, 28, 0xa90, 28),
1525}; 1898};
1526 1899
1527static struct atlas7_pad_mux audio_uart1_grp_pad_mux[] = { 1900static struct atlas7_grp_mux audio_uart0_urfs_grp0_mux = {
1528 MUX(1, 147, 1, N, N, N, N), 1901 .pad_mux_count = ARRAY_SIZE(audio_uart0_urfs_grp0_pad_mux),
1529 MUX(1, 146, 1, N, N, N, N), 1902 .pad_mux_list = audio_uart0_urfs_grp0_pad_mux,
1530 MUX(1, 145, 1, N, N, N, N),
1531 MUX(1, 148, 1, N, N, N, N),
1532}; 1903};
1533 1904
1534static struct atlas7_grp_mux audio_uart1_grp_mux = { 1905static struct atlas7_pad_mux audio_uart0_urfs_grp1_pad_mux[] = {
1535 .pad_mux_count = ARRAY_SIZE(audio_uart1_grp_pad_mux), 1906 MUX(1, 139, 3, 0xa10, 28, 0xa90, 28),
1536 .pad_mux_list = audio_uart1_grp_pad_mux,
1537}; 1907};
1538 1908
1539static struct atlas7_pad_mux audio_uart2_grp0_pad_mux[] = { 1909static struct atlas7_grp_mux audio_uart0_urfs_grp1_mux = {
1910 .pad_mux_count = ARRAY_SIZE(audio_uart0_urfs_grp1_pad_mux),
1911 .pad_mux_list = audio_uart0_urfs_grp1_pad_mux,
1912};
1913
1914static struct atlas7_pad_mux audio_uart0_urfs_grp2_pad_mux[] = {
1915 MUX(1, 163, 3, 0xa10, 28, 0xa90, 28),
1916};
1917
1918static struct atlas7_grp_mux audio_uart0_urfs_grp2_mux = {
1919 .pad_mux_count = ARRAY_SIZE(audio_uart0_urfs_grp2_pad_mux),
1920 .pad_mux_list = audio_uart0_urfs_grp2_pad_mux,
1921};
1922
1923static struct atlas7_pad_mux audio_uart0_urfs_grp3_pad_mux[] = {
1924 MUX(1, 162, 6, 0xa10, 28, 0xa90, 28),
1925};
1926
1927static struct atlas7_grp_mux audio_uart0_urfs_grp3_mux = {
1928 .pad_mux_count = ARRAY_SIZE(audio_uart0_urfs_grp3_pad_mux),
1929 .pad_mux_list = audio_uart0_urfs_grp3_pad_mux,
1930};
1931
1932static struct atlas7_pad_mux audio_uart1_basic_grp_pad_mux[] = {
1933 MUX(1, 147, 1, 0xa10, 24, 0xa90, 24),
1934 MUX(1, 146, 1, 0xa10, 25, 0xa90, 25),
1935 MUX(1, 145, 1, 0xa10, 23, 0xa90, 23),
1936 MUX(1, 148, 1, 0xa10, 22, 0xa90, 22),
1937};
1938
1939static struct atlas7_grp_mux audio_uart1_basic_grp_mux = {
1940 .pad_mux_count = ARRAY_SIZE(audio_uart1_basic_grp_pad_mux),
1941 .pad_mux_list = audio_uart1_basic_grp_pad_mux,
1942};
1943
1944static struct atlas7_pad_mux audio_uart1_urfs_grp0_pad_mux[] = {
1945 MUX(1, 117, 6, 0xa10, 29, 0xa90, 29),
1946};
1947
1948static struct atlas7_grp_mux audio_uart1_urfs_grp0_mux = {
1949 .pad_mux_count = ARRAY_SIZE(audio_uart1_urfs_grp0_pad_mux),
1950 .pad_mux_list = audio_uart1_urfs_grp0_pad_mux,
1951};
1952
1953static struct atlas7_pad_mux audio_uart1_urfs_grp1_pad_mux[] = {
1954 MUX(1, 140, 3, 0xa10, 29, 0xa90, 29),
1955};
1956
1957static struct atlas7_grp_mux audio_uart1_urfs_grp1_mux = {
1958 .pad_mux_count = ARRAY_SIZE(audio_uart1_urfs_grp1_pad_mux),
1959 .pad_mux_list = audio_uart1_urfs_grp1_pad_mux,
1960};
1961
1962static struct atlas7_pad_mux audio_uart1_urfs_grp2_pad_mux[] = {
1963 MUX(1, 163, 4, 0xa10, 29, 0xa90, 29),
1964};
1965
1966static struct atlas7_grp_mux audio_uart1_urfs_grp2_mux = {
1967 .pad_mux_count = ARRAY_SIZE(audio_uart1_urfs_grp2_pad_mux),
1968 .pad_mux_list = audio_uart1_urfs_grp2_pad_mux,
1969};
1970
1971static struct atlas7_pad_mux audio_uart2_urfs_grp0_pad_mux[] = {
1972 MUX(1, 139, 4, 0xa10, 30, 0xa90, 30),
1973};
1974
1975static struct atlas7_grp_mux audio_uart2_urfs_grp0_mux = {
1976 .pad_mux_count = ARRAY_SIZE(audio_uart2_urfs_grp0_pad_mux),
1977 .pad_mux_list = audio_uart2_urfs_grp0_pad_mux,
1978};
1979
1980static struct atlas7_pad_mux audio_uart2_urfs_grp1_pad_mux[] = {
1981 MUX(1, 163, 6, 0xa10, 30, 0xa90, 30),
1982};
1983
1984static struct atlas7_grp_mux audio_uart2_urfs_grp1_mux = {
1985 .pad_mux_count = ARRAY_SIZE(audio_uart2_urfs_grp1_pad_mux),
1986 .pad_mux_list = audio_uart2_urfs_grp1_pad_mux,
1987};
1988
1989static struct atlas7_pad_mux audio_uart2_urfs_grp2_pad_mux[] = {
1990 MUX(1, 96, 3, 0xa10, 30, 0xa90, 30),
1991};
1992
1993static struct atlas7_grp_mux audio_uart2_urfs_grp2_mux = {
1994 .pad_mux_count = ARRAY_SIZE(audio_uart2_urfs_grp2_pad_mux),
1995 .pad_mux_list = audio_uart2_urfs_grp2_pad_mux,
1996};
1997
1998static struct atlas7_pad_mux audio_uart2_urxd_grp0_pad_mux[] = {
1540 MUX(1, 20, 2, 0xa00, 24, 0xa80, 24), 1999 MUX(1, 20, 2, 0xa00, 24, 0xa80, 24),
1541 MUX(1, 21, 2, 0xa00, 25, 0xa80, 25),
1542 MUX(1, 19, 2, 0xa00, 23, 0xa80, 23),
1543 MUX(1, 18, 2, 0xa00, 22, 0xa80, 22),
1544}; 2000};
1545 2001
1546static struct atlas7_grp_mux audio_uart2_grp0_mux = { 2002static struct atlas7_grp_mux audio_uart2_urxd_grp0_mux = {
1547 .pad_mux_count = ARRAY_SIZE(audio_uart2_grp0_pad_mux), 2003 .pad_mux_count = ARRAY_SIZE(audio_uart2_urxd_grp0_pad_mux),
1548 .pad_mux_list = audio_uart2_grp0_pad_mux, 2004 .pad_mux_list = audio_uart2_urxd_grp0_pad_mux,
1549}; 2005};
1550 2006
1551static struct atlas7_pad_mux audio_uart2_grp1_pad_mux[] = { 2007static struct atlas7_pad_mux audio_uart2_urxd_grp1_pad_mux[] = {
1552 MUX(1, 109, 2, 0xa00, 24, 0xa80, 24), 2008 MUX(1, 109, 2, 0xa00, 24, 0xa80, 24),
1553 MUX(1, 110, 2, 0xa00, 25, 0xa80, 25), 2009};
2010
2011static struct atlas7_grp_mux audio_uart2_urxd_grp1_mux = {
2012 .pad_mux_count = ARRAY_SIZE(audio_uart2_urxd_grp1_pad_mux),
2013 .pad_mux_list = audio_uart2_urxd_grp1_pad_mux,
2014};
2015
2016static struct atlas7_pad_mux audio_uart2_urxd_grp2_pad_mux[] = {
2017 MUX(1, 93, 3, 0xa00, 24, 0xa80, 24),
2018};
2019
2020static struct atlas7_grp_mux audio_uart2_urxd_grp2_mux = {
2021 .pad_mux_count = ARRAY_SIZE(audio_uart2_urxd_grp2_pad_mux),
2022 .pad_mux_list = audio_uart2_urxd_grp2_pad_mux,
2023};
2024
2025static struct atlas7_pad_mux audio_uart2_usclk_grp0_pad_mux[] = {
2026 MUX(1, 19, 2, 0xa00, 23, 0xa80, 23),
2027};
2028
2029static struct atlas7_grp_mux audio_uart2_usclk_grp0_mux = {
2030 .pad_mux_count = ARRAY_SIZE(audio_uart2_usclk_grp0_pad_mux),
2031 .pad_mux_list = audio_uart2_usclk_grp0_pad_mux,
2032};
2033
2034static struct atlas7_pad_mux audio_uart2_usclk_grp1_pad_mux[] = {
1554 MUX(1, 101, 2, 0xa00, 23, 0xa80, 23), 2035 MUX(1, 101, 2, 0xa00, 23, 0xa80, 23),
2036};
2037
2038static struct atlas7_grp_mux audio_uart2_usclk_grp1_mux = {
2039 .pad_mux_count = ARRAY_SIZE(audio_uart2_usclk_grp1_pad_mux),
2040 .pad_mux_list = audio_uart2_usclk_grp1_pad_mux,
2041};
2042
2043static struct atlas7_pad_mux audio_uart2_usclk_grp2_pad_mux[] = {
2044 MUX(1, 91, 3, 0xa00, 23, 0xa80, 23),
2045};
2046
2047static struct atlas7_grp_mux audio_uart2_usclk_grp2_mux = {
2048 .pad_mux_count = ARRAY_SIZE(audio_uart2_usclk_grp2_pad_mux),
2049 .pad_mux_list = audio_uart2_usclk_grp2_pad_mux,
2050};
2051
2052static struct atlas7_pad_mux audio_uart2_utfs_grp0_pad_mux[] = {
2053 MUX(1, 18, 2, 0xa00, 22, 0xa80, 22),
2054};
2055
2056static struct atlas7_grp_mux audio_uart2_utfs_grp0_mux = {
2057 .pad_mux_count = ARRAY_SIZE(audio_uart2_utfs_grp0_pad_mux),
2058 .pad_mux_list = audio_uart2_utfs_grp0_pad_mux,
2059};
2060
2061static struct atlas7_pad_mux audio_uart2_utfs_grp1_pad_mux[] = {
1555 MUX(1, 111, 2, 0xa00, 22, 0xa80, 22), 2062 MUX(1, 111, 2, 0xa00, 22, 0xa80, 22),
1556}; 2063};
1557 2064
1558static struct atlas7_grp_mux audio_uart2_grp1_mux = { 2065static struct atlas7_grp_mux audio_uart2_utfs_grp1_mux = {
1559 .pad_mux_count = ARRAY_SIZE(audio_uart2_grp1_pad_mux), 2066 .pad_mux_count = ARRAY_SIZE(audio_uart2_utfs_grp1_pad_mux),
1560 .pad_mux_list = audio_uart2_grp1_pad_mux, 2067 .pad_mux_list = audio_uart2_utfs_grp1_pad_mux,
2068};
2069
2070static struct atlas7_pad_mux audio_uart2_utfs_grp2_pad_mux[] = {
2071 MUX(1, 94, 3, 0xa00, 22, 0xa80, 22),
2072};
2073
2074static struct atlas7_grp_mux audio_uart2_utfs_grp2_mux = {
2075 .pad_mux_count = ARRAY_SIZE(audio_uart2_utfs_grp2_pad_mux),
2076 .pad_mux_list = audio_uart2_utfs_grp2_pad_mux,
2077};
2078
2079static struct atlas7_pad_mux audio_uart2_utxd_grp0_pad_mux[] = {
2080 MUX(1, 21, 2, 0xa00, 25, 0xa80, 25),
2081};
2082
2083static struct atlas7_grp_mux audio_uart2_utxd_grp0_mux = {
2084 .pad_mux_count = ARRAY_SIZE(audio_uart2_utxd_grp0_pad_mux),
2085 .pad_mux_list = audio_uart2_utxd_grp0_pad_mux,
2086};
2087
2088static struct atlas7_pad_mux audio_uart2_utxd_grp1_pad_mux[] = {
2089 MUX(1, 110, 2, 0xa00, 25, 0xa80, 25),
2090};
2091
2092static struct atlas7_grp_mux audio_uart2_utxd_grp1_mux = {
2093 .pad_mux_count = ARRAY_SIZE(audio_uart2_utxd_grp1_pad_mux),
2094 .pad_mux_list = audio_uart2_utxd_grp1_pad_mux,
2095};
2096
2097static struct atlas7_pad_mux audio_uart2_utxd_grp2_pad_mux[] = {
2098 MUX(1, 92, 3, 0xa00, 25, 0xa80, 25),
2099};
2100
2101static struct atlas7_grp_mux audio_uart2_utxd_grp2_mux = {
2102 .pad_mux_count = ARRAY_SIZE(audio_uart2_utxd_grp2_pad_mux),
2103 .pad_mux_list = audio_uart2_utxd_grp2_pad_mux,
2104};
2105
2106static struct atlas7_pad_mux c_can_trnsvr_en_grp0_pad_mux[] = {
2107 MUX(0, 2, 6, N, N, N, N),
1561}; 2108};
1562 2109
1563static struct atlas7_pad_mux c_can_trnsvr_grp_pad_mux[] = { 2110static struct atlas7_grp_mux c_can_trnsvr_en_grp0_mux = {
2111 .pad_mux_count = ARRAY_SIZE(c_can_trnsvr_en_grp0_pad_mux),
2112 .pad_mux_list = c_can_trnsvr_en_grp0_pad_mux,
2113};
2114
2115static struct atlas7_pad_mux c_can_trnsvr_en_grp1_pad_mux[] = {
2116 MUX(0, 0, 2, N, N, N, N),
2117};
2118
2119static struct atlas7_grp_mux c_can_trnsvr_en_grp1_mux = {
2120 .pad_mux_count = ARRAY_SIZE(c_can_trnsvr_en_grp1_pad_mux),
2121 .pad_mux_list = c_can_trnsvr_en_grp1_pad_mux,
2122};
2123
2124static struct atlas7_pad_mux c_can_trnsvr_intr_grp_pad_mux[] = {
1564 MUX(0, 1, 2, N, N, N, N), 2125 MUX(0, 1, 2, N, N, N, N),
1565}; 2126};
1566 2127
1567static struct atlas7_grp_mux c_can_trnsvr_grp_mux = { 2128static struct atlas7_grp_mux c_can_trnsvr_intr_grp_mux = {
1568 .pad_mux_count = ARRAY_SIZE(c_can_trnsvr_grp_pad_mux), 2129 .pad_mux_count = ARRAY_SIZE(c_can_trnsvr_intr_grp_pad_mux),
1569 .pad_mux_list = c_can_trnsvr_grp_pad_mux, 2130 .pad_mux_list = c_can_trnsvr_intr_grp_pad_mux,
1570}; 2131};
1571 2132
1572static struct atlas7_pad_mux c0_can_grp0_pad_mux[] = { 2133static struct atlas7_pad_mux c_can_trnsvr_stb_n_grp_pad_mux[] = {
2134 MUX(0, 3, 6, N, N, N, N),
2135};
2136
2137static struct atlas7_grp_mux c_can_trnsvr_stb_n_grp_mux = {
2138 .pad_mux_count = ARRAY_SIZE(c_can_trnsvr_stb_n_grp_pad_mux),
2139 .pad_mux_list = c_can_trnsvr_stb_n_grp_pad_mux,
2140};
2141
2142static struct atlas7_pad_mux c0_can_rxd_trnsv0_grp_pad_mux[] = {
1573 MUX(0, 11, 1, 0xa08, 9, 0xa88, 9), 2143 MUX(0, 11, 1, 0xa08, 9, 0xa88, 9),
2144};
2145
2146static struct atlas7_grp_mux c0_can_rxd_trnsv0_grp_mux = {
2147 .pad_mux_count = ARRAY_SIZE(c0_can_rxd_trnsv0_grp_pad_mux),
2148 .pad_mux_list = c0_can_rxd_trnsv0_grp_pad_mux,
2149};
2150
2151static struct atlas7_pad_mux c0_can_rxd_trnsv1_grp_pad_mux[] = {
2152 MUX(0, 2, 5, 0xa10, 9, 0xa90, 9),
2153};
2154
2155static struct atlas7_grp_mux c0_can_rxd_trnsv1_grp_mux = {
2156 .pad_mux_count = ARRAY_SIZE(c0_can_rxd_trnsv1_grp_pad_mux),
2157 .pad_mux_list = c0_can_rxd_trnsv1_grp_pad_mux,
2158};
2159
2160static struct atlas7_pad_mux c0_can_txd_trnsv0_grp_pad_mux[] = {
1574 MUX(0, 10, 1, N, N, N, N), 2161 MUX(0, 10, 1, N, N, N, N),
1575}; 2162};
1576 2163
1577static struct atlas7_grp_mux c0_can_grp0_mux = { 2164static struct atlas7_grp_mux c0_can_txd_trnsv0_grp_mux = {
1578 .pad_mux_count = ARRAY_SIZE(c0_can_grp0_pad_mux), 2165 .pad_mux_count = ARRAY_SIZE(c0_can_txd_trnsv0_grp_pad_mux),
1579 .pad_mux_list = c0_can_grp0_pad_mux, 2166 .pad_mux_list = c0_can_txd_trnsv0_grp_pad_mux,
1580}; 2167};
1581 2168
1582static struct atlas7_pad_mux c0_can_grp1_pad_mux[] = { 2169static struct atlas7_pad_mux c0_can_txd_trnsv1_grp_pad_mux[] = {
1583 MUX(0, 2, 5, 0xa08, 9, 0xa88, 9),
1584 MUX(0, 3, 5, N, N, N, N), 2170 MUX(0, 3, 5, N, N, N, N),
1585}; 2171};
1586 2172
1587static struct atlas7_grp_mux c0_can_grp1_mux = { 2173static struct atlas7_grp_mux c0_can_txd_trnsv1_grp_mux = {
1588 .pad_mux_count = ARRAY_SIZE(c0_can_grp1_pad_mux), 2174 .pad_mux_count = ARRAY_SIZE(c0_can_txd_trnsv1_grp_pad_mux),
1589 .pad_mux_list = c0_can_grp1_pad_mux, 2175 .pad_mux_list = c0_can_txd_trnsv1_grp_pad_mux,
1590}; 2176};
1591 2177
1592static struct atlas7_pad_mux c1_can_grp0_pad_mux[] = { 2178static struct atlas7_pad_mux c1_can_rxd_grp0_pad_mux[] = {
1593 MUX(1, 138, 2, 0xa00, 4, 0xa80, 4), 2179 MUX(1, 138, 2, 0xa00, 4, 0xa80, 4),
1594 MUX(1, 137, 2, N, N, N, N),
1595}; 2180};
1596 2181
1597static struct atlas7_grp_mux c1_can_grp0_mux = { 2182static struct atlas7_grp_mux c1_can_rxd_grp0_mux = {
1598 .pad_mux_count = ARRAY_SIZE(c1_can_grp0_pad_mux), 2183 .pad_mux_count = ARRAY_SIZE(c1_can_rxd_grp0_pad_mux),
1599 .pad_mux_list = c1_can_grp0_pad_mux, 2184 .pad_mux_list = c1_can_rxd_grp0_pad_mux,
1600}; 2185};
1601 2186
1602static struct atlas7_pad_mux c1_can_grp1_pad_mux[] = { 2187static struct atlas7_pad_mux c1_can_rxd_grp1_pad_mux[] = {
1603 MUX(1, 147, 2, 0xa00, 4, 0xa80, 4), 2188 MUX(1, 147, 2, 0xa00, 4, 0xa80, 4),
1604 MUX(1, 146, 2, N, N, N, N),
1605}; 2189};
1606 2190
1607static struct atlas7_grp_mux c1_can_grp1_mux = { 2191static struct atlas7_grp_mux c1_can_rxd_grp1_mux = {
1608 .pad_mux_count = ARRAY_SIZE(c1_can_grp1_pad_mux), 2192 .pad_mux_count = ARRAY_SIZE(c1_can_rxd_grp1_pad_mux),
1609 .pad_mux_list = c1_can_grp1_pad_mux, 2193 .pad_mux_list = c1_can_rxd_grp1_pad_mux,
1610}; 2194};
1611 2195
1612static struct atlas7_pad_mux c1_can_grp2_pad_mux[] = { 2196static struct atlas7_pad_mux c1_can_rxd_grp2_pad_mux[] = {
1613 MUX(0, 2, 2, 0xa00, 4, 0xa80, 4), 2197 MUX(0, 2, 2, 0xa00, 4, 0xa80, 4),
2198};
2199
2200static struct atlas7_grp_mux c1_can_rxd_grp2_mux = {
2201 .pad_mux_count = ARRAY_SIZE(c1_can_rxd_grp2_pad_mux),
2202 .pad_mux_list = c1_can_rxd_grp2_pad_mux,
2203};
2204
2205static struct atlas7_pad_mux c1_can_rxd_grp3_pad_mux[] = {
2206 MUX(1, 162, 4, 0xa00, 4, 0xa80, 4),
2207};
2208
2209static struct atlas7_grp_mux c1_can_rxd_grp3_mux = {
2210 .pad_mux_count = ARRAY_SIZE(c1_can_rxd_grp3_pad_mux),
2211 .pad_mux_list = c1_can_rxd_grp3_pad_mux,
2212};
2213
2214static struct atlas7_pad_mux c1_can_txd_grp0_pad_mux[] = {
2215 MUX(1, 137, 2, N, N, N, N),
2216};
2217
2218static struct atlas7_grp_mux c1_can_txd_grp0_mux = {
2219 .pad_mux_count = ARRAY_SIZE(c1_can_txd_grp0_pad_mux),
2220 .pad_mux_list = c1_can_txd_grp0_pad_mux,
2221};
2222
2223static struct atlas7_pad_mux c1_can_txd_grp1_pad_mux[] = {
2224 MUX(1, 146, 2, N, N, N, N),
2225};
2226
2227static struct atlas7_grp_mux c1_can_txd_grp1_mux = {
2228 .pad_mux_count = ARRAY_SIZE(c1_can_txd_grp1_pad_mux),
2229 .pad_mux_list = c1_can_txd_grp1_pad_mux,
2230};
2231
2232static struct atlas7_pad_mux c1_can_txd_grp2_pad_mux[] = {
1614 MUX(0, 3, 2, N, N, N, N), 2233 MUX(0, 3, 2, N, N, N, N),
1615}; 2234};
1616 2235
1617static struct atlas7_grp_mux c1_can_grp2_mux = { 2236static struct atlas7_grp_mux c1_can_txd_grp2_mux = {
1618 .pad_mux_count = ARRAY_SIZE(c1_can_grp2_pad_mux), 2237 .pad_mux_count = ARRAY_SIZE(c1_can_txd_grp2_pad_mux),
1619 .pad_mux_list = c1_can_grp2_pad_mux, 2238 .pad_mux_list = c1_can_txd_grp2_pad_mux,
2239};
2240
2241static struct atlas7_pad_mux c1_can_txd_grp3_pad_mux[] = {
2242 MUX(1, 161, 4, N, N, N, N),
2243};
2244
2245static struct atlas7_grp_mux c1_can_txd_grp3_mux = {
2246 .pad_mux_count = ARRAY_SIZE(c1_can_txd_grp3_pad_mux),
2247 .pad_mux_list = c1_can_txd_grp3_pad_mux,
1620}; 2248};
1621 2249
1622static struct atlas7_pad_mux ca_audio_lpc_grp_pad_mux[] = { 2250static struct atlas7_pad_mux ca_audio_lpc_grp_pad_mux[] = {
@@ -2198,18 +2826,215 @@ static struct atlas7_grp_mux i2c1_grp_mux = {
2198 .pad_mux_list = i2c1_grp_pad_mux, 2826 .pad_mux_list = i2c1_grp_pad_mux,
2199}; 2827};
2200 2828
2201static struct atlas7_pad_mux jtag_grp0_pad_mux[] = { 2829static struct atlas7_pad_mux i2s0_grp_pad_mux[] = {
2830 MUX(1, 91, 2, 0xa10, 12, 0xa90, 12),
2831 MUX(1, 93, 2, 0xa10, 13, 0xa90, 13),
2832 MUX(1, 94, 2, 0xa10, 14, 0xa90, 14),
2833 MUX(1, 92, 2, 0xa10, 15, 0xa90, 15),
2834};
2835
2836static struct atlas7_grp_mux i2s0_grp_mux = {
2837 .pad_mux_count = ARRAY_SIZE(i2s0_grp_pad_mux),
2838 .pad_mux_list = i2s0_grp_pad_mux,
2839};
2840
2841static struct atlas7_pad_mux i2s1_basic_grp_pad_mux[] = {
2842 MUX(1, 95, 2, 0xa10, 16, 0xa90, 16),
2843 MUX(1, 96, 2, 0xa10, 19, 0xa90, 19),
2844};
2845
2846static struct atlas7_grp_mux i2s1_basic_grp_mux = {
2847 .pad_mux_count = ARRAY_SIZE(i2s1_basic_grp_pad_mux),
2848 .pad_mux_list = i2s1_basic_grp_pad_mux,
2849};
2850
2851static struct atlas7_pad_mux i2s1_rxd0_grp0_pad_mux[] = {
2852 MUX(1, 61, 4, 0xa10, 17, 0xa90, 17),
2853};
2854
2855static struct atlas7_grp_mux i2s1_rxd0_grp0_mux = {
2856 .pad_mux_count = ARRAY_SIZE(i2s1_rxd0_grp0_pad_mux),
2857 .pad_mux_list = i2s1_rxd0_grp0_pad_mux,
2858};
2859
2860static struct atlas7_pad_mux i2s1_rxd0_grp1_pad_mux[] = {
2861 MUX(1, 131, 4, 0xa10, 17, 0xa90, 17),
2862};
2863
2864static struct atlas7_grp_mux i2s1_rxd0_grp1_mux = {
2865 .pad_mux_count = ARRAY_SIZE(i2s1_rxd0_grp1_pad_mux),
2866 .pad_mux_list = i2s1_rxd0_grp1_pad_mux,
2867};
2868
2869static struct atlas7_pad_mux i2s1_rxd0_grp2_pad_mux[] = {
2870 MUX(1, 129, 2, 0xa10, 17, 0xa90, 17),
2871};
2872
2873static struct atlas7_grp_mux i2s1_rxd0_grp2_mux = {
2874 .pad_mux_count = ARRAY_SIZE(i2s1_rxd0_grp2_pad_mux),
2875 .pad_mux_list = i2s1_rxd0_grp2_pad_mux,
2876};
2877
2878static struct atlas7_pad_mux i2s1_rxd0_grp3_pad_mux[] = {
2879 MUX(1, 117, 7, 0xa10, 17, 0xa90, 17),
2880};
2881
2882static struct atlas7_grp_mux i2s1_rxd0_grp3_mux = {
2883 .pad_mux_count = ARRAY_SIZE(i2s1_rxd0_grp3_pad_mux),
2884 .pad_mux_list = i2s1_rxd0_grp3_pad_mux,
2885};
2886
2887static struct atlas7_pad_mux i2s1_rxd0_grp4_pad_mux[] = {
2888 MUX(1, 83, 4, 0xa10, 17, 0xa90, 17),
2889};
2890
2891static struct atlas7_grp_mux i2s1_rxd0_grp4_mux = {
2892 .pad_mux_count = ARRAY_SIZE(i2s1_rxd0_grp4_pad_mux),
2893 .pad_mux_list = i2s1_rxd0_grp4_pad_mux,
2894};
2895
2896static struct atlas7_pad_mux i2s1_rxd1_grp0_pad_mux[] = {
2897 MUX(1, 72, 4, 0xa10, 18, 0xa90, 18),
2898};
2899
2900static struct atlas7_grp_mux i2s1_rxd1_grp0_mux = {
2901 .pad_mux_count = ARRAY_SIZE(i2s1_rxd1_grp0_pad_mux),
2902 .pad_mux_list = i2s1_rxd1_grp0_pad_mux,
2903};
2904
2905static struct atlas7_pad_mux i2s1_rxd1_grp1_pad_mux[] = {
2906 MUX(1, 132, 4, 0xa10, 18, 0xa90, 18),
2907};
2908
2909static struct atlas7_grp_mux i2s1_rxd1_grp1_mux = {
2910 .pad_mux_count = ARRAY_SIZE(i2s1_rxd1_grp1_pad_mux),
2911 .pad_mux_list = i2s1_rxd1_grp1_pad_mux,
2912};
2913
2914static struct atlas7_pad_mux i2s1_rxd1_grp2_pad_mux[] = {
2915 MUX(1, 130, 2, 0xa10, 18, 0xa90, 18),
2916};
2917
2918static struct atlas7_grp_mux i2s1_rxd1_grp2_mux = {
2919 .pad_mux_count = ARRAY_SIZE(i2s1_rxd1_grp2_pad_mux),
2920 .pad_mux_list = i2s1_rxd1_grp2_pad_mux,
2921};
2922
2923static struct atlas7_pad_mux i2s1_rxd1_grp3_pad_mux[] = {
2924 MUX(1, 118, 7, 0xa10, 18, 0xa90, 18),
2925};
2926
2927static struct atlas7_grp_mux i2s1_rxd1_grp3_mux = {
2928 .pad_mux_count = ARRAY_SIZE(i2s1_rxd1_grp3_pad_mux),
2929 .pad_mux_list = i2s1_rxd1_grp3_pad_mux,
2930};
2931
2932static struct atlas7_pad_mux i2s1_rxd1_grp4_pad_mux[] = {
2933 MUX(1, 84, 4, 0xa10, 18, 0xa90, 18),
2934};
2935
2936static struct atlas7_grp_mux i2s1_rxd1_grp4_mux = {
2937 .pad_mux_count = ARRAY_SIZE(i2s1_rxd1_grp4_pad_mux),
2938 .pad_mux_list = i2s1_rxd1_grp4_pad_mux,
2939};
2940
2941static struct atlas7_pad_mux jtag_jt_dbg_nsrst_grp_pad_mux[] = {
2202 MUX(1, 125, 5, 0xa08, 2, 0xa88, 2), 2942 MUX(1, 125, 5, 0xa08, 2, 0xa88, 2),
2943};
2944
2945static struct atlas7_grp_mux jtag_jt_dbg_nsrst_grp_mux = {
2946 .pad_mux_count = ARRAY_SIZE(jtag_jt_dbg_nsrst_grp_pad_mux),
2947 .pad_mux_list = jtag_jt_dbg_nsrst_grp_pad_mux,
2948};
2949
2950static struct atlas7_pad_mux jtag_ntrst_grp0_pad_mux[] = {
2203 MUX(0, 4, 3, 0xa08, 3, 0xa88, 3), 2951 MUX(0, 4, 3, 0xa08, 3, 0xa88, 3),
2204 MUX(0, 2, 3, N, N, N, N), 2952};
2205 MUX(0, 0, 3, N, N, N, N), 2953
2206 MUX(0, 1, 3, N, N, N, N), 2954static struct atlas7_grp_mux jtag_ntrst_grp0_mux = {
2955 .pad_mux_count = ARRAY_SIZE(jtag_ntrst_grp0_pad_mux),
2956 .pad_mux_list = jtag_ntrst_grp0_pad_mux,
2957};
2958
2959static struct atlas7_pad_mux jtag_ntrst_grp1_pad_mux[] = {
2960 MUX(1, 163, 1, 0xa08, 3, 0xa88, 3),
2961};
2962
2963static struct atlas7_grp_mux jtag_ntrst_grp1_mux = {
2964 .pad_mux_count = ARRAY_SIZE(jtag_ntrst_grp1_pad_mux),
2965 .pad_mux_list = jtag_ntrst_grp1_pad_mux,
2966};
2967
2968static struct atlas7_pad_mux jtag_swdiotms_grp0_pad_mux[] = {
2969 MUX(0, 2, 3, 0xa10, 10, 0xa90, 10),
2970};
2971
2972static struct atlas7_grp_mux jtag_swdiotms_grp0_mux = {
2973 .pad_mux_count = ARRAY_SIZE(jtag_swdiotms_grp0_pad_mux),
2974 .pad_mux_list = jtag_swdiotms_grp0_pad_mux,
2975};
2976
2977static struct atlas7_pad_mux jtag_swdiotms_grp1_pad_mux[] = {
2978 MUX(1, 160, 1, 0xa10, 10, 0xa90, 10),
2979};
2980
2981static struct atlas7_grp_mux jtag_swdiotms_grp1_mux = {
2982 .pad_mux_count = ARRAY_SIZE(jtag_swdiotms_grp1_pad_mux),
2983 .pad_mux_list = jtag_swdiotms_grp1_pad_mux,
2984};
2985
2986static struct atlas7_pad_mux jtag_tck_grp0_pad_mux[] = {
2987 MUX(0, 0, 3, 0xa10, 11, 0xa90, 11),
2988};
2989
2990static struct atlas7_grp_mux jtag_tck_grp0_mux = {
2991 .pad_mux_count = ARRAY_SIZE(jtag_tck_grp0_pad_mux),
2992 .pad_mux_list = jtag_tck_grp0_pad_mux,
2993};
2994
2995static struct atlas7_pad_mux jtag_tck_grp1_pad_mux[] = {
2996 MUX(1, 161, 1, 0xa10, 11, 0xa90, 11),
2997};
2998
2999static struct atlas7_grp_mux jtag_tck_grp1_mux = {
3000 .pad_mux_count = ARRAY_SIZE(jtag_tck_grp1_pad_mux),
3001 .pad_mux_list = jtag_tck_grp1_pad_mux,
3002};
3003
3004static struct atlas7_pad_mux jtag_tdi_grp0_pad_mux[] = {
3005 MUX(0, 1, 3, 0xa10, 31, 0xa90, 31),
3006};
3007
3008static struct atlas7_grp_mux jtag_tdi_grp0_mux = {
3009 .pad_mux_count = ARRAY_SIZE(jtag_tdi_grp0_pad_mux),
3010 .pad_mux_list = jtag_tdi_grp0_pad_mux,
3011};
3012
3013static struct atlas7_pad_mux jtag_tdi_grp1_pad_mux[] = {
3014 MUX(1, 162, 1, 0xa10, 31, 0xa90, 31),
3015};
3016
3017static struct atlas7_grp_mux jtag_tdi_grp1_mux = {
3018 .pad_mux_count = ARRAY_SIZE(jtag_tdi_grp1_pad_mux),
3019 .pad_mux_list = jtag_tdi_grp1_pad_mux,
3020};
3021
3022static struct atlas7_pad_mux jtag_tdo_grp0_pad_mux[] = {
2207 MUX(0, 3, 3, N, N, N, N), 3023 MUX(0, 3, 3, N, N, N, N),
2208}; 3024};
2209 3025
2210static struct atlas7_grp_mux jtag_grp0_mux = { 3026static struct atlas7_grp_mux jtag_tdo_grp0_mux = {
2211 .pad_mux_count = ARRAY_SIZE(jtag_grp0_pad_mux), 3027 .pad_mux_count = ARRAY_SIZE(jtag_tdo_grp0_pad_mux),
2212 .pad_mux_list = jtag_grp0_pad_mux, 3028 .pad_mux_list = jtag_tdo_grp0_pad_mux,
3029};
3030
3031static struct atlas7_pad_mux jtag_tdo_grp1_pad_mux[] = {
3032 MUX(1, 159, 1, N, N, N, N),
3033};
3034
3035static struct atlas7_grp_mux jtag_tdo_grp1_mux = {
3036 .pad_mux_count = ARRAY_SIZE(jtag_tdo_grp1_pad_mux),
3037 .pad_mux_list = jtag_tdo_grp1_pad_mux,
2213}; 3038};
2214 3039
2215static struct atlas7_pad_mux ks_kas_spi_grp0_pad_mux[] = { 3040static struct atlas7_pad_mux ks_kas_spi_grp0_pad_mux[] = {
@@ -2401,6 +3226,7 @@ static struct atlas7_grp_mux nd_df_nowp_grp_mux = {
2401static struct atlas7_pad_mux ps_grp_pad_mux[] = { 3226static struct atlas7_pad_mux ps_grp_pad_mux[] = {
2402 MUX(1, 120, 2, N, N, N, N), 3227 MUX(1, 120, 2, N, N, N, N),
2403 MUX(1, 119, 2, N, N, N, N), 3228 MUX(1, 119, 2, N, N, N, N),
3229 MUX(1, 121, 5, N, N, N, N),
2404}; 3230};
2405 3231
2406static struct atlas7_grp_mux ps_grp_mux = { 3232static struct atlas7_grp_mux ps_grp_mux = {
@@ -2534,6 +3360,15 @@ static struct atlas7_grp_mux pw_cko0_grp2_mux = {
2534 .pad_mux_list = pw_cko0_grp2_pad_mux, 3360 .pad_mux_list = pw_cko0_grp2_pad_mux,
2535}; 3361};
2536 3362
3363static struct atlas7_pad_mux pw_cko0_grp3_pad_mux[] = {
3364 MUX(1, 162, 5, N, N, N, N),
3365};
3366
3367static struct atlas7_grp_mux pw_cko0_grp3_mux = {
3368 .pad_mux_count = ARRAY_SIZE(pw_cko0_grp3_pad_mux),
3369 .pad_mux_list = pw_cko0_grp3_pad_mux,
3370};
3371
2537static struct atlas7_pad_mux pw_cko1_grp0_pad_mux[] = { 3372static struct atlas7_pad_mux pw_cko1_grp0_pad_mux[] = {
2538 MUX(1, 124, 3, N, N, N, N), 3373 MUX(1, 124, 3, N, N, N, N),
2539}; 3374};
@@ -2552,6 +3387,15 @@ static struct atlas7_grp_mux pw_cko1_grp1_mux = {
2552 .pad_mux_list = pw_cko1_grp1_pad_mux, 3387 .pad_mux_list = pw_cko1_grp1_pad_mux,
2553}; 3388};
2554 3389
3390static struct atlas7_pad_mux pw_cko1_grp2_pad_mux[] = {
3391 MUX(1, 163, 5, N, N, N, N),
3392};
3393
3394static struct atlas7_grp_mux pw_cko1_grp2_mux = {
3395 .pad_mux_count = ARRAY_SIZE(pw_cko1_grp2_pad_mux),
3396 .pad_mux_list = pw_cko1_grp2_pad_mux,
3397};
3398
2555static struct atlas7_pad_mux pw_i2s01_clk_grp0_pad_mux[] = { 3399static struct atlas7_pad_mux pw_i2s01_clk_grp0_pad_mux[] = {
2556 MUX(1, 125, 3, N, N, N, N), 3400 MUX(1, 125, 3, N, N, N, N),
2557}; 3401};
@@ -2570,22 +3414,58 @@ static struct atlas7_grp_mux pw_i2s01_clk_grp1_mux = {
2570 .pad_mux_list = pw_i2s01_clk_grp1_pad_mux, 3414 .pad_mux_list = pw_i2s01_clk_grp1_pad_mux,
2571}; 3415};
2572 3416
2573static struct atlas7_pad_mux pw_pwm0_grp_pad_mux[] = { 3417static struct atlas7_pad_mux pw_i2s01_clk_grp2_pad_mux[] = {
3418 MUX(1, 132, 2, N, N, N, N),
3419};
3420
3421static struct atlas7_grp_mux pw_i2s01_clk_grp2_mux = {
3422 .pad_mux_count = ARRAY_SIZE(pw_i2s01_clk_grp2_pad_mux),
3423 .pad_mux_list = pw_i2s01_clk_grp2_pad_mux,
3424};
3425
3426static struct atlas7_pad_mux pw_pwm0_grp0_pad_mux[] = {
2574 MUX(1, 119, 3, N, N, N, N), 3427 MUX(1, 119, 3, N, N, N, N),
2575}; 3428};
2576 3429
2577static struct atlas7_grp_mux pw_pwm0_grp_mux = { 3430static struct atlas7_grp_mux pw_pwm0_grp0_mux = {
2578 .pad_mux_count = ARRAY_SIZE(pw_pwm0_grp_pad_mux), 3431 .pad_mux_count = ARRAY_SIZE(pw_pwm0_grp0_pad_mux),
2579 .pad_mux_list = pw_pwm0_grp_pad_mux, 3432 .pad_mux_list = pw_pwm0_grp0_pad_mux,
3433};
3434
3435static struct atlas7_pad_mux pw_pwm0_grp1_pad_mux[] = {
3436 MUX(1, 159, 5, N, N, N, N),
3437};
3438
3439static struct atlas7_grp_mux pw_pwm0_grp1_mux = {
3440 .pad_mux_count = ARRAY_SIZE(pw_pwm0_grp1_pad_mux),
3441 .pad_mux_list = pw_pwm0_grp1_pad_mux,
2580}; 3442};
2581 3443
2582static struct atlas7_pad_mux pw_pwm1_grp_pad_mux[] = { 3444static struct atlas7_pad_mux pw_pwm1_grp0_pad_mux[] = {
2583 MUX(1, 120, 3, N, N, N, N), 3445 MUX(1, 120, 3, N, N, N, N),
2584}; 3446};
2585 3447
2586static struct atlas7_grp_mux pw_pwm1_grp_mux = { 3448static struct atlas7_grp_mux pw_pwm1_grp0_mux = {
2587 .pad_mux_count = ARRAY_SIZE(pw_pwm1_grp_pad_mux), 3449 .pad_mux_count = ARRAY_SIZE(pw_pwm1_grp0_pad_mux),
2588 .pad_mux_list = pw_pwm1_grp_pad_mux, 3450 .pad_mux_list = pw_pwm1_grp0_pad_mux,
3451};
3452
3453static struct atlas7_pad_mux pw_pwm1_grp1_pad_mux[] = {
3454 MUX(1, 160, 5, N, N, N, N),
3455};
3456
3457static struct atlas7_grp_mux pw_pwm1_grp1_mux = {
3458 .pad_mux_count = ARRAY_SIZE(pw_pwm1_grp1_pad_mux),
3459 .pad_mux_list = pw_pwm1_grp1_pad_mux,
3460};
3461
3462static struct atlas7_pad_mux pw_pwm1_grp2_pad_mux[] = {
3463 MUX(1, 131, 2, N, N, N, N),
3464};
3465
3466static struct atlas7_grp_mux pw_pwm1_grp2_mux = {
3467 .pad_mux_count = ARRAY_SIZE(pw_pwm1_grp2_pad_mux),
3468 .pad_mux_list = pw_pwm1_grp2_pad_mux,
2589}; 3469};
2590 3470
2591static struct atlas7_pad_mux pw_pwm2_grp0_pad_mux[] = { 3471static struct atlas7_pad_mux pw_pwm2_grp0_pad_mux[] = {
@@ -2606,6 +3486,15 @@ static struct atlas7_grp_mux pw_pwm2_grp1_mux = {
2606 .pad_mux_list = pw_pwm2_grp1_pad_mux, 3486 .pad_mux_list = pw_pwm2_grp1_pad_mux,
2607}; 3487};
2608 3488
3489static struct atlas7_pad_mux pw_pwm2_grp2_pad_mux[] = {
3490 MUX(1, 161, 5, N, N, N, N),
3491};
3492
3493static struct atlas7_grp_mux pw_pwm2_grp2_mux = {
3494 .pad_mux_count = ARRAY_SIZE(pw_pwm2_grp2_pad_mux),
3495 .pad_mux_list = pw_pwm2_grp2_pad_mux,
3496};
3497
2609static struct atlas7_pad_mux pw_pwm3_grp0_pad_mux[] = { 3498static struct atlas7_pad_mux pw_pwm3_grp0_pad_mux[] = {
2610 MUX(1, 122, 3, N, N, N, N), 3499 MUX(1, 122, 3, N, N, N, N),
2611}; 3500};
@@ -2642,6 +3531,15 @@ static struct atlas7_grp_mux pw_pwm_cpu_vol_grp1_mux = {
2642 .pad_mux_list = pw_pwm_cpu_vol_grp1_pad_mux, 3531 .pad_mux_list = pw_pwm_cpu_vol_grp1_pad_mux,
2643}; 3532};
2644 3533
3534static struct atlas7_pad_mux pw_pwm_cpu_vol_grp2_pad_mux[] = {
3535 MUX(1, 161, 5, N, N, N, N),
3536};
3537
3538static struct atlas7_grp_mux pw_pwm_cpu_vol_grp2_mux = {
3539 .pad_mux_count = ARRAY_SIZE(pw_pwm_cpu_vol_grp2_pad_mux),
3540 .pad_mux_list = pw_pwm_cpu_vol_grp2_pad_mux,
3541};
3542
2645static struct atlas7_pad_mux pw_backlight_grp0_pad_mux[] = { 3543static struct atlas7_pad_mux pw_backlight_grp0_pad_mux[] = {
2646 MUX(1, 122, 3, N, N, N, N), 3544 MUX(1, 122, 3, N, N, N, N),
2647}; 3545};
@@ -2795,35 +3693,54 @@ static struct atlas7_grp_mux sd1_4bit_grp1_mux = {
2795 .pad_mux_list = sd1_4bit_grp1_pad_mux, 3693 .pad_mux_list = sd1_4bit_grp1_pad_mux,
2796}; 3694};
2797 3695
2798static struct atlas7_pad_mux sd2_grp0_pad_mux[] = { 3696static struct atlas7_pad_mux sd2_basic_grp_pad_mux[] = {
2799 MUX(1, 124, 2, 0xa08, 7, 0xa88, 7),
2800 MUX(1, 31, 1, N, N, N, N), 3697 MUX(1, 31, 1, N, N, N, N),
2801 MUX(1, 32, 1, N, N, N, N), 3698 MUX(1, 32, 1, N, N, N, N),
2802 MUX(1, 33, 1, N, N, N, N), 3699 MUX(1, 33, 1, N, N, N, N),
2803 MUX(1, 34, 1, N, N, N, N), 3700 MUX(1, 34, 1, N, N, N, N),
2804 MUX(1, 35, 1, N, N, N, N), 3701 MUX(1, 35, 1, N, N, N, N),
2805 MUX(1, 36, 1, N, N, N, N), 3702 MUX(1, 36, 1, N, N, N, N),
2806 MUX(1, 123, 2, N, N, N, N),
2807}; 3703};
2808 3704
2809static struct atlas7_grp_mux sd2_grp0_mux = { 3705static struct atlas7_grp_mux sd2_basic_grp_mux = {
2810 .pad_mux_count = ARRAY_SIZE(sd2_grp0_pad_mux), 3706 .pad_mux_count = ARRAY_SIZE(sd2_basic_grp_pad_mux),
2811 .pad_mux_list = sd2_grp0_pad_mux, 3707 .pad_mux_list = sd2_basic_grp_pad_mux,
2812}; 3708};
2813 3709
2814static struct atlas7_pad_mux sd2_no_cdb_grp0_pad_mux[] = { 3710static struct atlas7_pad_mux sd2_cdb_grp0_pad_mux[] = {
2815 MUX(1, 31, 1, N, N, N, N), 3711 MUX(1, 124, 2, 0xa08, 7, 0xa88, 7),
2816 MUX(1, 32, 1, N, N, N, N),
2817 MUX(1, 33, 1, N, N, N, N),
2818 MUX(1, 34, 1, N, N, N, N),
2819 MUX(1, 35, 1, N, N, N, N),
2820 MUX(1, 36, 1, N, N, N, N),
2821 MUX(1, 123, 2, N, N, N, N),
2822}; 3712};
2823 3713
2824static struct atlas7_grp_mux sd2_no_cdb_grp0_mux = { 3714static struct atlas7_grp_mux sd2_cdb_grp0_mux = {
2825 .pad_mux_count = ARRAY_SIZE(sd2_no_cdb_grp0_pad_mux), 3715 .pad_mux_count = ARRAY_SIZE(sd2_cdb_grp0_pad_mux),
2826 .pad_mux_list = sd2_no_cdb_grp0_pad_mux, 3716 .pad_mux_list = sd2_cdb_grp0_pad_mux,
3717};
3718
3719static struct atlas7_pad_mux sd2_cdb_grp1_pad_mux[] = {
3720 MUX(1, 161, 6, 0xa08, 7, 0xa88, 7),
3721};
3722
3723static struct atlas7_grp_mux sd2_cdb_grp1_mux = {
3724 .pad_mux_count = ARRAY_SIZE(sd2_cdb_grp1_pad_mux),
3725 .pad_mux_list = sd2_cdb_grp1_pad_mux,
3726};
3727
3728static struct atlas7_pad_mux sd2_wpb_grp0_pad_mux[] = {
3729 MUX(1, 123, 2, 0xa10, 6, 0xa90, 6),
3730};
3731
3732static struct atlas7_grp_mux sd2_wpb_grp0_mux = {
3733 .pad_mux_count = ARRAY_SIZE(sd2_wpb_grp0_pad_mux),
3734 .pad_mux_list = sd2_wpb_grp0_pad_mux,
3735};
3736
3737static struct atlas7_pad_mux sd2_wpb_grp1_pad_mux[] = {
3738 MUX(1, 163, 7, 0xa10, 6, 0xa90, 6),
3739};
3740
3741static struct atlas7_grp_mux sd2_wpb_grp1_mux = {
3742 .pad_mux_count = ARRAY_SIZE(sd2_wpb_grp1_pad_mux),
3743 .pad_mux_list = sd2_wpb_grp1_pad_mux,
2827}; 3744};
2828 3745
2829static struct atlas7_pad_mux sd3_grp_pad_mux[] = { 3746static struct atlas7_pad_mux sd3_grp_pad_mux[] = {
@@ -2975,146 +3892,302 @@ static struct atlas7_grp_mux uart1_grp_mux = {
2975 .pad_mux_list = uart1_grp_pad_mux, 3892 .pad_mux_list = uart1_grp_pad_mux,
2976}; 3893};
2977 3894
2978static struct atlas7_pad_mux uart2_grp_pad_mux[] = { 3895static struct atlas7_pad_mux uart2_cts_grp0_pad_mux[] = {
2979 MUX(0, 11, 2, N, N, N, N), 3896 MUX(1, 132, 3, 0xa10, 2, 0xa90, 2),
3897};
3898
3899static struct atlas7_grp_mux uart2_cts_grp0_mux = {
3900 .pad_mux_count = ARRAY_SIZE(uart2_cts_grp0_pad_mux),
3901 .pad_mux_list = uart2_cts_grp0_pad_mux,
3902};
3903
3904static struct atlas7_pad_mux uart2_cts_grp1_pad_mux[] = {
3905 MUX(1, 162, 2, 0xa10, 2, 0xa90, 2),
3906};
3907
3908static struct atlas7_grp_mux uart2_cts_grp1_mux = {
3909 .pad_mux_count = ARRAY_SIZE(uart2_cts_grp1_pad_mux),
3910 .pad_mux_list = uart2_cts_grp1_pad_mux,
3911};
3912
3913static struct atlas7_pad_mux uart2_rts_grp0_pad_mux[] = {
3914 MUX(1, 131, 3, N, N, N, N),
3915};
3916
3917static struct atlas7_grp_mux uart2_rts_grp0_mux = {
3918 .pad_mux_count = ARRAY_SIZE(uart2_rts_grp0_pad_mux),
3919 .pad_mux_list = uart2_rts_grp0_pad_mux,
3920};
3921
3922static struct atlas7_pad_mux uart2_rts_grp1_pad_mux[] = {
3923 MUX(1, 161, 2, N, N, N, N),
3924};
3925
3926static struct atlas7_grp_mux uart2_rts_grp1_mux = {
3927 .pad_mux_count = ARRAY_SIZE(uart2_rts_grp1_pad_mux),
3928 .pad_mux_list = uart2_rts_grp1_pad_mux,
3929};
3930
3931static struct atlas7_pad_mux uart2_rxd_grp0_pad_mux[] = {
3932 MUX(0, 11, 2, 0xa10, 5, 0xa90, 5),
3933};
3934
3935static struct atlas7_grp_mux uart2_rxd_grp0_mux = {
3936 .pad_mux_count = ARRAY_SIZE(uart2_rxd_grp0_pad_mux),
3937 .pad_mux_list = uart2_rxd_grp0_pad_mux,
3938};
3939
3940static struct atlas7_pad_mux uart2_rxd_grp1_pad_mux[] = {
3941 MUX(1, 160, 2, 0xa10, 5, 0xa90, 5),
3942};
3943
3944static struct atlas7_grp_mux uart2_rxd_grp1_mux = {
3945 .pad_mux_count = ARRAY_SIZE(uart2_rxd_grp1_pad_mux),
3946 .pad_mux_list = uart2_rxd_grp1_pad_mux,
3947};
3948
3949static struct atlas7_pad_mux uart2_rxd_grp2_pad_mux[] = {
3950 MUX(1, 130, 3, 0xa10, 5, 0xa90, 5),
3951};
3952
3953static struct atlas7_grp_mux uart2_rxd_grp2_mux = {
3954 .pad_mux_count = ARRAY_SIZE(uart2_rxd_grp2_pad_mux),
3955 .pad_mux_list = uart2_rxd_grp2_pad_mux,
3956};
3957
3958static struct atlas7_pad_mux uart2_txd_grp0_pad_mux[] = {
2980 MUX(0, 10, 2, N, N, N, N), 3959 MUX(0, 10, 2, N, N, N, N),
2981}; 3960};
2982 3961
2983static struct atlas7_grp_mux uart2_grp_mux = { 3962static struct atlas7_grp_mux uart2_txd_grp0_mux = {
2984 .pad_mux_count = ARRAY_SIZE(uart2_grp_pad_mux), 3963 .pad_mux_count = ARRAY_SIZE(uart2_txd_grp0_pad_mux),
2985 .pad_mux_list = uart2_grp_pad_mux, 3964 .pad_mux_list = uart2_txd_grp0_pad_mux,
3965};
3966
3967static struct atlas7_pad_mux uart2_txd_grp1_pad_mux[] = {
3968 MUX(1, 159, 2, N, N, N, N),
2986}; 3969};
2987 3970
2988static struct atlas7_pad_mux uart3_grp0_pad_mux[] = { 3971static struct atlas7_grp_mux uart2_txd_grp1_mux = {
3972 .pad_mux_count = ARRAY_SIZE(uart2_txd_grp1_pad_mux),
3973 .pad_mux_list = uart2_txd_grp1_pad_mux,
3974};
3975
3976static struct atlas7_pad_mux uart2_txd_grp2_pad_mux[] = {
3977 MUX(1, 129, 3, N, N, N, N),
3978};
3979
3980static struct atlas7_grp_mux uart2_txd_grp2_mux = {
3981 .pad_mux_count = ARRAY_SIZE(uart2_txd_grp2_pad_mux),
3982 .pad_mux_list = uart2_txd_grp2_pad_mux,
3983};
3984
3985static struct atlas7_pad_mux uart3_cts_grp0_pad_mux[] = {
2989 MUX(1, 125, 2, 0xa08, 0, 0xa88, 0), 3986 MUX(1, 125, 2, 0xa08, 0, 0xa88, 0),
2990 MUX(1, 126, 2, N, N, N, N),
2991 MUX(1, 138, 1, 0xa00, 5, 0xa80, 5),
2992 MUX(1, 137, 1, N, N, N, N),
2993}; 3987};
2994 3988
2995static struct atlas7_grp_mux uart3_grp0_mux = { 3989static struct atlas7_grp_mux uart3_cts_grp0_mux = {
2996 .pad_mux_count = ARRAY_SIZE(uart3_grp0_pad_mux), 3990 .pad_mux_count = ARRAY_SIZE(uart3_cts_grp0_pad_mux),
2997 .pad_mux_list = uart3_grp0_pad_mux, 3991 .pad_mux_list = uart3_cts_grp0_pad_mux,
2998}; 3992};
2999 3993
3000static struct atlas7_pad_mux uart3_grp1_pad_mux[] = { 3994static struct atlas7_pad_mux uart3_cts_grp1_pad_mux[] = {
3001 MUX(1, 111, 4, 0xa08, 0, 0xa88, 0), 3995 MUX(1, 111, 4, 0xa08, 0, 0xa88, 0),
3002 MUX(1, 109, 4, N, N, N, N),
3003 MUX(1, 84, 2, 0xa00, 5, 0xa80, 5),
3004 MUX(1, 83, 2, N, N, N, N),
3005}; 3996};
3006 3997
3007static struct atlas7_grp_mux uart3_grp1_mux = { 3998static struct atlas7_grp_mux uart3_cts_grp1_mux = {
3008 .pad_mux_count = ARRAY_SIZE(uart3_grp1_pad_mux), 3999 .pad_mux_count = ARRAY_SIZE(uart3_cts_grp1_pad_mux),
3009 .pad_mux_list = uart3_grp1_pad_mux, 4000 .pad_mux_list = uart3_cts_grp1_pad_mux,
3010}; 4001};
3011 4002
3012static struct atlas7_pad_mux uart3_grp2_pad_mux[] = { 4003static struct atlas7_pad_mux uart3_cts_grp2_pad_mux[] = {
3013 MUX(1, 140, 2, 0xa08, 0, 0xa88, 0), 4004 MUX(1, 140, 2, 0xa08, 0, 0xa88, 0),
4005};
4006
4007static struct atlas7_grp_mux uart3_cts_grp2_mux = {
4008 .pad_mux_count = ARRAY_SIZE(uart3_cts_grp2_pad_mux),
4009 .pad_mux_list = uart3_cts_grp2_pad_mux,
4010};
4011
4012static struct atlas7_pad_mux uart3_rts_grp0_pad_mux[] = {
4013 MUX(1, 126, 2, N, N, N, N),
4014};
4015
4016static struct atlas7_grp_mux uart3_rts_grp0_mux = {
4017 .pad_mux_count = ARRAY_SIZE(uart3_rts_grp0_pad_mux),
4018 .pad_mux_list = uart3_rts_grp0_pad_mux,
4019};
4020
4021static struct atlas7_pad_mux uart3_rts_grp1_pad_mux[] = {
4022 MUX(1, 109, 4, N, N, N, N),
4023};
4024
4025static struct atlas7_grp_mux uart3_rts_grp1_mux = {
4026 .pad_mux_count = ARRAY_SIZE(uart3_rts_grp1_pad_mux),
4027 .pad_mux_list = uart3_rts_grp1_pad_mux,
4028};
4029
4030static struct atlas7_pad_mux uart3_rts_grp2_pad_mux[] = {
3014 MUX(1, 139, 2, N, N, N, N), 4031 MUX(1, 139, 2, N, N, N, N),
4032};
4033
4034static struct atlas7_grp_mux uart3_rts_grp2_mux = {
4035 .pad_mux_count = ARRAY_SIZE(uart3_rts_grp2_pad_mux),
4036 .pad_mux_list = uart3_rts_grp2_pad_mux,
4037};
4038
4039static struct atlas7_pad_mux uart3_rxd_grp0_pad_mux[] = {
3015 MUX(1, 138, 1, 0xa00, 5, 0xa80, 5), 4040 MUX(1, 138, 1, 0xa00, 5, 0xa80, 5),
3016 MUX(1, 137, 1, N, N, N, N),
3017}; 4041};
3018 4042
3019static struct atlas7_grp_mux uart3_grp2_mux = { 4043static struct atlas7_grp_mux uart3_rxd_grp0_mux = {
3020 .pad_mux_count = ARRAY_SIZE(uart3_grp2_pad_mux), 4044 .pad_mux_count = ARRAY_SIZE(uart3_rxd_grp0_pad_mux),
3021 .pad_mux_list = uart3_grp2_pad_mux, 4045 .pad_mux_list = uart3_rxd_grp0_pad_mux,
3022}; 4046};
3023 4047
3024static struct atlas7_pad_mux uart3_grp3_pad_mux[] = { 4048static struct atlas7_pad_mux uart3_rxd_grp1_pad_mux[] = {
3025 MUX(1, 139, 2, N, N, N, N),
3026 MUX(1, 140, 2, 0xa08, 0, 0xa88, 0),
3027 MUX(1, 84, 2, 0xa00, 5, 0xa80, 5), 4049 MUX(1, 84, 2, 0xa00, 5, 0xa80, 5),
3028 MUX(1, 83, 2, N, N, N, N),
3029}; 4050};
3030 4051
3031static struct atlas7_grp_mux uart3_grp3_mux = { 4052static struct atlas7_grp_mux uart3_rxd_grp1_mux = {
3032 .pad_mux_count = ARRAY_SIZE(uart3_grp3_pad_mux), 4053 .pad_mux_count = ARRAY_SIZE(uart3_rxd_grp1_pad_mux),
3033 .pad_mux_list = uart3_grp3_pad_mux, 4054 .pad_mux_list = uart3_rxd_grp1_pad_mux,
3034}; 4055};
3035 4056
3036static struct atlas7_pad_mux uart3_nopause_grp0_pad_mux[] = { 4057static struct atlas7_pad_mux uart3_rxd_grp2_pad_mux[] = {
3037 MUX(1, 138, 1, 0xa00, 5, 0xa80, 5), 4058 MUX(1, 162, 3, 0xa00, 5, 0xa80, 5),
4059};
4060
4061static struct atlas7_grp_mux uart3_rxd_grp2_mux = {
4062 .pad_mux_count = ARRAY_SIZE(uart3_rxd_grp2_pad_mux),
4063 .pad_mux_list = uart3_rxd_grp2_pad_mux,
4064};
4065
4066static struct atlas7_pad_mux uart3_txd_grp0_pad_mux[] = {
3038 MUX(1, 137, 1, N, N, N, N), 4067 MUX(1, 137, 1, N, N, N, N),
3039}; 4068};
3040 4069
3041static struct atlas7_grp_mux uart3_nopause_grp0_mux = { 4070static struct atlas7_grp_mux uart3_txd_grp0_mux = {
3042 .pad_mux_count = ARRAY_SIZE(uart3_nopause_grp0_pad_mux), 4071 .pad_mux_count = ARRAY_SIZE(uart3_txd_grp0_pad_mux),
3043 .pad_mux_list = uart3_nopause_grp0_pad_mux, 4072 .pad_mux_list = uart3_txd_grp0_pad_mux,
3044}; 4073};
3045 4074
3046static struct atlas7_pad_mux uart3_nopause_grp1_pad_mux[] = { 4075static struct atlas7_pad_mux uart3_txd_grp1_pad_mux[] = {
3047 MUX(1, 84, 2, 0xa00, 5, 0xa80, 5),
3048 MUX(1, 83, 2, N, N, N, N), 4076 MUX(1, 83, 2, N, N, N, N),
3049}; 4077};
3050 4078
3051static struct atlas7_grp_mux uart3_nopause_grp1_mux = { 4079static struct atlas7_grp_mux uart3_txd_grp1_mux = {
3052 .pad_mux_count = ARRAY_SIZE(uart3_nopause_grp1_pad_mux), 4080 .pad_mux_count = ARRAY_SIZE(uart3_txd_grp1_pad_mux),
3053 .pad_mux_list = uart3_nopause_grp1_pad_mux, 4081 .pad_mux_list = uart3_txd_grp1_pad_mux,
3054}; 4082};
3055 4083
3056static struct atlas7_pad_mux uart4_grp0_pad_mux[] = { 4084static struct atlas7_pad_mux uart3_txd_grp2_pad_mux[] = {
3057 MUX(1, 122, 4, 0xa08, 1, 0xa88, 1), 4085 MUX(1, 161, 3, N, N, N, N),
3058 MUX(1, 123, 4, N, N, N, N), 4086};
4087
4088static struct atlas7_grp_mux uart3_txd_grp2_mux = {
4089 .pad_mux_count = ARRAY_SIZE(uart3_txd_grp2_pad_mux),
4090 .pad_mux_list = uart3_txd_grp2_pad_mux,
4091};
4092
4093static struct atlas7_pad_mux uart4_basic_grp_pad_mux[] = {
3059 MUX(1, 140, 1, N, N, N, N), 4094 MUX(1, 140, 1, N, N, N, N),
3060 MUX(1, 139, 1, N, N, N, N), 4095 MUX(1, 139, 1, N, N, N, N),
3061}; 4096};
3062 4097
3063static struct atlas7_grp_mux uart4_grp0_mux = { 4098static struct atlas7_grp_mux uart4_basic_grp_mux = {
3064 .pad_mux_count = ARRAY_SIZE(uart4_grp0_pad_mux), 4099 .pad_mux_count = ARRAY_SIZE(uart4_basic_grp_pad_mux),
3065 .pad_mux_list = uart4_grp0_pad_mux, 4100 .pad_mux_list = uart4_basic_grp_pad_mux,
4101};
4102
4103static struct atlas7_pad_mux uart4_cts_grp0_pad_mux[] = {
4104 MUX(1, 122, 4, 0xa08, 1, 0xa88, 1),
4105};
4106
4107static struct atlas7_grp_mux uart4_cts_grp0_mux = {
4108 .pad_mux_count = ARRAY_SIZE(uart4_cts_grp0_pad_mux),
4109 .pad_mux_list = uart4_cts_grp0_pad_mux,
3066}; 4110};
3067 4111
3068static struct atlas7_pad_mux uart4_grp1_pad_mux[] = { 4112static struct atlas7_pad_mux uart4_cts_grp1_pad_mux[] = {
3069 MUX(1, 100, 4, 0xa08, 1, 0xa88, 1), 4113 MUX(1, 100, 4, 0xa08, 1, 0xa88, 1),
3070 MUX(1, 99, 4, N, N, N, N),
3071 MUX(1, 140, 1, N, N, N, N),
3072 MUX(1, 139, 1, N, N, N, N),
3073}; 4114};
3074 4115
3075static struct atlas7_grp_mux uart4_grp1_mux = { 4116static struct atlas7_grp_mux uart4_cts_grp1_mux = {
3076 .pad_mux_count = ARRAY_SIZE(uart4_grp1_pad_mux), 4117 .pad_mux_count = ARRAY_SIZE(uart4_cts_grp1_pad_mux),
3077 .pad_mux_list = uart4_grp1_pad_mux, 4118 .pad_mux_list = uart4_cts_grp1_pad_mux,
3078}; 4119};
3079 4120
3080static struct atlas7_pad_mux uart4_grp2_pad_mux[] = { 4121static struct atlas7_pad_mux uart4_cts_grp2_pad_mux[] = {
3081 MUX(1, 117, 2, 0xa08, 1, 0xa88, 1), 4122 MUX(1, 117, 2, 0xa08, 1, 0xa88, 1),
3082 MUX(1, 116, 2, N, N, N, N),
3083 MUX(1, 140, 1, N, N, N, N),
3084 MUX(1, 139, 1, N, N, N, N),
3085}; 4123};
3086 4124
3087static struct atlas7_grp_mux uart4_grp2_mux = { 4125static struct atlas7_grp_mux uart4_cts_grp2_mux = {
3088 .pad_mux_count = ARRAY_SIZE(uart4_grp2_pad_mux), 4126 .pad_mux_count = ARRAY_SIZE(uart4_cts_grp2_pad_mux),
3089 .pad_mux_list = uart4_grp2_pad_mux, 4127 .pad_mux_list = uart4_cts_grp2_pad_mux,
3090}; 4128};
3091 4129
3092static struct atlas7_pad_mux uart4_nopause_grp_pad_mux[] = { 4130static struct atlas7_pad_mux uart4_rts_grp0_pad_mux[] = {
3093 MUX(1, 140, 1, N, N, N, N), 4131 MUX(1, 123, 4, N, N, N, N),
3094 MUX(1, 139, 1, N, N, N, N),
3095}; 4132};
3096 4133
3097static struct atlas7_grp_mux uart4_nopause_grp_mux = { 4134static struct atlas7_grp_mux uart4_rts_grp0_mux = {
3098 .pad_mux_count = ARRAY_SIZE(uart4_nopause_grp_pad_mux), 4135 .pad_mux_count = ARRAY_SIZE(uart4_rts_grp0_pad_mux),
3099 .pad_mux_list = uart4_nopause_grp_pad_mux, 4136 .pad_mux_list = uart4_rts_grp0_pad_mux,
3100}; 4137};
3101 4138
3102static struct atlas7_pad_mux usb0_drvvbus_grp_pad_mux[] = { 4139static struct atlas7_pad_mux uart4_rts_grp1_pad_mux[] = {
4140 MUX(1, 99, 4, N, N, N, N),
4141};
4142
4143static struct atlas7_grp_mux uart4_rts_grp1_mux = {
4144 .pad_mux_count = ARRAY_SIZE(uart4_rts_grp1_pad_mux),
4145 .pad_mux_list = uart4_rts_grp1_pad_mux,
4146};
4147
4148static struct atlas7_pad_mux uart4_rts_grp2_pad_mux[] = {
4149 MUX(1, 116, 2, N, N, N, N),
4150};
4151
4152static struct atlas7_grp_mux uart4_rts_grp2_mux = {
4153 .pad_mux_count = ARRAY_SIZE(uart4_rts_grp2_pad_mux),
4154 .pad_mux_list = uart4_rts_grp2_pad_mux,
4155};
4156
4157static struct atlas7_pad_mux usb0_drvvbus_grp0_pad_mux[] = {
3103 MUX(1, 51, 2, N, N, N, N), 4158 MUX(1, 51, 2, N, N, N, N),
3104}; 4159};
3105 4160
3106static struct atlas7_grp_mux usb0_drvvbus_grp_mux = { 4161static struct atlas7_grp_mux usb0_drvvbus_grp0_mux = {
3107 .pad_mux_count = ARRAY_SIZE(usb0_drvvbus_grp_pad_mux), 4162 .pad_mux_count = ARRAY_SIZE(usb0_drvvbus_grp0_pad_mux),
3108 .pad_mux_list = usb0_drvvbus_grp_pad_mux, 4163 .pad_mux_list = usb0_drvvbus_grp0_pad_mux,
4164};
4165
4166static struct atlas7_pad_mux usb0_drvvbus_grp1_pad_mux[] = {
4167 MUX(1, 162, 7, N, N, N, N),
3109}; 4168};
3110 4169
3111static struct atlas7_pad_mux usb1_drvvbus_grp_pad_mux[] = { 4170static struct atlas7_grp_mux usb0_drvvbus_grp1_mux = {
4171 .pad_mux_count = ARRAY_SIZE(usb0_drvvbus_grp1_pad_mux),
4172 .pad_mux_list = usb0_drvvbus_grp1_pad_mux,
4173};
4174
4175static struct atlas7_pad_mux usb1_drvvbus_grp0_pad_mux[] = {
3112 MUX(1, 134, 2, N, N, N, N), 4176 MUX(1, 134, 2, N, N, N, N),
3113}; 4177};
3114 4178
3115static struct atlas7_grp_mux usb1_drvvbus_grp_mux = { 4179static struct atlas7_grp_mux usb1_drvvbus_grp0_mux = {
3116 .pad_mux_count = ARRAY_SIZE(usb1_drvvbus_grp_pad_mux), 4180 .pad_mux_count = ARRAY_SIZE(usb1_drvvbus_grp0_pad_mux),
3117 .pad_mux_list = usb1_drvvbus_grp_pad_mux, 4181 .pad_mux_list = usb1_drvvbus_grp0_pad_mux,
4182};
4183
4184static struct atlas7_pad_mux usb1_drvvbus_grp1_pad_mux[] = {
4185 MUX(1, 163, 2, N, N, N, N),
4186};
4187
4188static struct atlas7_grp_mux usb1_drvvbus_grp1_mux = {
4189 .pad_mux_count = ARRAY_SIZE(usb1_drvvbus_grp1_pad_mux),
4190 .pad_mux_list = usb1_drvvbus_grp1_pad_mux,
3118}; 4191};
3119 4192
3120static struct atlas7_pad_mux visbus_dout_grp_pad_mux[] = { 4193static struct atlas7_pad_mux visbus_dout_grp_pad_mux[] = {
@@ -3252,11 +4325,20 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3252 FUNCTION("sdio_i2s_gpio", sdio_i2s_gpio_grp, &sdio_i2s_gpio_grp_mux), 4325 FUNCTION("sdio_i2s_gpio", sdio_i2s_gpio_grp, &sdio_i2s_gpio_grp_mux),
3253 FUNCTION("sp_rgmii_gpio", sp_rgmii_gpio_grp, &sp_rgmii_gpio_grp_mux), 4326 FUNCTION("sp_rgmii_gpio", sp_rgmii_gpio_grp, &sp_rgmii_gpio_grp_mux),
3254 FUNCTION("lvds_gpio", lvds_gpio_grp, &lvds_gpio_grp_mux), 4327 FUNCTION("lvds_gpio", lvds_gpio_grp, &lvds_gpio_grp_mux),
3255 FUNCTION("uart_nand_gpio", 4328 FUNCTION("jtag_uart_nand_gpio",
3256 uart_nand_gpio_grp, 4329 jtag_uart_nand_gpio_grp,
3257 &uart_nand_gpio_grp_mux), 4330 &jtag_uart_nand_gpio_grp_mux),
3258 FUNCTION("rtc_gpio", rtc_gpio_grp, &rtc_gpio_grp_mux), 4331 FUNCTION("rtc_gpio", rtc_gpio_grp, &rtc_gpio_grp_mux),
3259 FUNCTION("audio_ac97", audio_ac97_grp, &audio_ac97_grp_mux), 4332 FUNCTION("audio_ac97", audio_ac97_grp, &audio_ac97_grp_mux),
4333 FUNCTION("audio_digmic_m0",
4334 audio_digmic_grp0,
4335 &audio_digmic_grp0_mux),
4336 FUNCTION("audio_digmic_m1",
4337 audio_digmic_grp1,
4338 &audio_digmic_grp1_mux),
4339 FUNCTION("audio_digmic_m2",
4340 audio_digmic_grp2,
4341 &audio_digmic_grp2_mux),
3260 FUNCTION("audio_func_dbg", 4342 FUNCTION("audio_func_dbg",
3261 audio_func_dbg_grp, 4343 audio_func_dbg_grp,
3262 &audio_func_dbg_grp_mux), 4344 &audio_func_dbg_grp_mux),
@@ -3265,16 +4347,119 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3265 FUNCTION("audio_i2s_extclk", 4347 FUNCTION("audio_i2s_extclk",
3266 audio_i2s_extclk_grp, 4348 audio_i2s_extclk_grp,
3267 &audio_i2s_extclk_grp_mux), 4349 &audio_i2s_extclk_grp_mux),
3268 FUNCTION("audio_uart0", audio_uart0_grp, &audio_uart0_grp_mux), 4350 FUNCTION("audio_spdif_out_m0",
3269 FUNCTION("audio_uart1", audio_uart1_grp, &audio_uart1_grp_mux), 4351 audio_spdif_out_grp0,
3270 FUNCTION("audio_uart2_m0", audio_uart2_grp0, &audio_uart2_grp0_mux), 4352 &audio_spdif_out_grp0_mux),
3271 FUNCTION("audio_uart2_m1", audio_uart2_grp1, &audio_uart2_grp1_mux), 4353 FUNCTION("audio_spdif_out_m1",
3272 FUNCTION("c_can_trnsvr", c_can_trnsvr_grp, &c_can_trnsvr_grp_mux), 4354 audio_spdif_out_grp1,
3273 FUNCTION("c0_can_m0", c0_can_grp0, &c0_can_grp0_mux), 4355 &audio_spdif_out_grp1_mux),
3274 FUNCTION("c0_can_m1", c0_can_grp1, &c0_can_grp1_mux), 4356 FUNCTION("audio_spdif_out_m2",
3275 FUNCTION("c1_can_m0", c1_can_grp0, &c1_can_grp0_mux), 4357 audio_spdif_out_grp2,
3276 FUNCTION("c1_can_m1", c1_can_grp1, &c1_can_grp1_mux), 4358 &audio_spdif_out_grp2_mux),
3277 FUNCTION("c1_can_m2", c1_can_grp2, &c1_can_grp2_mux), 4359 FUNCTION("audio_uart0_basic",
4360 audio_uart0_basic_grp,
4361 &audio_uart0_basic_grp_mux),
4362 FUNCTION("audio_uart0_urfs_m0",
4363 audio_uart0_urfs_grp0,
4364 &audio_uart0_urfs_grp0_mux),
4365 FUNCTION("audio_uart0_urfs_m1",
4366 audio_uart0_urfs_grp1,
4367 &audio_uart0_urfs_grp1_mux),
4368 FUNCTION("audio_uart0_urfs_m2",
4369 audio_uart0_urfs_grp2,
4370 &audio_uart0_urfs_grp2_mux),
4371 FUNCTION("audio_uart0_urfs_m3",
4372 audio_uart0_urfs_grp3,
4373 &audio_uart0_urfs_grp3_mux),
4374 FUNCTION("audio_uart1_basic",
4375 audio_uart1_basic_grp,
4376 &audio_uart1_basic_grp_mux),
4377 FUNCTION("audio_uart1_urfs_m0",
4378 audio_uart1_urfs_grp0,
4379 &audio_uart1_urfs_grp0_mux),
4380 FUNCTION("audio_uart1_urfs_m1",
4381 audio_uart1_urfs_grp1,
4382 &audio_uart1_urfs_grp1_mux),
4383 FUNCTION("audio_uart1_urfs_m2",
4384 audio_uart1_urfs_grp2,
4385 &audio_uart1_urfs_grp2_mux),
4386 FUNCTION("audio_uart2_urfs_m0",
4387 audio_uart2_urfs_grp0,
4388 &audio_uart2_urfs_grp0_mux),
4389 FUNCTION("audio_uart2_urfs_m1",
4390 audio_uart2_urfs_grp1,
4391 &audio_uart2_urfs_grp1_mux),
4392 FUNCTION("audio_uart2_urfs_m2",
4393 audio_uart2_urfs_grp2,
4394 &audio_uart2_urfs_grp2_mux),
4395 FUNCTION("audio_uart2_urxd_m0",
4396 audio_uart2_urxd_grp0,
4397 &audio_uart2_urxd_grp0_mux),
4398 FUNCTION("audio_uart2_urxd_m1",
4399 audio_uart2_urxd_grp1,
4400 &audio_uart2_urxd_grp1_mux),
4401 FUNCTION("audio_uart2_urxd_m2",
4402 audio_uart2_urxd_grp2,
4403 &audio_uart2_urxd_grp2_mux),
4404 FUNCTION("audio_uart2_usclk_m0",
4405 audio_uart2_usclk_grp0,
4406 &audio_uart2_usclk_grp0_mux),
4407 FUNCTION("audio_uart2_usclk_m1",
4408 audio_uart2_usclk_grp1,
4409 &audio_uart2_usclk_grp1_mux),
4410 FUNCTION("audio_uart2_usclk_m2",
4411 audio_uart2_usclk_grp2,
4412 &audio_uart2_usclk_grp2_mux),
4413 FUNCTION("audio_uart2_utfs_m0",
4414 audio_uart2_utfs_grp0,
4415 &audio_uart2_utfs_grp0_mux),
4416 FUNCTION("audio_uart2_utfs_m1",
4417 audio_uart2_utfs_grp1,
4418 &audio_uart2_utfs_grp1_mux),
4419 FUNCTION("audio_uart2_utfs_m2",
4420 audio_uart2_utfs_grp2,
4421 &audio_uart2_utfs_grp2_mux),
4422 FUNCTION("audio_uart2_utxd_m0",
4423 audio_uart2_utxd_grp0,
4424 &audio_uart2_utxd_grp0_mux),
4425 FUNCTION("audio_uart2_utxd_m1",
4426 audio_uart2_utxd_grp1,
4427 &audio_uart2_utxd_grp1_mux),
4428 FUNCTION("audio_uart2_utxd_m2",
4429 audio_uart2_utxd_grp2,
4430 &audio_uart2_utxd_grp2_mux),
4431 FUNCTION("c_can_trnsvr_en_m0",
4432 c_can_trnsvr_en_grp0,
4433 &c_can_trnsvr_en_grp0_mux),
4434 FUNCTION("c_can_trnsvr_en_m1",
4435 c_can_trnsvr_en_grp1,
4436 &c_can_trnsvr_en_grp1_mux),
4437 FUNCTION("c_can_trnsvr_intr",
4438 c_can_trnsvr_intr_grp,
4439 &c_can_trnsvr_intr_grp_mux),
4440 FUNCTION("c_can_trnsvr_stb_n",
4441 c_can_trnsvr_stb_n_grp,
4442 &c_can_trnsvr_stb_n_grp_mux),
4443 FUNCTION("c0_can_rxd_trnsv0",
4444 c0_can_rxd_trnsv0_grp,
4445 &c0_can_rxd_trnsv0_grp_mux),
4446 FUNCTION("c0_can_rxd_trnsv1",
4447 c0_can_rxd_trnsv1_grp,
4448 &c0_can_rxd_trnsv1_grp_mux),
4449 FUNCTION("c0_can_txd_trnsv0",
4450 c0_can_txd_trnsv0_grp,
4451 &c0_can_txd_trnsv0_grp_mux),
4452 FUNCTION("c0_can_txd_trnsv1",
4453 c0_can_txd_trnsv1_grp,
4454 &c0_can_txd_trnsv1_grp_mux),
4455 FUNCTION("c1_can_rxd_m0", c1_can_rxd_grp0, &c1_can_rxd_grp0_mux),
4456 FUNCTION("c1_can_rxd_m1", c1_can_rxd_grp1, &c1_can_rxd_grp1_mux),
4457 FUNCTION("c1_can_rxd_m2", c1_can_rxd_grp2, &c1_can_rxd_grp2_mux),
4458 FUNCTION("c1_can_rxd_m3", c1_can_rxd_grp3, &c1_can_rxd_grp3_mux),
4459 FUNCTION("c1_can_txd_m0", c1_can_txd_grp0, &c1_can_txd_grp0_mux),
4460 FUNCTION("c1_can_txd_m1", c1_can_txd_grp1, &c1_can_txd_grp1_mux),
4461 FUNCTION("c1_can_txd_m2", c1_can_txd_grp2, &c1_can_txd_grp2_mux),
4462 FUNCTION("c1_can_txd_m3", c1_can_txd_grp3, &c1_can_txd_grp3_mux),
3278 FUNCTION("ca_audio_lpc", ca_audio_lpc_grp, &ca_audio_lpc_grp_mux), 4463 FUNCTION("ca_audio_lpc", ca_audio_lpc_grp, &ca_audio_lpc_grp_mux),
3279 FUNCTION("ca_bt_lpc", ca_bt_lpc_grp, &ca_bt_lpc_grp_mux), 4464 FUNCTION("ca_bt_lpc", ca_bt_lpc_grp, &ca_bt_lpc_grp_mux),
3280 FUNCTION("ca_coex", ca_coex_grp, &ca_coex_grp_mux), 4465 FUNCTION("ca_coex", ca_coex_grp, &ca_coex_grp_mux),
@@ -3377,7 +4562,35 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3377 &gn_trg_shutdown_grp3_mux), 4562 &gn_trg_shutdown_grp3_mux),
3378 FUNCTION("i2c0", i2c0_grp, &i2c0_grp_mux), 4563 FUNCTION("i2c0", i2c0_grp, &i2c0_grp_mux),
3379 FUNCTION("i2c1", i2c1_grp, &i2c1_grp_mux), 4564 FUNCTION("i2c1", i2c1_grp, &i2c1_grp_mux),
3380 FUNCTION("jtag_m0", jtag_grp0, &jtag_grp0_mux), 4565 FUNCTION("i2s0", i2s0_grp, &i2s0_grp_mux),
4566 FUNCTION("i2s1_basic", i2s1_basic_grp, &i2s1_basic_grp_mux),
4567 FUNCTION("i2s1_rxd0_m0", i2s1_rxd0_grp0, &i2s1_rxd0_grp0_mux),
4568 FUNCTION("i2s1_rxd0_m1", i2s1_rxd0_grp1, &i2s1_rxd0_grp1_mux),
4569 FUNCTION("i2s1_rxd0_m2", i2s1_rxd0_grp2, &i2s1_rxd0_grp2_mux),
4570 FUNCTION("i2s1_rxd0_m3", i2s1_rxd0_grp3, &i2s1_rxd0_grp3_mux),
4571 FUNCTION("i2s1_rxd0_m4", i2s1_rxd0_grp4, &i2s1_rxd0_grp4_mux),
4572 FUNCTION("i2s1_rxd1_m0", i2s1_rxd1_grp0, &i2s1_rxd1_grp0_mux),
4573 FUNCTION("i2s1_rxd1_m1", i2s1_rxd1_grp1, &i2s1_rxd1_grp1_mux),
4574 FUNCTION("i2s1_rxd1_m2", i2s1_rxd1_grp2, &i2s1_rxd1_grp2_mux),
4575 FUNCTION("i2s1_rxd1_m3", i2s1_rxd1_grp3, &i2s1_rxd1_grp3_mux),
4576 FUNCTION("i2s1_rxd1_m4", i2s1_rxd1_grp4, &i2s1_rxd1_grp4_mux),
4577 FUNCTION("jtag_jt_dbg_nsrst",
4578 jtag_jt_dbg_nsrst_grp,
4579 &jtag_jt_dbg_nsrst_grp_mux),
4580 FUNCTION("jtag_ntrst_m0", jtag_ntrst_grp0, &jtag_ntrst_grp0_mux),
4581 FUNCTION("jtag_ntrst_m1", jtag_ntrst_grp1, &jtag_ntrst_grp1_mux),
4582 FUNCTION("jtag_swdiotms_m0",
4583 jtag_swdiotms_grp0,
4584 &jtag_swdiotms_grp0_mux),
4585 FUNCTION("jtag_swdiotms_m1",
4586 jtag_swdiotms_grp1,
4587 &jtag_swdiotms_grp1_mux),
4588 FUNCTION("jtag_tck_m0", jtag_tck_grp0, &jtag_tck_grp0_mux),
4589 FUNCTION("jtag_tck_m1", jtag_tck_grp1, &jtag_tck_grp1_mux),
4590 FUNCTION("jtag_tdi_m0", jtag_tdi_grp0, &jtag_tdi_grp0_mux),
4591 FUNCTION("jtag_tdi_m1", jtag_tdi_grp1, &jtag_tdi_grp1_mux),
4592 FUNCTION("jtag_tdo_m0", jtag_tdo_grp0, &jtag_tdo_grp0_mux),
4593 FUNCTION("jtag_tdo_m1", jtag_tdo_grp1, &jtag_tdo_grp1_mux),
3381 FUNCTION("ks_kas_spi_m0", ks_kas_spi_grp0, &ks_kas_spi_grp0_mux), 4594 FUNCTION("ks_kas_spi_m0", ks_kas_spi_grp0, &ks_kas_spi_grp0_mux),
3382 FUNCTION("ld_ldd", ld_ldd_grp, &ld_ldd_grp_mux), 4595 FUNCTION("ld_ldd", ld_ldd_grp, &ld_ldd_grp_mux),
3383 FUNCTION("ld_ldd_16bit", ld_ldd_16bit_grp, &ld_ldd_16bit_grp_mux), 4596 FUNCTION("ld_ldd_16bit", ld_ldd_16bit_grp, &ld_ldd_16bit_grp_mux),
@@ -3414,18 +4627,27 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3414 FUNCTION("pw_cko0_m0", pw_cko0_grp0, &pw_cko0_grp0_mux), 4627 FUNCTION("pw_cko0_m0", pw_cko0_grp0, &pw_cko0_grp0_mux),
3415 FUNCTION("pw_cko0_m1", pw_cko0_grp1, &pw_cko0_grp1_mux), 4628 FUNCTION("pw_cko0_m1", pw_cko0_grp1, &pw_cko0_grp1_mux),
3416 FUNCTION("pw_cko0_m2", pw_cko0_grp2, &pw_cko0_grp2_mux), 4629 FUNCTION("pw_cko0_m2", pw_cko0_grp2, &pw_cko0_grp2_mux),
4630 FUNCTION("pw_cko0_m3", pw_cko0_grp3, &pw_cko0_grp3_mux),
3417 FUNCTION("pw_cko1_m0", pw_cko1_grp0, &pw_cko1_grp0_mux), 4631 FUNCTION("pw_cko1_m0", pw_cko1_grp0, &pw_cko1_grp0_mux),
3418 FUNCTION("pw_cko1_m1", pw_cko1_grp1, &pw_cko1_grp1_mux), 4632 FUNCTION("pw_cko1_m1", pw_cko1_grp1, &pw_cko1_grp1_mux),
4633 FUNCTION("pw_cko1_m2", pw_cko1_grp2, &pw_cko1_grp2_mux),
3419 FUNCTION("pw_i2s01_clk_m0", 4634 FUNCTION("pw_i2s01_clk_m0",
3420 pw_i2s01_clk_grp0, 4635 pw_i2s01_clk_grp0,
3421 &pw_i2s01_clk_grp0_mux), 4636 &pw_i2s01_clk_grp0_mux),
3422 FUNCTION("pw_i2s01_clk_m1", 4637 FUNCTION("pw_i2s01_clk_m1",
3423 pw_i2s01_clk_grp1, 4638 pw_i2s01_clk_grp1,
3424 &pw_i2s01_clk_grp1_mux), 4639 &pw_i2s01_clk_grp1_mux),
3425 FUNCTION("pw_pwm0", pw_pwm0_grp, &pw_pwm0_grp_mux), 4640 FUNCTION("pw_i2s01_clk_m2",
3426 FUNCTION("pw_pwm1", pw_pwm1_grp, &pw_pwm1_grp_mux), 4641 pw_i2s01_clk_grp2,
4642 &pw_i2s01_clk_grp2_mux),
4643 FUNCTION("pw_pwm0_m0", pw_pwm0_grp0, &pw_pwm0_grp0_mux),
4644 FUNCTION("pw_pwm0_m1", pw_pwm0_grp1, &pw_pwm0_grp1_mux),
4645 FUNCTION("pw_pwm1_m0", pw_pwm1_grp0, &pw_pwm1_grp0_mux),
4646 FUNCTION("pw_pwm1_m1", pw_pwm1_grp1, &pw_pwm1_grp1_mux),
4647 FUNCTION("pw_pwm1_m2", pw_pwm1_grp2, &pw_pwm1_grp2_mux),
3427 FUNCTION("pw_pwm2_m0", pw_pwm2_grp0, &pw_pwm2_grp0_mux), 4648 FUNCTION("pw_pwm2_m0", pw_pwm2_grp0, &pw_pwm2_grp0_mux),
3428 FUNCTION("pw_pwm2_m1", pw_pwm2_grp1, &pw_pwm2_grp1_mux), 4649 FUNCTION("pw_pwm2_m1", pw_pwm2_grp1, &pw_pwm2_grp1_mux),
4650 FUNCTION("pw_pwm2_m2", pw_pwm2_grp2, &pw_pwm2_grp2_mux),
3429 FUNCTION("pw_pwm3_m0", pw_pwm3_grp0, &pw_pwm3_grp0_mux), 4651 FUNCTION("pw_pwm3_m0", pw_pwm3_grp0, &pw_pwm3_grp0_mux),
3430 FUNCTION("pw_pwm3_m1", pw_pwm3_grp1, &pw_pwm3_grp1_mux), 4652 FUNCTION("pw_pwm3_m1", pw_pwm3_grp1, &pw_pwm3_grp1_mux),
3431 FUNCTION("pw_pwm_cpu_vol_m0", 4653 FUNCTION("pw_pwm_cpu_vol_m0",
@@ -3434,6 +4656,9 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3434 FUNCTION("pw_pwm_cpu_vol_m1", 4656 FUNCTION("pw_pwm_cpu_vol_m1",
3435 pw_pwm_cpu_vol_grp1, 4657 pw_pwm_cpu_vol_grp1,
3436 &pw_pwm_cpu_vol_grp1_mux), 4658 &pw_pwm_cpu_vol_grp1_mux),
4659 FUNCTION("pw_pwm_cpu_vol_m2",
4660 pw_pwm_cpu_vol_grp2,
4661 &pw_pwm_cpu_vol_grp2_mux),
3437 FUNCTION("pw_backlight_m0", 4662 FUNCTION("pw_backlight_m0",
3438 pw_backlight_grp0, 4663 pw_backlight_grp0,
3439 &pw_backlight_grp0_mux), 4664 &pw_backlight_grp0_mux),
@@ -3456,8 +4681,11 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3456 FUNCTION("sd1", sd1_grp, &sd1_grp_mux), 4681 FUNCTION("sd1", sd1_grp, &sd1_grp_mux),
3457 FUNCTION("sd1_4bit_m0", sd1_4bit_grp0, &sd1_4bit_grp0_mux), 4682 FUNCTION("sd1_4bit_m0", sd1_4bit_grp0, &sd1_4bit_grp0_mux),
3458 FUNCTION("sd1_4bit_m1", sd1_4bit_grp1, &sd1_4bit_grp1_mux), 4683 FUNCTION("sd1_4bit_m1", sd1_4bit_grp1, &sd1_4bit_grp1_mux),
3459 FUNCTION("sd2_m0", sd2_grp0, &sd2_grp0_mux), 4684 FUNCTION("sd2_basic", sd2_basic_grp, &sd2_basic_grp_mux),
3460 FUNCTION("sd2_no_cdb_m0", sd2_no_cdb_grp0, &sd2_no_cdb_grp0_mux), 4685 FUNCTION("sd2_cdb_m0", sd2_cdb_grp0, &sd2_cdb_grp0_mux),
4686 FUNCTION("sd2_cdb_m1", sd2_cdb_grp1, &sd2_cdb_grp1_mux),
4687 FUNCTION("sd2_wpb_m0", sd2_wpb_grp0, &sd2_wpb_grp0_mux),
4688 FUNCTION("sd2_wpb_m1", sd2_wpb_grp1, &sd2_wpb_grp1_mux),
3461 FUNCTION("sd3", sd3_grp, &sd3_grp_mux), 4689 FUNCTION("sd3", sd3_grp, &sd3_grp_mux),
3462 FUNCTION("sd5", sd5_grp, &sd5_grp_mux), 4690 FUNCTION("sd5", sd5_grp, &sd5_grp_mux),
3463 FUNCTION("sd6_m0", sd6_grp0, &sd6_grp0_mux), 4691 FUNCTION("sd6_m0", sd6_grp0, &sd6_grp0_mux),
@@ -3471,23 +4699,47 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
3471 FUNCTION("uart0", uart0_grp, &uart0_grp_mux), 4699 FUNCTION("uart0", uart0_grp, &uart0_grp_mux),
3472 FUNCTION("uart0_nopause", uart0_nopause_grp, &uart0_nopause_grp_mux), 4700 FUNCTION("uart0_nopause", uart0_nopause_grp, &uart0_nopause_grp_mux),
3473 FUNCTION("uart1", uart1_grp, &uart1_grp_mux), 4701 FUNCTION("uart1", uart1_grp, &uart1_grp_mux),
3474 FUNCTION("uart2", uart2_grp, &uart2_grp_mux), 4702 FUNCTION("uart2_cts_m0", uart2_cts_grp0, &uart2_cts_grp0_mux),
3475 FUNCTION("uart3_m0", uart3_grp0, &uart3_grp0_mux), 4703 FUNCTION("uart2_cts_m1", uart2_cts_grp1, &uart2_cts_grp1_mux),
3476 FUNCTION("uart3_m1", uart3_grp1, &uart3_grp1_mux), 4704 FUNCTION("uart2_rts_m0", uart2_rts_grp0, &uart2_rts_grp0_mux),
3477 FUNCTION("uart3_m2", uart3_grp2, &uart3_grp2_mux), 4705 FUNCTION("uart2_rts_m1", uart2_rts_grp1, &uart2_rts_grp1_mux),
3478 FUNCTION("uart3_m3", uart3_grp3, &uart3_grp3_mux), 4706 FUNCTION("uart2_rxd_m0", uart2_rxd_grp0, &uart2_rxd_grp0_mux),
3479 FUNCTION("uart3_nopause_m0", 4707 FUNCTION("uart2_rxd_m1", uart2_rxd_grp1, &uart2_rxd_grp1_mux),
3480 uart3_nopause_grp0, 4708 FUNCTION("uart2_rxd_m2", uart2_rxd_grp2, &uart2_rxd_grp2_mux),
3481 &uart3_nopause_grp0_mux), 4709 FUNCTION("uart2_txd_m0", uart2_txd_grp0, &uart2_txd_grp0_mux),
3482 FUNCTION("uart3_nopause_m1", 4710 FUNCTION("uart2_txd_m1", uart2_txd_grp1, &uart2_txd_grp1_mux),
3483 uart3_nopause_grp1, 4711 FUNCTION("uart2_txd_m2", uart2_txd_grp2, &uart2_txd_grp2_mux),
3484 &uart3_nopause_grp1_mux), 4712 FUNCTION("uart3_cts_m0", uart3_cts_grp0, &uart3_cts_grp0_mux),
3485 FUNCTION("uart4_m0", uart4_grp0, &uart4_grp0_mux), 4713 FUNCTION("uart3_cts_m1", uart3_cts_grp1, &uart3_cts_grp1_mux),
3486 FUNCTION("uart4_m1", uart4_grp1, &uart4_grp1_mux), 4714 FUNCTION("uart3_cts_m2", uart3_cts_grp2, &uart3_cts_grp2_mux),
3487 FUNCTION("uart4_m2", uart4_grp2, &uart4_grp2_mux), 4715 FUNCTION("uart3_rts_m0", uart3_rts_grp0, &uart3_rts_grp0_mux),
3488 FUNCTION("uart4_nopause", uart4_nopause_grp, &uart4_nopause_grp_mux), 4716 FUNCTION("uart3_rts_m1", uart3_rts_grp1, &uart3_rts_grp1_mux),
3489 FUNCTION("usb0_drvvbus", usb0_drvvbus_grp, &usb0_drvvbus_grp_mux), 4717 FUNCTION("uart3_rts_m2", uart3_rts_grp2, &uart3_rts_grp2_mux),
3490 FUNCTION("usb1_drvvbus", usb1_drvvbus_grp, &usb1_drvvbus_grp_mux), 4718 FUNCTION("uart3_rxd_m0", uart3_rxd_grp0, &uart3_rxd_grp0_mux),
4719 FUNCTION("uart3_rxd_m1", uart3_rxd_grp1, &uart3_rxd_grp1_mux),
4720 FUNCTION("uart3_rxd_m2", uart3_rxd_grp2, &uart3_rxd_grp2_mux),
4721 FUNCTION("uart3_txd_m0", uart3_txd_grp0, &uart3_txd_grp0_mux),
4722 FUNCTION("uart3_txd_m1", uart3_txd_grp1, &uart3_txd_grp1_mux),
4723 FUNCTION("uart3_txd_m2", uart3_txd_grp2, &uart3_txd_grp2_mux),
4724 FUNCTION("uart4_basic", uart4_basic_grp, &uart4_basic_grp_mux),
4725 FUNCTION("uart4_cts_m0", uart4_cts_grp0, &uart4_cts_grp0_mux),
4726 FUNCTION("uart4_cts_m1", uart4_cts_grp1, &uart4_cts_grp1_mux),
4727 FUNCTION("uart4_cts_m2", uart4_cts_grp2, &uart4_cts_grp2_mux),
4728 FUNCTION("uart4_rts_m0", uart4_rts_grp0, &uart4_rts_grp0_mux),
4729 FUNCTION("uart4_rts_m1", uart4_rts_grp1, &uart4_rts_grp1_mux),
4730 FUNCTION("uart4_rts_m2", uart4_rts_grp2, &uart4_rts_grp2_mux),
4731 FUNCTION("usb0_drvvbus_m0",
4732 usb0_drvvbus_grp0,
4733 &usb0_drvvbus_grp0_mux),
4734 FUNCTION("usb0_drvvbus_m1",
4735 usb0_drvvbus_grp1,
4736 &usb0_drvvbus_grp1_mux),
4737 FUNCTION("usb1_drvvbus_m0",
4738 usb1_drvvbus_grp0,
4739 &usb1_drvvbus_grp0_mux),
4740 FUNCTION("usb1_drvvbus_m1",
4741 usb1_drvvbus_grp1,
4742 &usb1_drvvbus_grp1_mux),
3491 FUNCTION("visbus_dout", visbus_dout_grp, &visbus_dout_grp_mux), 4743 FUNCTION("visbus_dout", visbus_dout_grp, &visbus_dout_grp_mux),
3492 FUNCTION("vi_vip1", vi_vip1_grp, &vi_vip1_grp_mux), 4744 FUNCTION("vi_vip1", vi_vip1_grp, &vi_vip1_grp_mux),
3493 FUNCTION("vi_vip1_ext", vi_vip1_ext_grp, &vi_vip1_ext_grp_mux), 4745 FUNCTION("vi_vip1_ext", vi_vip1_ext_grp, &vi_vip1_ext_grp_mux),
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 23:44:11 -0500