pinctrl: tegra: add support for rcv-sel and drive type

NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e.
rcv-sel and drive type.

rcv-sel: Select between High and Normal VIL/VIH receivers.
	RCVR_SEL=1: High VIL/VIH
	RCVR_SEL=0: Normal VIL/VIH

drv_type: Ouptput drive type:
	33-50 ohm driver: 0x1
	66-100ohm driver: 0x0

Add support of these parameters to be configure from DTS file.

Tegra20 and Tegra30 does not support this configuration and hence initialize their
pinmux structure with reg = -1.

Originally written by Pritesh Raithatha.
Changes by ldewangan:
	- remove drvtype_width as it is always 2.
	- Better describe the change.

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 14 insertions, 0 deletions

diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index ae1e4bb3259d..f195d77a3572 100644
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -201,6 +201,7 @@ static const struct cfg_param {
         {"nvidia,open-drain",           TEGRA_PINCONF_PARAM_OPEN_DRAIN},
         {"nvidia,lock",                 TEGRA_PINCONF_PARAM_LOCK},
         {"nvidia,io-reset",             TEGRA_PINCONF_PARAM_IORESET},
+        {"nvidia,rcv-sel",              TEGRA_PINCONF_PARAM_RCV_SEL},
         {"nvidia,high-speed-mode",      TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
         {"nvidia,schmitt",              TEGRA_PINCONF_PARAM_SCHMITT},
         {"nvidia,low-power-mode",       TEGRA_PINCONF_PARAM_LOW_POWER_MODE},
@@ -208,6 +209,7 @@ static const struct cfg_param {
         {"nvidia,pull-up-strength",     TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH},
         {"nvidia,slew-rate-falling",    TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
         {"nvidia,slew-rate-rising",     TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
+        {"nvidia,drive-type",           TEGRA_PINCONF_PARAM_DRIVE_TYPE},
 };
 
 static int tegra_pinctrl_dt_subnode_to_map(struct device *dev,
@@ -450,6 +452,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                 *bit = g->ioreset_bit;
                 *width = 1;
                 break;
+        case TEGRA_PINCONF_PARAM_RCV_SEL:
+                *bank = g->rcv_sel_bank;
+                *reg = g->rcv_sel_reg;
+                *bit = g->rcv_sel_bit;
+                *width = 1;
+                break;
         case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
                 *bank = g->drv_bank;
                 *reg = g->drv_reg;
@@ -492,6 +500,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                 *bit = g->slwr_bit;
                 *width = g->slwr_width;
                 break;
+        case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
+                *bank = g->drvtype_bank;
+                *reg = g->drvtype_reg;
+                *bit = g->drvtype_bit;
+                *width = 2;
+                break;
         default:
                 dev_err(pmx->dev, "Invalid config param %04x\n", param);
                 return -ENOTSUPP;