diff options
author | Sudeep Holla <sudeep.holla@arm.com> | 2016-02-01 13:28:17 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2016-03-11 11:03:06 -0500 |
commit | 3c177a166253653bf9c377eb28a5155ea2d9b631 (patch) | |
tree | 4a7d7828952bc05b11aa89cf532bbaff231e766c /drivers/pinctrl/pinctrl-single.c | |
parent | 96851d391d02142f358fe7030f8795f84921329b (diff) |
pinctrl: single: Use a separate lockdep class
The single pinmux controller can be cascaded to the other interrupt
controllers. Hence when propagating wake-up settings to its parent
interrupt controller, there's possiblity of detecting possible recursive
locking and getting lockdep warning.
This patch avoids this false positive by using a separate lockdep class
for this single pinctrl interrupts.
Cc: linux-gpio@vger.kernel.org
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-single.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-single.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index d24e5f1d1525..fb126d56ad40 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c | |||
@@ -255,6 +255,13 @@ static enum pin_config_param pcs_bias[] = { | |||
255 | }; | 255 | }; |
256 | 256 | ||
257 | /* | 257 | /* |
258 | * This lock class tells lockdep that irqchip core that this single | ||
259 | * pinctrl can be in a different category than its parents, so it won't | ||
260 | * report false recursion. | ||
261 | */ | ||
262 | static struct lock_class_key pcs_lock_class; | ||
263 | |||
264 | /* | ||
258 | * REVISIT: Reads and writes could eventually use regmap or something | 265 | * REVISIT: Reads and writes could eventually use regmap or something |
259 | * generic. But at least on omaps, some mux registers are performance | 266 | * generic. But at least on omaps, some mux registers are performance |
260 | * critical as they may need to be remuxed every time before and after | 267 | * critical as they may need to be remuxed every time before and after |
@@ -1713,6 +1720,7 @@ static int pcs_irqdomain_map(struct irq_domain *d, unsigned int irq, | |||
1713 | irq_set_chip_data(irq, pcs_soc); | 1720 | irq_set_chip_data(irq, pcs_soc); |
1714 | irq_set_chip_and_handler(irq, &pcs->chip, | 1721 | irq_set_chip_and_handler(irq, &pcs->chip, |
1715 | handle_level_irq); | 1722 | handle_level_irq); |
1723 | irq_set_lockdep_class(irq, &pcs_lock_class); | ||
1716 | irq_set_noprobe(irq); | 1724 | irq_set_noprobe(irq); |
1717 | 1725 | ||
1718 | return 0; | 1726 | return 0; |