Merge tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for v4.18.

  No core changes this time! Just a calm all-over-the-place drivers,
  updates and fixes cycle as it seems.

  New drivers/subdrivers:

   - Actions Semiconductor S900 driver with more Actions variants for
     S700, S500 in the pipe. Also generic GPIO support on top of the
     same driver and IRQ support is in the pipe.

   - Renesas r8a77470 PFC support.

   - Renesas r8a77990 PFC support.

   - Allwinner Sunxi H6 R_PIO support.

   - Rockchip PX30 support.

   - Meson Meson8m2 support.

   - Remove support for the ill-fated Samsung Exynos 5440 SoC.

  Improvements:

   - Context save/restore support in pinctrl-single.

   - External interrupt support for the Mediatek MT7622.

   - Qualcomm ACPI HID QCOM8002 supported.

  Fixes:

   - Fix up suspend/resume support for Exynos 5433.

   - Fix Strago DMI fixes on the Intel Cherryview"

* tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: cherryview: limit Strago DMI workarounds to version 1.0
  pinctrl: at91-pio4: add missing of_node_put
  pinctrl: armada-37xx: Fix spurious irq management
  gpiolib: discourage gpiochip_add_pin[group]_range for DT pinctrls
  pinctrl: msm: fix gpio-hog related boot issues
  MAINTAINERS: update entry for Mediatek pin controller
  pinctrl: mediatek: remove unused fields in struct mtk_eint_hw
  pinctrl: mediatek: use generic EINT register maps for each SoC
  pinctrl: mediatek: add EINT support to MT7622 SoC
  pinctrl: mediatek: refactor EINT related code for all MediaTek pinctrl can fit
  dt-bindings: pinctrl: add external interrupt support to MT7622 pinctrl
  pinctrl: freescale: Switch to SPDX identifier
  pinctrl: samsung: Fix suspend/resume for Exynos5433 GPF1..5 banks
  pinctrl: sh-pfc: rcar-gen3: Fix grammar in static pin comments
  pinctrl: sh-pfc: r8a77965: Add I2C pin support
  pinctrl: sh-pfc: r8a77990: Add EthernetAVB pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add I2C{1,2,4,5,6,7} pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add SCIF pins, groups and functions
  pinctrl: sh-pfc: r8a77990: Add bias pinconf support
  pinctrl: sh-pfc: Initial R8A77990 PFC support
  ...

4 files changed, 132 insertions, 6 deletions

diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 99a6ceac8e53..46a0918bd284 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -312,6 +312,47 @@ static const unsigned int pdm_din1_pins[] = {GPIOA_16};
 static const unsigned int pdm_din2_pins[] = {GPIOA_17};
 static const unsigned int pdm_din3_pins[] = {GPIOA_18};
 
+/* mclk */
+static const unsigned int mclk_c_pins[] = {GPIOA_0};
+static const unsigned int mclk_b_pins[] = {GPIOA_1};
+
+/* tdm */
+static const unsigned int tdma_sclk_pins[] = {GPIOX_12};
+static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12};
+static const unsigned int tdma_fs_pins[] = {GPIOX_13};
+static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13};
+static const unsigned int tdma_din0_pins[] = {GPIOX_14};
+static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14};
+static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15};
+static const unsigned int tdma_dout1_pins[] = {GPIOX_15};
+static const unsigned int tdma_din1_pins[] = {GPIOX_15};
+
+static const unsigned int tdmc_sclk_pins[] = {GPIOA_2};
+static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2};
+static const unsigned int tdmc_fs_pins[] = {GPIOA_3};
+static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3};
+static const unsigned int tdmc_din0_pins[] = {GPIOA_4};
+static const unsigned int tdmc_dout0_pins[] = {GPIOA_4};
+static const unsigned int tdmc_din1_pins[] = {GPIOA_5};
+static const unsigned int tdmc_dout1_pins[] = {GPIOA_5};
+static const unsigned int tdmc_din2_pins[] = {GPIOA_6};
+static const unsigned int tdmc_dout2_pins[] = {GPIOA_6};
+static const unsigned int tdmc_din3_pins[] = {GPIOA_7};
+static const unsigned int tdmc_dout3_pins[] = {GPIOA_7};
+
+static const unsigned int tdmb_sclk_pins[] = {GPIOA_8};
+static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8};
+static const unsigned int tdmb_fs_pins[] = {GPIOA_9};
+static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9};
+static const unsigned int tdmb_din0_pins[] = {GPIOA_10};
+static const unsigned int tdmb_dout0_pins[] = {GPIOA_10};
+static const unsigned int tdmb_din1_pins[] = {GPIOA_11};
+static const unsigned int tdmb_dout1_pins[] = {GPIOA_11};
+static const unsigned int tdmb_din2_pins[] = {GPIOA_12};
+static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
+static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
+static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
+
 static struct meson_pmx_group meson_axg_periphs_groups[] = {
         GPIO_GROUP(GPIOZ_0),
         GPIO_GROUP(GPIOZ_1),
@@ -495,6 +536,15 @@ static struct meson_pmx_group meson_axg_periphs_groups[] = {
         GROUP(eth_rx_dv_x, 4),
         GROUP(eth_mdio_x, 4),
         GROUP(eth_mdc_x, 4),
+        GROUP(tdma_sclk, 1),
+        GROUP(tdma_sclk_slv, 2),
+        GROUP(tdma_fs, 1),
+        GROUP(tdma_fs_slv, 2),
+        GROUP(tdma_din0, 1),
+        GROUP(tdma_dout0_x14, 2),
+        GROUP(tdma_dout0_x15, 1),
+        GROUP(tdma_dout1, 2),
+        GROUP(tdma_din1, 3),
 
         /* bank GPIOY */
         GROUP(eth_txd0_y, 1),
@@ -544,6 +594,32 @@ static struct meson_pmx_group meson_axg_periphs_groups[] = {
         GROUP(pdm_din1, 1),
         GROUP(pdm_din2, 1),
         GROUP(pdm_din3, 1),
+        GROUP(mclk_c, 1),
+        GROUP(mclk_b, 1),
+        GROUP(tdmc_sclk, 1),
+        GROUP(tdmc_sclk_slv, 2),
+        GROUP(tdmc_fs, 1),
+        GROUP(tdmc_fs_slv, 2),
+        GROUP(tdmc_din0, 2),
+        GROUP(tdmc_dout0, 1),
+        GROUP(tdmc_din1, 2),
+        GROUP(tdmc_dout1, 1),
+        GROUP(tdmc_din2, 2),
+        GROUP(tdmc_dout2, 1),
+        GROUP(tdmc_din3, 2),
+        GROUP(tdmc_dout3, 1),
+        GROUP(tdmb_sclk, 1),
+        GROUP(tdmb_sclk_slv, 2),
+        GROUP(tdmb_fs, 1),
+        GROUP(tdmb_fs_slv, 2),
+        GROUP(tdmb_din0, 2),
+        GROUP(tdmb_dout0, 1),
+        GROUP(tdmb_din1, 2),
+        GROUP(tdmb_dout1, 1),
+        GROUP(tdmb_din2, 2),
+        GROUP(tdmb_dout2, 1),
+        GROUP(tdmb_din3, 2),
+        GROUP(tdmb_dout3, 1),
 };
 
 /* uart_ao_a */
@@ -845,6 +921,32 @@ static const char * const jtag_ao_groups[] = {
         "jtag_ao_tdi", "jtag_ao_tdo", "jtag_ao_clk", "jtag_ao_tms",
 };
 
+static const char * const mclk_c_groups[] = {
+        "mclk_c",
+};
+
+static const char * const mclk_b_groups[] = {
+        "mclk_b",
+};
+
+static const char * const tdma_groups[] = {
+        "tdma_sclk", "tdma_sclk_slv", "tdma_fs", "tdma_fs_slv",
+        "tdma_din0", "tdma_dout0_x14", "tdma_dout0_x15", "tdma_dout1",
+        "tdma_din1",
+};
+
+static const char * const tdmc_groups[] = {
+        "tdmc_sclk", "tdmc_sclk_slv", "tdmc_fs", "tdmc_fs_slv",
+        "tdmc_din0", "tdmc_dout0", "tdmc_din1", "tdmc_dout1",
+        "tdmc_din2", "tdmc_dout2", "tdmc_din3", "tdmc_dout3",
+};
+
+static const char * const tdmb_groups[] = {
+        "tdmb_sclk", "tdmb_sclk_slv", "tdmb_fs", "tdmb_fs_slv",
+        "tdmb_din0", "tdmb_dout0", "tdmb_din1", "tdmb_dout1",
+        "tdmb_din2", "tdmb_dout2", "tdmb_din3", "tdmb_dout3",
+};
+
 static struct meson_pmx_func meson_axg_periphs_functions[] = {
         FUNCTION(gpio_periphs),
         FUNCTION(emmc),
@@ -870,6 +972,11 @@ static struct meson_pmx_func meson_axg_periphs_functions[] = {
         FUNCTION(spdif_in),
         FUNCTION(jtag_ee),
         FUNCTION(pdm),
+        FUNCTION(mclk_b),
+        FUNCTION(mclk_c),
+        FUNCTION(tdma),
+        FUNCTION(tdmb),
+        FUNCTION(tdmc),
 };
 
 static struct meson_pmx_func meson_axg_aobus_functions[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 9079020259c5..2c97a2e07a5f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -627,8 +627,8 @@ static const char * const sdio_groups[] = {
 };
 
 static const char * const nand_groups[] = {
-        "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
-        "nand_wen_clk", "nand_ren_wr", "nand_dqs",
+        "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
+        "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
 };
 
 static const char * const uart_a_groups[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index b3786cde963d..7dae1d7bf6b0 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -617,8 +617,8 @@ static const char * const sdio_groups[] = {
 };
 
 static const char * const nand_groups[] = {
-        "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
-        "nand_wen_clk", "nand_ren_wr", "nand_dqs",
+        "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
+        "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
 };
 
 static const char * const uart_a_groups[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index 49c7ce03547b..c6d79315218f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -1,5 +1,5 @@
 /*
- * Pin controller and GPIO driver for Amlogic Meson8.
+ * Pin controller and GPIO driver for Amlogic Meson8 and Meson8m2.
  *
  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
  *
@@ -299,6 +299,10 @@ static const unsigned int spi_mosi_1_pins[]	= { GPIOZ_12 };
 static const unsigned int spi_miso_1_pins[]     = { GPIOZ_13 };
 static const unsigned int spi_ss2_1_pins[]      = { GPIOZ_14 };
 
+static const unsigned int eth_txd3_pins[]       = { GPIOZ_0 };
+static const unsigned int eth_txd2_pins[]       = { GPIOZ_1 };
+static const unsigned int eth_rxd3_pins[]       = { GPIOZ_2 };
+static const unsigned int eth_rxd2_pins[]       = { GPIOZ_3 };
 static const unsigned int eth_tx_clk_50m_pins[] = { GPIOZ_4 };
 static const unsigned int eth_tx_en_pins[]      = { GPIOZ_5 };
 static const unsigned int eth_txd1_pins[]       = { GPIOZ_6 };
@@ -650,6 +654,12 @@ static struct meson_pmx_group meson8_cbus_groups[] = {
         GROUP(eth_mdio,         6,      6),
         GROUP(eth_mdc,          6,      5),
 
+        /* NOTE: the following four groups are only available on Meson8m2: */
+        GROUP(eth_rxd2,         6,      3),
+        GROUP(eth_rxd3,         6,      2),
+        GROUP(eth_txd2,         6,      1),
+        GROUP(eth_txd3,         6,      0),
+
         GROUP(i2c_sda_a0,       5,      31),
         GROUP(i2c_sck_a0,       5,      30),
 
@@ -877,7 +887,8 @@ static const char * const spi_groups[] = {
 static const char * const ethernet_groups[] = {
         "eth_tx_clk_50m", "eth_tx_en", "eth_txd1",
         "eth_txd0", "eth_rx_clk_in", "eth_rx_dv",
-        "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"
+        "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc", "eth_rxd2",
+        "eth_rxd3", "eth_txd2", "eth_txd3"
 };
 
 static const char * const i2c_a_groups[] = {
@@ -1080,6 +1091,14 @@ static const struct of_device_id meson8_pinctrl_dt_match[] = {
                 .compatible = "amlogic,meson8-aobus-pinctrl",
                 .data = &meson8_aobus_pinctrl_data,
         },
+        {
+                .compatible = "amlogic,meson8m2-cbus-pinctrl",
+                .data = &meson8_cbus_pinctrl_data,
+        },
+        {
+                .compatible = "amlogic,meson8m2-aobus-pinctrl",
+                .data = &meson8_aobus_pinctrl_data,
+        },
         { },
 };