diff options
author | Rafał Miłecki <rafal@milecki.pl> | 2017-06-08 16:04:26 -0400 |
---|---|---|
committer | Kishon Vijay Abraham I <kishon@ti.com> | 2017-06-16 03:52:26 -0400 |
commit | 4536adee0a96864a1ff000025c4c9a6299541f83 (patch) | |
tree | 1936c704e34806fe6ab7cd3819d1a89a356ce866 /drivers/phy/broadcom | |
parent | b20f506f6c63a3e6ee77aa4d519e4880c8a9d2f4 (diff) |
phy: bcm-ns-usb3: enable MDIO in the platform specific code
When we finally start using MDIO layer then bus initialization will be
handled in a separated driver. It means our code handling this has to be
used for the platform driver only.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/broadcom')
-rw-r--r-- | drivers/phy/broadcom/phy-bcm-ns-usb3.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/phy/broadcom/phy-bcm-ns-usb3.c b/drivers/phy/broadcom/phy-bcm-ns-usb3.c index 3d0fe5728029..2c9a0d5f43d8 100644 --- a/drivers/phy/broadcom/phy-bcm-ns-usb3.c +++ b/drivers/phy/broadcom/phy-bcm-ns-usb3.c | |||
@@ -80,12 +80,6 @@ static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3) | |||
80 | { | 80 | { |
81 | int err; | 81 | int err; |
82 | 82 | ||
83 | /* Enable MDIO. Setting MDCDIV as 26 */ | ||
84 | writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); | ||
85 | |||
86 | /* Wait for MDIO? */ | ||
87 | udelay(2); | ||
88 | |||
89 | /* USB3 PLL Block */ | 83 | /* USB3 PLL Block */ |
90 | err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, | 84 | err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, |
91 | BCM_NS_USB3_PHY_PLL30_BLOCK); | 85 | BCM_NS_USB3_PHY_PLL30_BLOCK); |
@@ -134,12 +128,6 @@ static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3) | |||
134 | { | 128 | { |
135 | int err; | 129 | int err; |
136 | 130 | ||
137 | /* Enable MDIO. Setting MDCDIV as 26 */ | ||
138 | writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); | ||
139 | |||
140 | /* Wait for MDIO? */ | ||
141 | udelay(2); | ||
142 | |||
143 | /* PLL30 block */ | 131 | /* PLL30 block */ |
144 | err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, | 132 | err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, |
145 | BCM_NS_USB3_PHY_PLL30_BLOCK); | 133 | BCM_NS_USB3_PHY_PLL30_BLOCK); |
@@ -278,6 +266,12 @@ static int bcm_ns_usb3_probe(struct platform_device *pdev) | |||
278 | return PTR_ERR(usb3->ccb_mii); | 266 | return PTR_ERR(usb3->ccb_mii); |
279 | } | 267 | } |
280 | 268 | ||
269 | /* Enable MDIO. Setting MDCDIV as 26 */ | ||
270 | writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL); | ||
271 | |||
272 | /* Wait for MDIO? */ | ||
273 | udelay(2); | ||
274 | |||
281 | usb3->phy_write = bcm_ns_usb3_platform_phy_write; | 275 | usb3->phy_write = bcm_ns_usb3_platform_phy_write; |
282 | 276 | ||
283 | usb3->phy = devm_phy_create(dev, NULL, &ops); | 277 | usb3->phy = devm_phy_create(dev, NULL, &ops); |