diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 19:34:46 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 19:34:46 -0400 |
commit | 192415f4986028db53fb76ebcefecf0d73cb900a (patch) | |
tree | 3d1a356f4fe65d927d8debf21d03ea49bba153d8 /drivers/pci/quirks.c | |
parent | f2e94683162565ff02d8d7386fadee175ab55e40 (diff) | |
parent | 34c6b7105e5a11174f856483cde8ad6e61b7236a (diff) |
Merge branch 'pci/printk'
* pci/printk:
PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
PCI: Replace printk(KERN_INFO) with pr_info(), etc
PCI: Use dev_printk() when possible
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 9d32019411fd..b9489b329351 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -159,8 +159,7 @@ static int __init pci_apply_final_quirks(void) | |||
159 | u8 tmp; | 159 | u8 tmp; |
160 | 160 | ||
161 | if (pci_cache_line_size) | 161 | if (pci_cache_line_size) |
162 | printk(KERN_DEBUG "PCI: CLS %u bytes\n", | 162 | pr_info("PCI: CLS %u bytes\n", pci_cache_line_size << 2); |
163 | pci_cache_line_size << 2); | ||
164 | 163 | ||
165 | pci_apply_fixup_final_quirks = true; | 164 | pci_apply_fixup_final_quirks = true; |
166 | for_each_pci_dev(dev) { | 165 | for_each_pci_dev(dev) { |
@@ -177,16 +176,16 @@ static int __init pci_apply_final_quirks(void) | |||
177 | if (!tmp || cls == tmp) | 176 | if (!tmp || cls == tmp) |
178 | continue; | 177 | continue; |
179 | 178 | ||
180 | printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), using %u bytes\n", | 179 | pci_info(dev, "CLS mismatch (%u != %u), using %u bytes\n", |
181 | cls << 2, tmp << 2, | 180 | cls << 2, tmp << 2, |
182 | pci_dfl_cache_line_size << 2); | 181 | pci_dfl_cache_line_size << 2); |
183 | pci_cache_line_size = pci_dfl_cache_line_size; | 182 | pci_cache_line_size = pci_dfl_cache_line_size; |
184 | } | 183 | } |
185 | } | 184 | } |
186 | 185 | ||
187 | if (!pci_cache_line_size) { | 186 | if (!pci_cache_line_size) { |
188 | printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n", | 187 | pr_info("PCI: CLS %u bytes, default %u\n", cls << 2, |
189 | cls << 2, pci_dfl_cache_line_size << 2); | 188 | pci_dfl_cache_line_size << 2); |
190 | pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size; | 189 | pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size; |
191 | } | 190 | } |
192 | 191 | ||
@@ -2613,7 +2612,7 @@ static void nvbridge_check_legacy_irq_routing(struct pci_dev *dev) | |||
2613 | pci_read_config_dword(dev, 0x74, &cfg); | 2612 | pci_read_config_dword(dev, 0x74, &cfg); |
2614 | 2613 | ||
2615 | if (cfg & ((1 << 2) | (1 << 15))) { | 2614 | if (cfg & ((1 << 2) | (1 << 15))) { |
2616 | printk(KERN_INFO "Rewriting IRQ routing register on MCP55\n"); | 2615 | pr_info("Rewriting IRQ routing register on MCP55\n"); |
2617 | cfg &= ~((1 << 2) | (1 << 15)); | 2616 | cfg &= ~((1 << 2) | (1 << 15)); |
2618 | pci_write_config_dword(dev, 0x74, cfg); | 2617 | pci_write_config_dword(dev, 0x74, cfg); |
2619 | } | 2618 | } |