of/pci: Fix the conversion of IO ranges into IO resources

The ranges property for a host bridge controller in DT describes the
mapping between the PCI bus address and the CPU physical address.  The
resources framework however expects that the IO resources start at a pseudo
"port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT.  The
conversion from PCI ranges to resources failed to take that into account,
returning a CPU physical address instead of a port number.

Also fix all the drivers that depend on the old behaviour by fetching the
CPU physical address based on the port number where it is being needed.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Rob Herring <robh+dt@kernel.org>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Simon Horman <horms@verge.net.au>
CC: Catalin Marinas <catalin.marinas@arm.com>

2 files changed, 22 insertions, 9 deletions

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 0fb0fdb223d5..946935db62b6 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -626,13 +626,14 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_relax_enable);
 static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
 {
         struct tegra_pcie *pcie = sys_to_pcie(sys);
+        phys_addr_t io_start = pci_pio_to_address(pcie->io.start);
 
         pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset);
         pci_add_resource_offset(&sys->resources, &pcie->prefetch,
                                 sys->mem_offset);
         pci_add_resource(&sys->resources, &pcie->busn);
 
-        pci_ioremap_io(nr * SZ_64K, pcie->io.start);
+        pci_ioremap_io(nr * SZ_64K, io_start);
 
         return 1;
 }
@@ -737,6 +738,7 @@ static irqreturn_t tegra_pcie_isr(int irq, void *arg)
 static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
 {
         u32 fpci_bar, size, axi_address;
+        phys_addr_t io_start = pci_pio_to_address(pcie->io.start);
 
         /* Bar 0: type 1 extended configuration space */
         fpci_bar = 0xfe100000;
@@ -749,7 +751,7 @@ static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
         /* Bar 1: downstream IO bar */
         fpci_bar = 0xfdfc0000;
         size = resource_size(&pcie->io);
-        axi_address = pcie->io.start;
+        axi_address = io_start;
         afi_writel(pcie, axi_address, AFI_AXI_BAR1_START);
         afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ);
         afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1);
@@ -1520,7 +1522,9 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, np, &res);
+                err = of_pci_range_to_resource(&range, np, &res);
+                if (err < 0)
+                        return err;
 
                 switch (res.flags & IORESOURCE_TYPE_BITS) {
                 case IORESOURCE_IO:
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 4884ee5e07d4..61158e03ab5f 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -323,6 +323,7 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
 
         /* Setup PCIe address space mappings for each resource */
         resource_size_t size;
+        resource_size_t res_start;
         u32 mask;
 
         rcar_pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win));
@@ -335,8 +336,13 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
         mask = (roundup_pow_of_two(size) / SZ_128) - 1;
         rcar_pci_write_reg(pcie, mask << 7, PCIEPAMR(win));
 
-        rcar_pci_write_reg(pcie, upper_32_bits(res->start), PCIEPARH(win));
-        rcar_pci_write_reg(pcie, lower_32_bits(res->start), PCIEPARL(win));
+        if (res->flags & IORESOURCE_IO)
+                res_start = pci_pio_to_address(res->start);
+        else
+                res_start = res->start;
+
+        rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
+        rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
 
         /* First resource is for IO */
         mask = PAR_ENABLE;
@@ -363,9 +369,10 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
 
                 rcar_pcie_setup_window(i, pcie);
 
-                if (res->flags & IORESOURCE_IO)
-                        pci_ioremap_io(nr * SZ_64K, res->start);
-                else
+                if (res->flags & IORESOURCE_IO) {
+                        phys_addr_t io_start = pci_pio_to_address(res->start);
+                        pci_ioremap_io(nr * SZ_64K, io_start);
+                } else
                         pci_add_resource(&sys->resources, res);
         }
         pci_add_resource(&sys->resources, &pcie->busn);
@@ -935,8 +942,10 @@ static int rcar_pcie_probe(struct platform_device *pdev)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, pdev->dev.of_node,
+                err = of_pci_range_to_resource(&range, pdev->dev.of_node,
                                                 &pcie->res[win++]);
+                if (err < 0)
+                        return err;
 
                 if (win > RCAR_PCI_MAX_RESOURCES)
                         break;