diff options
author | Yijing Wang <wangyijing@huawei.com> | 2014-11-11 17:38:07 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-11-21 11:33:58 -0500 |
commit | 0815f957e1a4a676ddf88657a6d8b9eca15640ad (patch) | |
tree | f352cd36be3cfa70df22d21cce6273ab5d4417d9 /drivers/pci/host | |
parent | 7ec725b2d5757754bd8bc5fd13d5f8c53d44ce80 (diff) |
PCI: designware: Save MSI controller in pci_sys_data
Save MSI controller in pci_sys_data instead of assigning MSI controller
pointer to every PCI bus in .add_bus().
[bhelgaas: use dw_pcie_msi_chip, not dw_pcie_msi_controller]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/host')
-rw-r--r-- | drivers/pci/host/pcie-designware.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index f4decad80ee4..5278d3e63070 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c | |||
@@ -498,6 +498,11 @@ int __init dw_pcie_host_init(struct pcie_port *pp) | |||
498 | val |= PORT_LOGIC_SPEED_CHANGE; | 498 | val |= PORT_LOGIC_SPEED_CHANGE; |
499 | dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); | 499 | dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); |
500 | 500 | ||
501 | #ifdef CONFIG_PCI_MSI | ||
502 | dw_pcie_msi_chip.dev = pp->dev; | ||
503 | dw_pci.msi_ctrl = &dw_pcie_msi_chip; | ||
504 | #endif | ||
505 | |||
501 | dw_pci.nr_controllers = 1; | 506 | dw_pci.nr_controllers = 1; |
502 | dw_pci.private_data = (void **)&pp; | 507 | dw_pci.private_data = (void **)&pp; |
503 | 508 | ||
@@ -747,21 +752,10 @@ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
747 | return irq; | 752 | return irq; |
748 | } | 753 | } |
749 | 754 | ||
750 | static void dw_pcie_add_bus(struct pci_bus *bus) | ||
751 | { | ||
752 | if (IS_ENABLED(CONFIG_PCI_MSI)) { | ||
753 | struct pcie_port *pp = sys_to_pcie(bus->sysdata); | ||
754 | |||
755 | dw_pcie_msi_chip.dev = pp->dev; | ||
756 | bus->msi = &dw_pcie_msi_chip; | ||
757 | } | ||
758 | } | ||
759 | |||
760 | static struct hw_pci dw_pci = { | 755 | static struct hw_pci dw_pci = { |
761 | .setup = dw_pcie_setup, | 756 | .setup = dw_pcie_setup, |
762 | .scan = dw_pcie_scan_bus, | 757 | .scan = dw_pcie_scan_bus, |
763 | .map_irq = dw_pcie_map_irq, | 758 | .map_irq = dw_pcie_map_irq, |
764 | .add_bus = dw_pcie_add_bus, | ||
765 | }; | 759 | }; |
766 | 760 | ||
767 | void dw_pcie_setup_rc(struct pcie_port *pp) | 761 | void dw_pcie_setup_rc(struct pcie_port *pp) |