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authorAlexander Aring <alex.aring@gmail.com>2015-05-17 15:44:57 -0400
committerMarcel Holtmann <marcel@holtmann.org>2015-05-19 05:44:45 -0400
commit7490b008d123f9bd781f51ad86b543aed49f6200 (patch)
tree801b4f21024d780f2ecced99f341332410027965 /drivers/net
parent3862eba691e3928338e188915676dd4fa7cefcaa (diff)
ieee802154: add support for atusb transceiver
This patch adds support for the atusb transceiver. The current driver supports basic functionality only. Possible further tasks would be to sync functionality with the at86rf230 driver, because the atusb use internally an at86rf231 transceiver. Some of these features need a firmware update like AACK and ARET handling. I did small changes to this driver to work with xmit_async callback and setting of a random extended perm address. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Cc: Werner Almesberger <werner@almesberger.net> Cc: Stefan Schmidt <s.schmidt@samsung.com> Cc: Richard Sharpe <realrichardsharpe@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ieee802154/Kconfig10
-rw-r--r--drivers/net/ieee802154/Makefile1
-rw-r--r--drivers/net/ieee802154/at86rf230.c199
-rw-r--r--drivers/net/ieee802154/at86rf230.h220
-rw-r--r--drivers/net/ieee802154/atusb.c692
-rw-r--r--drivers/net/ieee802154/atusb.h84
6 files changed, 1009 insertions, 197 deletions
diff --git a/drivers/net/ieee802154/Kconfig b/drivers/net/ieee802154/Kconfig
index 1a3c3e57aa0b..1dd5ab8e5054 100644
--- a/drivers/net/ieee802154/Kconfig
+++ b/drivers/net/ieee802154/Kconfig
@@ -53,3 +53,13 @@ config IEEE802154_CC2520
53 53
54 This driver can also be built as a module. To do so, say M here. 54 This driver can also be built as a module. To do so, say M here.
55 the module will be called 'cc2520'. 55 the module will be called 'cc2520'.
56
57config IEEE802154_ATUSB
58 tristate "ATUSB transceiver driver"
59 depends on IEEE802154_DRIVERS && MAC802154 && USB
60 ---help---
61 Say Y here to enable the ATUSB IEEE 802.15.4 wireless
62 controller.
63
64 This driver can also be built as a module. To do so say M here.
65 The module will be called 'atusb'.
diff --git a/drivers/net/ieee802154/Makefile b/drivers/net/ieee802154/Makefile
index d77fa4d77e27..cf1d2a6db023 100644
--- a/drivers/net/ieee802154/Makefile
+++ b/drivers/net/ieee802154/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_IEEE802154_FAKELB) += fakelb.o
2obj-$(CONFIG_IEEE802154_AT86RF230) += at86rf230.o 2obj-$(CONFIG_IEEE802154_AT86RF230) += at86rf230.o
3obj-$(CONFIG_IEEE802154_MRF24J40) += mrf24j40.o 3obj-$(CONFIG_IEEE802154_MRF24J40) += mrf24j40.o
4obj-$(CONFIG_IEEE802154_CC2520) += cc2520.o 4obj-$(CONFIG_IEEE802154_CC2520) += cc2520.o
5obj-$(CONFIG_IEEE802154_ATUSB) += atusb.o
diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c
index 8d5ed6e23ddb..d417ceb67626 100644
--- a/drivers/net/ieee802154/at86rf230.c
+++ b/drivers/net/ieee802154/at86rf230.c
@@ -35,6 +35,8 @@
35#include <net/mac802154.h> 35#include <net/mac802154.h>
36#include <net/cfg802154.h> 36#include <net/cfg802154.h>
37 37
38#include "at86rf230.h"
39
38struct at86rf230_local; 40struct at86rf230_local;
39/* at86rf2xx chip depend data. 41/* at86rf2xx chip depend data.
40 * All timings are in us. 42 * All timings are in us.
@@ -102,203 +104,6 @@ struct at86rf230_local {
102 struct at86rf230_state_change tx; 104 struct at86rf230_state_change tx;
103}; 105};
104 106
105#define RG_TRX_STATUS (0x01)
106#define SR_TRX_STATUS 0x01, 0x1f, 0
107#define SR_RESERVED_01_3 0x01, 0x20, 5
108#define SR_CCA_STATUS 0x01, 0x40, 6
109#define SR_CCA_DONE 0x01, 0x80, 7
110#define RG_TRX_STATE (0x02)
111#define SR_TRX_CMD 0x02, 0x1f, 0
112#define SR_TRAC_STATUS 0x02, 0xe0, 5
113#define RG_TRX_CTRL_0 (0x03)
114#define SR_CLKM_CTRL 0x03, 0x07, 0
115#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
116#define SR_PAD_IO_CLKM 0x03, 0x30, 4
117#define SR_PAD_IO 0x03, 0xc0, 6
118#define RG_TRX_CTRL_1 (0x04)
119#define SR_IRQ_POLARITY 0x04, 0x01, 0
120#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
121#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
122#define SR_RX_BL_CTRL 0x04, 0x10, 4
123#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
124#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
125#define SR_PA_EXT_EN 0x04, 0x80, 7
126#define RG_PHY_TX_PWR (0x05)
127#define SR_TX_PWR_23X 0x05, 0x0f, 0
128#define SR_PA_LT_230 0x05, 0x30, 4
129#define SR_PA_BUF_LT_230 0x05, 0xc0, 6
130#define SR_TX_PWR_212 0x05, 0x1f, 0
131#define SR_GC_PA_212 0x05, 0x60, 5
132#define SR_PA_BOOST_LT_212 0x05, 0x80, 7
133#define RG_PHY_RSSI (0x06)
134#define SR_RSSI 0x06, 0x1f, 0
135#define SR_RND_VALUE 0x06, 0x60, 5
136#define SR_RX_CRC_VALID 0x06, 0x80, 7
137#define RG_PHY_ED_LEVEL (0x07)
138#define SR_ED_LEVEL 0x07, 0xff, 0
139#define RG_PHY_CC_CCA (0x08)
140#define SR_CHANNEL 0x08, 0x1f, 0
141#define SR_CCA_MODE 0x08, 0x60, 5
142#define SR_CCA_REQUEST 0x08, 0x80, 7
143#define RG_CCA_THRES (0x09)
144#define SR_CCA_ED_THRES 0x09, 0x0f, 0
145#define SR_RESERVED_09_1 0x09, 0xf0, 4
146#define RG_RX_CTRL (0x0a)
147#define SR_PDT_THRES 0x0a, 0x0f, 0
148#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
149#define RG_SFD_VALUE (0x0b)
150#define SR_SFD_VALUE 0x0b, 0xff, 0
151#define RG_TRX_CTRL_2 (0x0c)
152#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
153#define SR_SUB_MODE 0x0c, 0x04, 2
154#define SR_BPSK_QPSK 0x0c, 0x08, 3
155#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
156#define SR_RESERVED_0c_5 0x0c, 0x60, 5
157#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
158#define RG_ANT_DIV (0x0d)
159#define SR_ANT_CTRL 0x0d, 0x03, 0
160#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
161#define SR_ANT_DIV_EN 0x0d, 0x08, 3
162#define SR_RESERVED_0d_2 0x0d, 0x70, 4
163#define SR_ANT_SEL 0x0d, 0x80, 7
164#define RG_IRQ_MASK (0x0e)
165#define SR_IRQ_MASK 0x0e, 0xff, 0
166#define RG_IRQ_STATUS (0x0f)
167#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
168#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
169#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
170#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
171#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
172#define SR_IRQ_5_AMI 0x0f, 0x20, 5
173#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
174#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
175#define RG_VREG_CTRL (0x10)
176#define SR_RESERVED_10_6 0x10, 0x03, 0
177#define SR_DVDD_OK 0x10, 0x04, 2
178#define SR_DVREG_EXT 0x10, 0x08, 3
179#define SR_RESERVED_10_3 0x10, 0x30, 4
180#define SR_AVDD_OK 0x10, 0x40, 6
181#define SR_AVREG_EXT 0x10, 0x80, 7
182#define RG_BATMON (0x11)
183#define SR_BATMON_VTH 0x11, 0x0f, 0
184#define SR_BATMON_HR 0x11, 0x10, 4
185#define SR_BATMON_OK 0x11, 0x20, 5
186#define SR_RESERVED_11_1 0x11, 0xc0, 6
187#define RG_XOSC_CTRL (0x12)
188#define SR_XTAL_TRIM 0x12, 0x0f, 0
189#define SR_XTAL_MODE 0x12, 0xf0, 4
190#define RG_RX_SYN (0x15)
191#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
192#define SR_RESERVED_15_2 0x15, 0x70, 4
193#define SR_RX_PDT_DIS 0x15, 0x80, 7
194#define RG_XAH_CTRL_1 (0x17)
195#define SR_RESERVED_17_8 0x17, 0x01, 0
196#define SR_AACK_PROM_MODE 0x17, 0x02, 1
197#define SR_AACK_ACK_TIME 0x17, 0x04, 2
198#define SR_RESERVED_17_5 0x17, 0x08, 3
199#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
200#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
201#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
202#define SR_RESERVED_17_1 0x17, 0x80, 7
203#define RG_FTN_CTRL (0x18)
204#define SR_RESERVED_18_2 0x18, 0x7f, 0
205#define SR_FTN_START 0x18, 0x80, 7
206#define RG_PLL_CF (0x1a)
207#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
208#define SR_PLL_CF_START 0x1a, 0x80, 7
209#define RG_PLL_DCU (0x1b)
210#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
211#define SR_RESERVED_1b_2 0x1b, 0x40, 6
212#define SR_PLL_DCU_START 0x1b, 0x80, 7
213#define RG_PART_NUM (0x1c)
214#define SR_PART_NUM 0x1c, 0xff, 0
215#define RG_VERSION_NUM (0x1d)
216#define SR_VERSION_NUM 0x1d, 0xff, 0
217#define RG_MAN_ID_0 (0x1e)
218#define SR_MAN_ID_0 0x1e, 0xff, 0
219#define RG_MAN_ID_1 (0x1f)
220#define SR_MAN_ID_1 0x1f, 0xff, 0
221#define RG_SHORT_ADDR_0 (0x20)
222#define SR_SHORT_ADDR_0 0x20, 0xff, 0
223#define RG_SHORT_ADDR_1 (0x21)
224#define SR_SHORT_ADDR_1 0x21, 0xff, 0
225#define RG_PAN_ID_0 (0x22)
226#define SR_PAN_ID_0 0x22, 0xff, 0
227#define RG_PAN_ID_1 (0x23)
228#define SR_PAN_ID_1 0x23, 0xff, 0
229#define RG_IEEE_ADDR_0 (0x24)
230#define SR_IEEE_ADDR_0 0x24, 0xff, 0
231#define RG_IEEE_ADDR_1 (0x25)
232#define SR_IEEE_ADDR_1 0x25, 0xff, 0
233#define RG_IEEE_ADDR_2 (0x26)
234#define SR_IEEE_ADDR_2 0x26, 0xff, 0
235#define RG_IEEE_ADDR_3 (0x27)
236#define SR_IEEE_ADDR_3 0x27, 0xff, 0
237#define RG_IEEE_ADDR_4 (0x28)
238#define SR_IEEE_ADDR_4 0x28, 0xff, 0
239#define RG_IEEE_ADDR_5 (0x29)
240#define SR_IEEE_ADDR_5 0x29, 0xff, 0
241#define RG_IEEE_ADDR_6 (0x2a)
242#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
243#define RG_IEEE_ADDR_7 (0x2b)
244#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
245#define RG_XAH_CTRL_0 (0x2c)
246#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
247#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
248#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
249#define RG_CSMA_SEED_0 (0x2d)
250#define SR_CSMA_SEED_0 0x2d, 0xff, 0
251#define RG_CSMA_SEED_1 (0x2e)
252#define SR_CSMA_SEED_1 0x2e, 0x07, 0
253#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
254#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
255#define SR_AACK_SET_PD 0x2e, 0x20, 5
256#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
257#define RG_CSMA_BE (0x2f)
258#define SR_MIN_BE 0x2f, 0x0f, 0
259#define SR_MAX_BE 0x2f, 0xf0, 4
260
261#define CMD_REG 0x80
262#define CMD_REG_MASK 0x3f
263#define CMD_WRITE 0x40
264#define CMD_FB 0x20
265
266#define IRQ_BAT_LOW (1 << 7)
267#define IRQ_TRX_UR (1 << 6)
268#define IRQ_AMI (1 << 5)
269#define IRQ_CCA_ED (1 << 4)
270#define IRQ_TRX_END (1 << 3)
271#define IRQ_RX_START (1 << 2)
272#define IRQ_PLL_UNL (1 << 1)
273#define IRQ_PLL_LOCK (1 << 0)
274
275#define IRQ_ACTIVE_HIGH 0
276#define IRQ_ACTIVE_LOW 1
277
278#define STATE_P_ON 0x00 /* BUSY */
279#define STATE_BUSY_RX 0x01
280#define STATE_BUSY_TX 0x02
281#define STATE_FORCE_TRX_OFF 0x03
282#define STATE_FORCE_TX_ON 0x04 /* IDLE */
283/* 0x05 */ /* INVALID_PARAMETER */
284#define STATE_RX_ON 0x06
285/* 0x07 */ /* SUCCESS */
286#define STATE_TRX_OFF 0x08
287#define STATE_TX_ON 0x09
288/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
289#define STATE_SLEEP 0x0F
290#define STATE_PREP_DEEP_SLEEP 0x10
291#define STATE_BUSY_RX_AACK 0x11
292#define STATE_BUSY_TX_ARET 0x12
293#define STATE_RX_AACK_ON 0x16
294#define STATE_TX_ARET_ON 0x19
295#define STATE_RX_ON_NOCLK 0x1C
296#define STATE_RX_AACK_ON_NOCLK 0x1D
297#define STATE_BUSY_RX_AACK_NOCLK 0x1E
298#define STATE_TRANSITION_IN_PROGRESS 0x1F
299
300#define TRX_STATE_MASK (0x1F)
301
302#define AT86RF2XX_NUMREGS 0x3F 107#define AT86RF2XX_NUMREGS 0x3F
303 108
304static void 109static void
diff --git a/drivers/net/ieee802154/at86rf230.h b/drivers/net/ieee802154/at86rf230.h
new file mode 100644
index 000000000000..1e6d1cc677f6
--- /dev/null
+++ b/drivers/net/ieee802154/at86rf230.h
@@ -0,0 +1,220 @@
1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Written by:
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 */
19
20#ifndef _AT86RF230_H
21#define _AT86RF230_H
22
23#define RG_TRX_STATUS (0x01)
24#define SR_TRX_STATUS 0x01, 0x1f, 0
25#define SR_RESERVED_01_3 0x01, 0x20, 5
26#define SR_CCA_STATUS 0x01, 0x40, 6
27#define SR_CCA_DONE 0x01, 0x80, 7
28#define RG_TRX_STATE (0x02)
29#define SR_TRX_CMD 0x02, 0x1f, 0
30#define SR_TRAC_STATUS 0x02, 0xe0, 5
31#define RG_TRX_CTRL_0 (0x03)
32#define SR_CLKM_CTRL 0x03, 0x07, 0
33#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
34#define SR_PAD_IO_CLKM 0x03, 0x30, 4
35#define SR_PAD_IO 0x03, 0xc0, 6
36#define RG_TRX_CTRL_1 (0x04)
37#define SR_IRQ_POLARITY 0x04, 0x01, 0
38#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
39#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
40#define SR_RX_BL_CTRL 0x04, 0x10, 4
41#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
42#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
43#define SR_PA_EXT_EN 0x04, 0x80, 7
44#define RG_PHY_TX_PWR (0x05)
45#define SR_TX_PWR_23X 0x05, 0x0f, 0
46#define SR_PA_LT_230 0x05, 0x30, 4
47#define SR_PA_BUF_LT_230 0x05, 0xc0, 6
48#define SR_TX_PWR_212 0x05, 0x1f, 0
49#define SR_GC_PA_212 0x05, 0x60, 5
50#define SR_PA_BOOST_LT_212 0x05, 0x80, 7
51#define RG_PHY_RSSI (0x06)
52#define SR_RSSI 0x06, 0x1f, 0
53#define SR_RND_VALUE 0x06, 0x60, 5
54#define SR_RX_CRC_VALID 0x06, 0x80, 7
55#define RG_PHY_ED_LEVEL (0x07)
56#define SR_ED_LEVEL 0x07, 0xff, 0
57#define RG_PHY_CC_CCA (0x08)
58#define SR_CHANNEL 0x08, 0x1f, 0
59#define SR_CCA_MODE 0x08, 0x60, 5
60#define SR_CCA_REQUEST 0x08, 0x80, 7
61#define RG_CCA_THRES (0x09)
62#define SR_CCA_ED_THRES 0x09, 0x0f, 0
63#define SR_RESERVED_09_1 0x09, 0xf0, 4
64#define RG_RX_CTRL (0x0a)
65#define SR_PDT_THRES 0x0a, 0x0f, 0
66#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
67#define RG_SFD_VALUE (0x0b)
68#define SR_SFD_VALUE 0x0b, 0xff, 0
69#define RG_TRX_CTRL_2 (0x0c)
70#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
71#define SR_SUB_MODE 0x0c, 0x04, 2
72#define SR_BPSK_QPSK 0x0c, 0x08, 3
73#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
74#define SR_RESERVED_0c_5 0x0c, 0x60, 5
75#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
76#define RG_ANT_DIV (0x0d)
77#define SR_ANT_CTRL 0x0d, 0x03, 0
78#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
79#define SR_ANT_DIV_EN 0x0d, 0x08, 3
80#define SR_RESERVED_0d_2 0x0d, 0x70, 4
81#define SR_ANT_SEL 0x0d, 0x80, 7
82#define RG_IRQ_MASK (0x0e)
83#define SR_IRQ_MASK 0x0e, 0xff, 0
84#define RG_IRQ_STATUS (0x0f)
85#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
86#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
87#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
88#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
89#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
90#define SR_IRQ_5_AMI 0x0f, 0x20, 5
91#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
92#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
93#define RG_VREG_CTRL (0x10)
94#define SR_RESERVED_10_6 0x10, 0x03, 0
95#define SR_DVDD_OK 0x10, 0x04, 2
96#define SR_DVREG_EXT 0x10, 0x08, 3
97#define SR_RESERVED_10_3 0x10, 0x30, 4
98#define SR_AVDD_OK 0x10, 0x40, 6
99#define SR_AVREG_EXT 0x10, 0x80, 7
100#define RG_BATMON (0x11)
101#define SR_BATMON_VTH 0x11, 0x0f, 0
102#define SR_BATMON_HR 0x11, 0x10, 4
103#define SR_BATMON_OK 0x11, 0x20, 5
104#define SR_RESERVED_11_1 0x11, 0xc0, 6
105#define RG_XOSC_CTRL (0x12)
106#define SR_XTAL_TRIM 0x12, 0x0f, 0
107#define SR_XTAL_MODE 0x12, 0xf0, 4
108#define RG_RX_SYN (0x15)
109#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
110#define SR_RESERVED_15_2 0x15, 0x70, 4
111#define SR_RX_PDT_DIS 0x15, 0x80, 7
112#define RG_XAH_CTRL_1 (0x17)
113#define SR_RESERVED_17_8 0x17, 0x01, 0
114#define SR_AACK_PROM_MODE 0x17, 0x02, 1
115#define SR_AACK_ACK_TIME 0x17, 0x04, 2
116#define SR_RESERVED_17_5 0x17, 0x08, 3
117#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
118#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
119#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
120#define SR_RESERVED_17_1 0x17, 0x80, 7
121#define RG_FTN_CTRL (0x18)
122#define SR_RESERVED_18_2 0x18, 0x7f, 0
123#define SR_FTN_START 0x18, 0x80, 7
124#define RG_PLL_CF (0x1a)
125#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
126#define SR_PLL_CF_START 0x1a, 0x80, 7
127#define RG_PLL_DCU (0x1b)
128#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
129#define SR_RESERVED_1b_2 0x1b, 0x40, 6
130#define SR_PLL_DCU_START 0x1b, 0x80, 7
131#define RG_PART_NUM (0x1c)
132#define SR_PART_NUM 0x1c, 0xff, 0
133#define RG_VERSION_NUM (0x1d)
134#define SR_VERSION_NUM 0x1d, 0xff, 0
135#define RG_MAN_ID_0 (0x1e)
136#define SR_MAN_ID_0 0x1e, 0xff, 0
137#define RG_MAN_ID_1 (0x1f)
138#define SR_MAN_ID_1 0x1f, 0xff, 0
139#define RG_SHORT_ADDR_0 (0x20)
140#define SR_SHORT_ADDR_0 0x20, 0xff, 0
141#define RG_SHORT_ADDR_1 (0x21)
142#define SR_SHORT_ADDR_1 0x21, 0xff, 0
143#define RG_PAN_ID_0 (0x22)
144#define SR_PAN_ID_0 0x22, 0xff, 0
145#define RG_PAN_ID_1 (0x23)
146#define SR_PAN_ID_1 0x23, 0xff, 0
147#define RG_IEEE_ADDR_0 (0x24)
148#define SR_IEEE_ADDR_0 0x24, 0xff, 0
149#define RG_IEEE_ADDR_1 (0x25)
150#define SR_IEEE_ADDR_1 0x25, 0xff, 0
151#define RG_IEEE_ADDR_2 (0x26)
152#define SR_IEEE_ADDR_2 0x26, 0xff, 0
153#define RG_IEEE_ADDR_3 (0x27)
154#define SR_IEEE_ADDR_3 0x27, 0xff, 0
155#define RG_IEEE_ADDR_4 (0x28)
156#define SR_IEEE_ADDR_4 0x28, 0xff, 0
157#define RG_IEEE_ADDR_5 (0x29)
158#define SR_IEEE_ADDR_5 0x29, 0xff, 0
159#define RG_IEEE_ADDR_6 (0x2a)
160#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
161#define RG_IEEE_ADDR_7 (0x2b)
162#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
163#define RG_XAH_CTRL_0 (0x2c)
164#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
165#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
166#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
167#define RG_CSMA_SEED_0 (0x2d)
168#define SR_CSMA_SEED_0 0x2d, 0xff, 0
169#define RG_CSMA_SEED_1 (0x2e)
170#define SR_CSMA_SEED_1 0x2e, 0x07, 0
171#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
172#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
173#define SR_AACK_SET_PD 0x2e, 0x20, 5
174#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
175#define RG_CSMA_BE (0x2f)
176#define SR_MIN_BE 0x2f, 0x0f, 0
177#define SR_MAX_BE 0x2f, 0xf0, 4
178
179#define CMD_REG 0x80
180#define CMD_REG_MASK 0x3f
181#define CMD_WRITE 0x40
182#define CMD_FB 0x20
183
184#define IRQ_BAT_LOW BIT(7)
185#define IRQ_TRX_UR BIT(6)
186#define IRQ_AMI BIT(5)
187#define IRQ_CCA_ED BIT(4)
188#define IRQ_TRX_END BIT(3)
189#define IRQ_RX_START BIT(2)
190#define IRQ_PLL_UNL BIT(1)
191#define IRQ_PLL_LOCK BIT(0)
192
193#define IRQ_ACTIVE_HIGH 0
194#define IRQ_ACTIVE_LOW 1
195
196#define STATE_P_ON 0x00 /* BUSY */
197#define STATE_BUSY_RX 0x01
198#define STATE_BUSY_TX 0x02
199#define STATE_FORCE_TRX_OFF 0x03
200#define STATE_FORCE_TX_ON 0x04 /* IDLE */
201/* 0x05 */ /* INVALID_PARAMETER */
202#define STATE_RX_ON 0x06
203/* 0x07 */ /* SUCCESS */
204#define STATE_TRX_OFF 0x08
205#define STATE_TX_ON 0x09
206/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
207#define STATE_SLEEP 0x0F
208#define STATE_PREP_DEEP_SLEEP 0x10
209#define STATE_BUSY_RX_AACK 0x11
210#define STATE_BUSY_TX_ARET 0x12
211#define STATE_RX_AACK_ON 0x16
212#define STATE_TX_ARET_ON 0x19
213#define STATE_RX_ON_NOCLK 0x1C
214#define STATE_RX_AACK_ON_NOCLK 0x1D
215#define STATE_BUSY_RX_AACK_NOCLK 0x1E
216#define STATE_TRANSITION_IN_PROGRESS 0x1F
217
218#define TRX_STATE_MASK (0x1F)
219
220#endif /* !_AT86RF230_H */
diff --git a/drivers/net/ieee802154/atusb.c b/drivers/net/ieee802154/atusb.c
new file mode 100644
index 000000000000..ea1259ef8508
--- /dev/null
+++ b/drivers/net/ieee802154/atusb.c
@@ -0,0 +1,692 @@
1/*
2 * atusb.c - Driver for the ATUSB IEEE 802.15.4 dongle
3 *
4 * Written 2013 by Werner Almesberger <werner@almesberger.net>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2
9 *
10 * Based on at86rf230.c and spi_atusb.c.
11 * at86rf230.c is
12 * Copyright (C) 2009 Siemens AG
13 * Written by: Dmitry Eremin-Solenikov <dmitry.baryshkov@siemens.com>
14 *
15 * spi_atusb.c is
16 * Copyright (c) 2011 Richard Sharpe <realrichardsharpe@gmail.com>
17 * Copyright (c) 2011 Stefan Schmidt <stefan@datenfreihafen.org>
18 * Copyright (c) 2011 Werner Almesberger <werner@almesberger.net>
19 *
20 * USB initialization is
21 * Copyright (c) 2013 Alexander Aring <alex.aring@gmail.com>
22 */
23
24#include <linux/kernel.h>
25#include <linux/slab.h>
26#include <linux/module.h>
27#include <linux/jiffies.h>
28#include <linux/usb.h>
29#include <linux/skbuff.h>
30
31#include <net/cfg802154.h>
32#include <net/mac802154.h>
33
34#include "at86rf230.h"
35#include "atusb.h"
36
37#define ATUSB_JEDEC_ATMEL 0x1f /* JEDEC manufacturer ID */
38
39#define ATUSB_NUM_RX_URBS 4 /* allow for a bit of local latency */
40#define ATUSB_ALLOC_DELAY_MS 100 /* delay after failed allocation */
41#define ATUSB_TX_TIMEOUT_MS 200 /* on the air timeout */
42
43struct atusb {
44 struct ieee802154_hw *hw;
45 struct usb_device *usb_dev;
46 int shutdown; /* non-zero if shutting down */
47 int err; /* set by first error */
48
49 /* RX variables */
50 struct delayed_work work; /* memory allocations */
51 struct usb_anchor idle_urbs; /* URBs waiting to be submitted */
52 struct usb_anchor rx_urbs; /* URBs waiting for reception */
53
54 /* TX variables */
55 struct usb_ctrlrequest tx_dr;
56 struct urb *tx_urb;
57 struct sk_buff *tx_skb;
58 uint8_t tx_ack_seq; /* current TX ACK sequence number */
59};
60
61/* at86rf230.h defines values as <reg, mask, shift> tuples. We use the more
62 * traditional style of having registers and or-able values. SR_REG extracts
63 * the register number. SR_VALUE uses the shift to prepare a value accordingly.
64 */
65
66#define __SR_REG(reg, mask, shift) (reg)
67#define SR_REG(sr) __SR_REG(sr)
68
69#define __SR_VALUE(reg, mask, shift, val) ((val) << (shift))
70#define SR_VALUE(sr, val) __SR_VALUE(sr, (val))
71
72/* ----- USB commands without data ----------------------------------------- */
73
74/* To reduce the number of error checks in the code, we record the first error
75 * in atusb->err and reject all subsequent requests until the error is cleared.
76 */
77
78static int atusb_control_msg(struct atusb *atusb, unsigned int pipe,
79 __u8 request, __u8 requesttype,
80 __u16 value, __u16 index,
81 void *data, __u16 size, int timeout)
82{
83 struct usb_device *usb_dev = atusb->usb_dev;
84 int ret;
85
86 if (atusb->err)
87 return atusb->err;
88
89 ret = usb_control_msg(usb_dev, pipe, request, requesttype,
90 value, index, data, size, timeout);
91 if (ret < 0) {
92 atusb->err = ret;
93 dev_err(&usb_dev->dev,
94 "atusb_control_msg: req 0x%02x val 0x%x idx 0x%x, error %d\n",
95 request, value, index, ret);
96 }
97 return ret;
98}
99
100static int atusb_command(struct atusb *atusb, uint8_t cmd, uint8_t arg)
101{
102 struct usb_device *usb_dev = atusb->usb_dev;
103
104 dev_dbg(&usb_dev->dev, "atusb_command: cmd = 0x%x\n", cmd);
105 return atusb_control_msg(atusb, usb_sndctrlpipe(usb_dev, 0),
106 cmd, ATUSB_REQ_TO_DEV, arg, 0, NULL, 0, 1000);
107}
108
109static int atusb_write_reg(struct atusb *atusb, uint8_t reg, uint8_t value)
110{
111 struct usb_device *usb_dev = atusb->usb_dev;
112
113 dev_dbg(&usb_dev->dev, "atusb_write_reg: 0x%02x <- 0x%02x\n",
114 reg, value);
115 return atusb_control_msg(atusb, usb_sndctrlpipe(usb_dev, 0),
116 ATUSB_REG_WRITE, ATUSB_REQ_TO_DEV,
117 value, reg, NULL, 0, 1000);
118}
119
120static int atusb_read_reg(struct atusb *atusb, uint8_t reg)
121{
122 struct usb_device *usb_dev = atusb->usb_dev;
123 int ret;
124 uint8_t value;
125
126 dev_dbg(&usb_dev->dev, "atusb: reg = 0x%x\n", reg);
127 ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
128 ATUSB_REG_READ, ATUSB_REQ_FROM_DEV,
129 0, reg, &value, 1, 1000);
130 return ret >= 0 ? value : ret;
131}
132
133static int atusb_get_and_clear_error(struct atusb *atusb)
134{
135 int err = atusb->err;
136
137 atusb->err = 0;
138 return err;
139}
140
141/* ----- skb allocation ---------------------------------------------------- */
142
143#define MAX_PSDU 127
144#define MAX_RX_XFER (1 + MAX_PSDU + 2 + 1) /* PHR+PSDU+CRC+LQI */
145
146#define SKB_ATUSB(skb) (*(struct atusb **)(skb)->cb)
147
148static void atusb_in(struct urb *urb);
149
150static int atusb_submit_rx_urb(struct atusb *atusb, struct urb *urb)
151{
152 struct usb_device *usb_dev = atusb->usb_dev;
153 struct sk_buff *skb = urb->context;
154 int ret;
155
156 if (!skb) {
157 skb = alloc_skb(MAX_RX_XFER, GFP_KERNEL);
158 if (!skb) {
159 dev_warn_ratelimited(&usb_dev->dev,
160 "atusb_in: can't allocate skb\n");
161 return -ENOMEM;
162 }
163 skb_put(skb, MAX_RX_XFER);
164 SKB_ATUSB(skb) = atusb;
165 }
166
167 usb_fill_bulk_urb(urb, usb_dev, usb_rcvbulkpipe(usb_dev, 1),
168 skb->data, MAX_RX_XFER, atusb_in, skb);
169 usb_anchor_urb(urb, &atusb->rx_urbs);
170
171 ret = usb_submit_urb(urb, GFP_KERNEL);
172 if (ret) {
173 usb_unanchor_urb(urb);
174 kfree_skb(skb);
175 urb->context = NULL;
176 }
177 return ret;
178}
179
180static void atusb_work_urbs(struct work_struct *work)
181{
182 struct atusb *atusb =
183 container_of(to_delayed_work(work), struct atusb, work);
184 struct usb_device *usb_dev = atusb->usb_dev;
185 struct urb *urb;
186 int ret;
187
188 if (atusb->shutdown)
189 return;
190
191 do {
192 urb = usb_get_from_anchor(&atusb->idle_urbs);
193 if (!urb)
194 return;
195 ret = atusb_submit_rx_urb(atusb, urb);
196 } while (!ret);
197
198 usb_anchor_urb(urb, &atusb->idle_urbs);
199 dev_warn_ratelimited(&usb_dev->dev,
200 "atusb_in: can't allocate/submit URB (%d)\n", ret);
201 schedule_delayed_work(&atusb->work,
202 msecs_to_jiffies(ATUSB_ALLOC_DELAY_MS) + 1);
203}
204
205/* ----- Asynchronous USB -------------------------------------------------- */
206
207static void atusb_tx_done(struct atusb *atusb, uint8_t seq)
208{
209 struct usb_device *usb_dev = atusb->usb_dev;
210 uint8_t expect = atusb->tx_ack_seq;
211
212 dev_dbg(&usb_dev->dev, "atusb_tx_done (0x%02x/0x%02x)\n", seq, expect);
213 if (seq == expect) {
214 /* TODO check for ifs handling in firmware */
215 ieee802154_xmit_complete(atusb->hw, atusb->tx_skb, false);
216 } else {
217 /* TODO I experience this case when atusb has a tx complete
218 * irq before probing, we should fix the firmware it's an
219 * unlikely case now that seq == expect is then true, but can
220 * happen and fail with a tx_skb = NULL;
221 */
222 ieee802154_wake_queue(atusb->hw);
223 if (atusb->tx_skb)
224 dev_kfree_skb_irq(atusb->tx_skb);
225 }
226}
227
228static void atusb_in_good(struct urb *urb)
229{
230 struct usb_device *usb_dev = urb->dev;
231 struct sk_buff *skb = urb->context;
232 struct atusb *atusb = SKB_ATUSB(skb);
233 uint8_t len, lqi;
234
235 if (!urb->actual_length) {
236 dev_dbg(&usb_dev->dev, "atusb_in: zero-sized URB ?\n");
237 return;
238 }
239
240 len = *skb->data;
241
242 if (urb->actual_length == 1) {
243 atusb_tx_done(atusb, len);
244 return;
245 }
246
247 if (len + 1 > urb->actual_length - 1) {
248 dev_dbg(&usb_dev->dev, "atusb_in: frame len %d+1 > URB %u-1\n",
249 len, urb->actual_length);
250 return;
251 }
252
253 if (!ieee802154_is_valid_psdu_len(len)) {
254 dev_dbg(&usb_dev->dev, "atusb_in: frame corrupted\n");
255 return;
256 }
257
258 lqi = skb->data[len + 1];
259 dev_dbg(&usb_dev->dev, "atusb_in: rx len %d lqi 0x%02x\n", len, lqi);
260 skb_pull(skb, 1); /* remove PHR */
261 skb_trim(skb, len); /* get payload only */
262 ieee802154_rx_irqsafe(atusb->hw, skb, lqi);
263 urb->context = NULL; /* skb is gone */
264}
265
266static void atusb_in(struct urb *urb)
267{
268 struct usb_device *usb_dev = urb->dev;
269 struct sk_buff *skb = urb->context;
270 struct atusb *atusb = SKB_ATUSB(skb);
271
272 dev_dbg(&usb_dev->dev, "atusb_in: status %d len %d\n",
273 urb->status, urb->actual_length);
274 if (urb->status) {
275 if (urb->status == -ENOENT) { /* being killed */
276 kfree_skb(skb);
277 urb->context = NULL;
278 return;
279 }
280 dev_dbg(&usb_dev->dev, "atusb_in: URB error %d\n", urb->status);
281 } else {
282 atusb_in_good(urb);
283 }
284
285 usb_anchor_urb(urb, &atusb->idle_urbs);
286 if (!atusb->shutdown)
287 schedule_delayed_work(&atusb->work, 0);
288}
289
290/* ----- URB allocation/deallocation --------------------------------------- */
291
292static void atusb_free_urbs(struct atusb *atusb)
293{
294 struct urb *urb;
295
296 while (1) {
297 urb = usb_get_from_anchor(&atusb->idle_urbs);
298 if (!urb)
299 break;
300 if (urb->context)
301 kfree_skb(urb->context);
302 usb_free_urb(urb);
303 }
304}
305
306static int atusb_alloc_urbs(struct atusb *atusb, int n)
307{
308 struct urb *urb;
309
310 while (n) {
311 urb = usb_alloc_urb(0, GFP_KERNEL);
312 if (!urb) {
313 atusb_free_urbs(atusb);
314 return -ENOMEM;
315 }
316 usb_anchor_urb(urb, &atusb->idle_urbs);
317 n--;
318 }
319 return 0;
320}
321
322/* ----- IEEE 802.15.4 interface operations -------------------------------- */
323
324static void atusb_xmit_complete(struct urb *urb)
325{
326 dev_dbg(&urb->dev->dev, "atusb_xmit urb completed");
327}
328
329static int atusb_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
330{
331 struct atusb *atusb = hw->priv;
332 struct usb_device *usb_dev = atusb->usb_dev;
333 int ret;
334
335 dev_dbg(&usb_dev->dev, "atusb_xmit (%d)\n", skb->len);
336 atusb->tx_skb = skb;
337 atusb->tx_ack_seq++;
338 atusb->tx_dr.wIndex = cpu_to_le16(atusb->tx_ack_seq);
339 atusb->tx_dr.wLength = cpu_to_le16(skb->len);
340
341 usb_fill_control_urb(atusb->tx_urb, usb_dev,
342 usb_sndctrlpipe(usb_dev, 0),
343 (unsigned char *)&atusb->tx_dr, skb->data,
344 skb->len, atusb_xmit_complete, NULL);
345 ret = usb_submit_urb(atusb->tx_urb, GFP_ATOMIC);
346 dev_dbg(&usb_dev->dev, "atusb_xmit done (%d)\n", ret);
347 return ret;
348}
349
350static int atusb_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
351{
352 struct atusb *atusb = hw->priv;
353 int ret;
354
355 /* This implicitly sets the CCA (Clear Channel Assessment) mode to 0,
356 * "Mode 3a, Carrier sense OR energy above threshold".
357 * We should probably make this configurable. @@@
358 */
359 ret = atusb_write_reg(atusb, RG_PHY_CC_CCA, channel);
360 if (ret < 0)
361 return ret;
362 msleep(1); /* @@@ ugly synchronization */
363 return 0;
364}
365
366static int atusb_ed(struct ieee802154_hw *hw, u8 *level)
367{
368 /* @@@ not used by the stack yet */
369 *level = 0;
370 return 0;
371}
372
373static int atusb_set_hw_addr_filt(struct ieee802154_hw *hw,
374 struct ieee802154_hw_addr_filt *filt,
375 unsigned long changed)
376{
377 struct atusb *atusb = hw->priv;
378 struct device *dev = &atusb->usb_dev->dev;
379 uint8_t reg;
380
381 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
382 u16 addr = le16_to_cpu(filt->short_addr);
383
384 dev_vdbg(dev, "atusb_set_hw_addr_filt called for saddr\n");
385 atusb_write_reg(atusb, RG_SHORT_ADDR_0, addr);
386 atusb_write_reg(atusb, RG_SHORT_ADDR_1, addr >> 8);
387 }
388
389 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
390 u16 pan = le16_to_cpu(filt->pan_id);
391
392 dev_vdbg(dev, "atusb_set_hw_addr_filt called for pan id\n");
393 atusb_write_reg(atusb, RG_PAN_ID_0, pan);
394 atusb_write_reg(atusb, RG_PAN_ID_1, pan >> 8);
395 }
396
397 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
398 u8 i, addr[IEEE802154_EXTENDED_ADDR_LEN];
399
400 memcpy(addr, &filt->ieee_addr, IEEE802154_EXTENDED_ADDR_LEN);
401 dev_vdbg(dev, "atusb_set_hw_addr_filt called for IEEE addr\n");
402 for (i = 0; i < 8; i++)
403 atusb_write_reg(atusb, RG_IEEE_ADDR_0 + i, addr[i]);
404 }
405
406 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
407 dev_vdbg(dev,
408 "atusb_set_hw_addr_filt called for panc change\n");
409 reg = atusb_read_reg(atusb, SR_REG(SR_AACK_I_AM_COORD));
410 if (filt->pan_coord)
411 reg |= SR_VALUE(SR_AACK_I_AM_COORD, 1);
412 else
413 reg &= ~SR_VALUE(SR_AACK_I_AM_COORD, 1);
414 atusb_write_reg(atusb, SR_REG(SR_AACK_I_AM_COORD), reg);
415 }
416
417 return atusb_get_and_clear_error(atusb);
418}
419
420static int atusb_start(struct ieee802154_hw *hw)
421{
422 struct atusb *atusb = hw->priv;
423 struct usb_device *usb_dev = atusb->usb_dev;
424 int ret;
425
426 dev_dbg(&usb_dev->dev, "atusb_start\n");
427 schedule_delayed_work(&atusb->work, 0);
428 atusb_command(atusb, ATUSB_RX_MODE, 1);
429 ret = atusb_get_and_clear_error(atusb);
430 if (ret < 0)
431 usb_kill_anchored_urbs(&atusb->idle_urbs);
432 return ret;
433}
434
435static void atusb_stop(struct ieee802154_hw *hw)
436{
437 struct atusb *atusb = hw->priv;
438 struct usb_device *usb_dev = atusb->usb_dev;
439
440 dev_dbg(&usb_dev->dev, "atusb_stop\n");
441 usb_kill_anchored_urbs(&atusb->idle_urbs);
442 atusb_command(atusb, ATUSB_RX_MODE, 0);
443 atusb_get_and_clear_error(atusb);
444}
445
446static struct ieee802154_ops atusb_ops = {
447 .owner = THIS_MODULE,
448 .xmit_async = atusb_xmit,
449 .ed = atusb_ed,
450 .set_channel = atusb_channel,
451 .start = atusb_start,
452 .stop = atusb_stop,
453 .set_hw_addr_filt = atusb_set_hw_addr_filt,
454};
455
456/* ----- Firmware and chip version information ----------------------------- */
457
458static int atusb_get_and_show_revision(struct atusb *atusb)
459{
460 struct usb_device *usb_dev = atusb->usb_dev;
461 unsigned char buffer[3];
462 int ret;
463
464 /* Get a couple of the ATMega Firmware values */
465 ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
466 ATUSB_ID, ATUSB_REQ_FROM_DEV, 0, 0,
467 buffer, 3, 1000);
468 if (ret >= 0)
469 dev_info(&usb_dev->dev,
470 "Firmware: major: %u, minor: %u, hardware type: %u\n",
471 buffer[0], buffer[1], buffer[2]);
472
473 return ret;
474}
475
476static int atusb_get_and_show_build(struct atusb *atusb)
477{
478 struct usb_device *usb_dev = atusb->usb_dev;
479 char build[ATUSB_BUILD_SIZE + 1];
480 int ret;
481
482 ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
483 ATUSB_BUILD, ATUSB_REQ_FROM_DEV, 0, 0,
484 build, ATUSB_BUILD_SIZE, 1000);
485 if (ret >= 0) {
486 build[ret] = 0;
487 dev_info(&usb_dev->dev, "Firmware: build %s\n", build);
488 }
489
490 return ret;
491}
492
493static int atusb_get_and_show_chip(struct atusb *atusb)
494{
495 struct usb_device *usb_dev = atusb->usb_dev;
496 uint8_t man_id_0, man_id_1, part_num, version_num;
497
498 man_id_0 = atusb_read_reg(atusb, RG_MAN_ID_0);
499 man_id_1 = atusb_read_reg(atusb, RG_MAN_ID_1);
500 part_num = atusb_read_reg(atusb, RG_PART_NUM);
501 version_num = atusb_read_reg(atusb, RG_VERSION_NUM);
502
503 if (atusb->err)
504 return atusb->err;
505
506 if ((man_id_1 << 8 | man_id_0) != ATUSB_JEDEC_ATMEL) {
507 dev_err(&usb_dev->dev,
508 "non-Atmel transceiver xxxx%02x%02x\n",
509 man_id_1, man_id_0);
510 goto fail;
511 }
512 if (part_num != 3) {
513 dev_err(&usb_dev->dev,
514 "unexpected transceiver, part 0x%02x version 0x%02x\n",
515 part_num, version_num);
516 goto fail;
517 }
518
519 dev_info(&usb_dev->dev, "ATUSB: AT86RF231 version %d\n", version_num);
520
521 return 0;
522
523fail:
524 atusb->err = -ENODEV;
525 return -ENODEV;
526}
527
528/* ----- Setup ------------------------------------------------------------- */
529
530static int atusb_probe(struct usb_interface *interface,
531 const struct usb_device_id *id)
532{
533 struct usb_device *usb_dev = interface_to_usbdev(interface);
534 struct ieee802154_hw *hw;
535 struct atusb *atusb = NULL;
536 int ret = -ENOMEM;
537
538 hw = ieee802154_alloc_hw(sizeof(struct atusb), &atusb_ops);
539 if (!hw)
540 return -ENOMEM;
541
542 atusb = hw->priv;
543 atusb->hw = hw;
544 atusb->usb_dev = usb_get_dev(usb_dev);
545 usb_set_intfdata(interface, atusb);
546
547 atusb->shutdown = 0;
548 atusb->err = 0;
549 INIT_DELAYED_WORK(&atusb->work, atusb_work_urbs);
550 init_usb_anchor(&atusb->idle_urbs);
551 init_usb_anchor(&atusb->rx_urbs);
552
553 if (atusb_alloc_urbs(atusb, ATUSB_NUM_RX_URBS))
554 goto fail;
555
556 atusb->tx_dr.bRequestType = ATUSB_REQ_TO_DEV;
557 atusb->tx_dr.bRequest = ATUSB_TX;
558 atusb->tx_dr.wValue = cpu_to_le16(0);
559
560 atusb->tx_urb = usb_alloc_urb(0, GFP_ATOMIC);
561 if (!atusb->tx_urb)
562 goto fail;
563
564 hw->parent = &usb_dev->dev;
565 hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AFILT;
566
567 hw->phy->current_page = 0;
568 hw->phy->current_channel = 11; /* reset default */
569 hw->phy->supported.channels[0] = 0x7FFF800;
570 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
571
572 atusb_command(atusb, ATUSB_RF_RESET, 0);
573 atusb_get_and_show_chip(atusb);
574 atusb_get_and_show_revision(atusb);
575 atusb_get_and_show_build(atusb);
576 ret = atusb_get_and_clear_error(atusb);
577 if (ret) {
578 dev_err(&atusb->usb_dev->dev,
579 "%s: initialization failed, error = %d\n",
580 __func__, ret);
581 goto fail;
582 }
583
584 ret = ieee802154_register_hw(hw);
585 if (ret)
586 goto fail;
587
588 /* If we just powered on, we're now in P_ON and need to enter TRX_OFF
589 * explicitly. Any resets after that will send us straight to TRX_OFF,
590 * making the command below redundant.
591 */
592 atusb_write_reg(atusb, RG_TRX_STATE, STATE_FORCE_TRX_OFF);
593 msleep(1); /* reset => TRX_OFF, tTR13 = 37 us */
594
595#if 0
596 /* Calculating the maximum time available to empty the frame buffer
597 * on reception:
598 *
599 * According to [1], the inter-frame gap is
600 * R * 20 * 16 us + 128 us
601 * where R is a random number from 0 to 7. Furthermore, we have 20 bit
602 * times (80 us at 250 kbps) of SHR of the next frame before the
603 * transceiver begins storing data in the frame buffer.
604 *
605 * This yields a minimum time of 208 us between the last data of a
606 * frame and the first data of the next frame. This time is further
607 * reduced by interrupt latency in the atusb firmware.
608 *
609 * atusb currently needs about 500 us to retrieve a maximum-sized
610 * frame. We therefore have to allow reception of a new frame to begin
611 * while we retrieve the previous frame.
612 *
613 * [1] "JN-AN-1035 Calculating data rates in an IEEE 802.15.4-based
614 * network", Jennic 2006.
615 * http://www.jennic.com/download_file.php?supportFile=JN-AN-1035%20Calculating%20802-15-4%20Data%20Rates-1v0.pdf
616 */
617
618 atusb_write_reg(atusb,
619 SR_REG(SR_RX_SAFE_MODE), SR_VALUE(SR_RX_SAFE_MODE, 1));
620#endif
621 atusb_write_reg(atusb, RG_IRQ_MASK, 0xff);
622
623 ret = atusb_get_and_clear_error(atusb);
624 if (!ret)
625 return 0;
626
627 dev_err(&atusb->usb_dev->dev,
628 "%s: setup failed, error = %d\n",
629 __func__, ret);
630
631 ieee802154_unregister_hw(hw);
632fail:
633 atusb_free_urbs(atusb);
634 usb_kill_urb(atusb->tx_urb);
635 usb_free_urb(atusb->tx_urb);
636 usb_put_dev(usb_dev);
637 ieee802154_free_hw(hw);
638 return ret;
639}
640
641static void atusb_disconnect(struct usb_interface *interface)
642{
643 struct atusb *atusb = usb_get_intfdata(interface);
644
645 dev_dbg(&atusb->usb_dev->dev, "atusb_disconnect\n");
646
647 atusb->shutdown = 1;
648 cancel_delayed_work_sync(&atusb->work);
649
650 usb_kill_anchored_urbs(&atusb->rx_urbs);
651 atusb_free_urbs(atusb);
652 usb_kill_urb(atusb->tx_urb);
653 usb_free_urb(atusb->tx_urb);
654
655 ieee802154_unregister_hw(atusb->hw);
656
657 ieee802154_free_hw(atusb->hw);
658
659 usb_set_intfdata(interface, NULL);
660 usb_put_dev(atusb->usb_dev);
661
662 pr_debug("atusb_disconnect done\n");
663}
664
665/* The devices we work with */
666static const struct usb_device_id atusb_device_table[] = {
667 {
668 .match_flags = USB_DEVICE_ID_MATCH_DEVICE |
669 USB_DEVICE_ID_MATCH_INT_INFO,
670 .idVendor = ATUSB_VENDOR_ID,
671 .idProduct = ATUSB_PRODUCT_ID,
672 .bInterfaceClass = USB_CLASS_VENDOR_SPEC
673 },
674 /* end with null element */
675 {}
676};
677MODULE_DEVICE_TABLE(usb, atusb_device_table);
678
679static struct usb_driver atusb_driver = {
680 .name = "atusb",
681 .probe = atusb_probe,
682 .disconnect = atusb_disconnect,
683 .id_table = atusb_device_table,
684};
685module_usb_driver(atusb_driver);
686
687MODULE_AUTHOR("Alexander Aring <alex.aring@gmail.com>");
688MODULE_AUTHOR("Richard Sharpe <realrichardsharpe@gmail.com>");
689MODULE_AUTHOR("Stefan Schmidt <stefan@datenfreihafen.org>");
690MODULE_AUTHOR("Werner Almesberger <werner@almesberger.net>");
691MODULE_DESCRIPTION("ATUSB IEEE 802.15.4 Driver");
692MODULE_LICENSE("GPL");
diff --git a/drivers/net/ieee802154/atusb.h b/drivers/net/ieee802154/atusb.h
new file mode 100644
index 000000000000..0690edcad57b
--- /dev/null
+++ b/drivers/net/ieee802154/atusb.h
@@ -0,0 +1,84 @@
1/*
2 * atusb.h - Definitions shared between kernel and ATUSB firmware
3 *
4 * Written 2013 by Werner Almesberger <werner@almesberger.net>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2, or
9 * (at your option) any later version.
10 *
11 * This file should be identical for kernel and firmware.
12 * Kernel: drivers/net/ieee802154/atusb.h
13 * Firmware: ben-wpan/atusb/fw/include/atusb/atusb.h
14 */
15
16#ifndef _ATUSB_H
17#define _ATUSB_H
18
19#define ATUSB_VENDOR_ID 0x20b7 /* Qi Hardware*/
20#define ATUSB_PRODUCT_ID 0x1540 /* 802.15.4, device 0 */
21 /* -- - - */
22
23#define ATUSB_BUILD_SIZE 256 /* maximum build version/date message length */
24
25/* Commands to our device. Make sure this is synced with the firmware */
26enum atusb_requests {
27 ATUSB_ID = 0x00, /* system status/control grp */
28 ATUSB_BUILD,
29 ATUSB_RESET,
30 ATUSB_RF_RESET = 0x10, /* debug/test group */
31 ATUSB_POLL_INT,
32 ATUSB_TEST, /* atusb-sil only */
33 ATUSB_TIMER,
34 ATUSB_GPIO,
35 ATUSB_SLP_TR,
36 ATUSB_GPIO_CLEANUP,
37 ATUSB_REG_WRITE = 0x20, /* transceiver group */
38 ATUSB_REG_READ,
39 ATUSB_BUF_WRITE,
40 ATUSB_BUF_READ,
41 ATUSB_SRAM_WRITE,
42 ATUSB_SRAM_READ,
43 ATUSB_SPI_WRITE = 0x30, /* SPI group */
44 ATUSB_SPI_READ1,
45 ATUSB_SPI_READ2,
46 ATUSB_SPI_WRITE2_SYNC,
47 ATUSB_RX_MODE = 0x40, /* HardMAC group */
48 ATUSB_TX,
49};
50
51/* Direction bRequest wValue wIndex wLength
52 *
53 * ->host ATUSB_ID - - 3
54 * ->host ATUSB_BUILD - - #bytes
55 * host-> ATUSB_RESET - - 0
56 *
57 * host-> ATUSB_RF_RESET - - 0
58 * ->host ATUSB_POLL_INT - - 1
59 * host-> ATUSB_TEST - - 0
60 * ->host ATUSB_TIMER - - #bytes (6)
61 * ->host ATUSB_GPIO dir+data mask+p# 3
62 * host-> ATUSB_SLP_TR - - 0
63 * host-> ATUSB_GPIO_CLEANUP - - 0
64 *
65 * host-> ATUSB_REG_WRITE value addr 0
66 * ->host ATUSB_REG_READ - addr 1
67 * host-> ATUSB_BUF_WRITE - - #bytes
68 * ->host ATUSB_BUF_READ - - #bytes
69 * host-> ATUSB_SRAM_WRITE - addr #bytes
70 * ->host ATUSB_SRAM_READ - addr #bytes
71 *
72 * host-> ATUSB_SPI_WRITE byte0 byte1 #bytes
73 * ->host ATUSB_SPI_READ1 byte0 - #bytes
74 * ->host ATUSB_SPI_READ2 byte0 byte1 #bytes
75 * ->host ATUSB_SPI_WRITE2_SYNC byte0 byte1 0/1
76 *
77 * host-> ATUSB_RX_MODE on - 0
78 * host-> ATUSB_TX flags ack_seq #bytes
79 */
80
81#define ATUSB_REQ_FROM_DEV (USB_TYPE_VENDOR | USB_DIR_IN)
82#define ATUSB_REQ_TO_DEV (USB_TYPE_VENDOR | USB_DIR_OUT)
83
84#endif /* !_ATUSB_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 03:42:22 -0400