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authorFlorian Fainelli <f.fainelli@gmail.com>2014-11-11 17:55:12 -0500
committerDavid S. Miller <davem@davemloft.net>2014-11-12 13:58:06 -0500
commit9c41f2baa90b95c13007fd9617d5a0251b68968b (patch)
treef9959a6a74e8c1c9dce1c7b00bb7df038b6caecc /drivers/net/phy
parent2a9df7425e9fab830081d84334f2433177f78335 (diff)
net: phy: bcm7xxx: introduce r_rc_cal_reset helper
This function performs a R/RC calibration reset and will start being used by more than one function in the next patches, create a helper function to factor code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/bcm7xxx.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index eb610cb69298..0ac78d0db9b5 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -69,6 +69,15 @@ static void phy_write_misc(struct phy_device *phydev,
69 phy_write(phydev, MII_BCM54XX_EXP_DATA, value); 69 phy_write(phydev, MII_BCM54XX_EXP_DATA, value);
70} 70}
71 71
72static void r_rc_cal_reset(struct phy_device *phydev)
73{
74 /* Reset R_CAL/RC_CAL Engine */
75 phy_write_exp(phydev, 0x00b0, 0x0010);
76
77 /* Disable Reset R_AL/RC_CAL Engine */
78 phy_write_exp(phydev, 0x00b0, 0x0000);
79}
80
72static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev) 81static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
73{ 82{
74 /* Increase VCO range to prevent unlocking problem of PLL at low 83 /* Increase VCO range to prevent unlocking problem of PLL at low
@@ -90,11 +99,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
90 /* Switch to CORE_BASE1E */ 99 /* Switch to CORE_BASE1E */
91 phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd); 100 phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
92 101
93 /* Reset R_CAL/RC_CAL Engine */ 102 r_rc_cal_reset(phydev);
94 phy_write_exp(phydev, CORE_EXPB0, 0x0010);
95
96 /* Disable Reset R_CAL/RC_CAL Engine */
97 phy_write_exp(phydev, CORE_EXPB0, 0x0000);
98 103
99 /* write AFE_RXCONFIG_0 */ 104 /* write AFE_RXCONFIG_0 */
100 phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19); 105 phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19);