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authorWolfram Sang <wsa+renesas@sang-engineering.com>2016-04-27 12:51:23 -0400
committerUlf Hansson <ulf.hansson@linaro.org>2016-05-02 04:36:01 -0400
commit2c54506b769d0633aac8f0511ef23f76bedeec9e (patch)
treeac541b924314018e495ed655611c5a0d3b4d35cf /drivers/mmc
parentdb863d8966818d3af3e415b5f60fcfeceba803c6 (diff)
mmc: tmio: give read32/write32 functions more descriptive names
Looking at the backlogs, I am not the only one who missed that the above functions do not read u32 from one register, but create a virtual u32 from reading to adjacent u16 registers (which depending on 'bus_shift' can be up to 8 byte apart). Because this driver supports old hardware for which we don't have documentation, I first wrongly assumed there was a variant which had a few u32 registers. Let's give the functions more descriptive names to make it more obvious what is happening. Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/tmio_mmc.h5
-rw-r--r--drivers/mmc/host/tmio_mmc_pio.c22
2 files changed, 13 insertions, 14 deletions
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 439fdad2bad9..e75e5ca220bc 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -232,7 +232,7 @@ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
232 readsw(host->ctl + (addr << host->bus_shift), buf, count); 232 readsw(host->ctl + (addr << host->bus_shift), buf, count);
233} 233}
234 234
235static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr) 235static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
236{ 236{
237 return readw(host->ctl + (addr << host->bus_shift)) | 237 return readw(host->ctl + (addr << host->bus_shift)) |
238 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; 238 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
@@ -254,11 +254,10 @@ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
254 writesw(host->ctl + (addr << host->bus_shift), buf, count); 254 writesw(host->ctl + (addr << host->bus_shift), buf, count);
255} 255}
256 256
257static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) 257static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
258{ 258{
259 writew(val, host->ctl + (addr << host->bus_shift)); 259 writew(val, host->ctl + (addr << host->bus_shift));
260 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 260 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
261} 261}
262 262
263
264#endif 263#endif
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
index 0b52ef1271a5..3635940bc31d 100644
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_pio.c
@@ -55,18 +55,18 @@
55void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 55void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
56{ 56{
57 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 57 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
58 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 58 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
59} 59}
60 60
61void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 61void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
62{ 62{
63 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 63 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
64 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 64 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
65} 65}
66 66
67static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 67static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
68{ 68{
69 sd_ctrl_write32(host, CTL_STATUS, ~i); 69 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
70} 70}
71 71
72static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 72static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
@@ -375,7 +375,7 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command
375 tmio_mmc_enable_mmc_irqs(host, irq_mask); 375 tmio_mmc_enable_mmc_irqs(host, irq_mask);
376 376
377 /* Fire off the command */ 377 /* Fire off the command */
378 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); 378 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
379 sd_ctrl_write16(host, CTL_SD_CMD, c); 379 sd_ctrl_write16(host, CTL_SD_CMD, c);
380 380
381 return 0; 381 return 0;
@@ -530,7 +530,7 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
530 goto out; 530 goto out;
531 531
532 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { 532 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
533 u32 status = sd_ctrl_read32(host, CTL_STATUS); 533 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
534 bool done = false; 534 bool done = false;
535 535
536 /* 536 /*
@@ -585,7 +585,7 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
585 */ 585 */
586 586
587 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 587 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
588 cmd->resp[i] = sd_ctrl_read32(host, addr); 588 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
589 589
590 if (cmd->flags & MMC_RSP_136) { 590 if (cmd->flags & MMC_RSP_136) {
591 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 591 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
@@ -702,14 +702,14 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid)
702 struct tmio_mmc_host *host = devid; 702 struct tmio_mmc_host *host = devid;
703 unsigned int ireg, status; 703 unsigned int ireg, status;
704 704
705 status = sd_ctrl_read32(host, CTL_STATUS); 705 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
706 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 706 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
707 707
708 pr_debug_status(status); 708 pr_debug_status(status);
709 pr_debug_status(ireg); 709 pr_debug_status(ireg);
710 710
711 /* Clear the status except the interrupt status */ 711 /* Clear the status except the interrupt status */
712 sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ); 712 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
713 713
714 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 714 if (__tmio_mmc_card_detect_irq(host, ireg, status))
715 return IRQ_HANDLED; 715 return IRQ_HANDLED;
@@ -944,7 +944,7 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
944 return ret; 944 return ret;
945 945
946 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 946 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
947 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); 947 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
948 948
949 return ret; 949 return ret;
950} 950}
@@ -964,7 +964,7 @@ static int tmio_mmc_card_busy(struct mmc_host *mmc)
964{ 964{
965 struct tmio_mmc_host *host = mmc_priv(mmc); 965 struct tmio_mmc_host *host = mmc_priv(mmc);
966 966
967 return !(sd_ctrl_read32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0); 967 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0);
968} 968}
969 969
970static struct mmc_host_ops tmio_mmc_ops = { 970static struct mmc_host_ops tmio_mmc_ops = {
@@ -1113,7 +1113,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1113 tmio_mmc_clk_stop(_host); 1113 tmio_mmc_clk_stop(_host);
1114 tmio_mmc_reset(_host); 1114 tmio_mmc_reset(_host);
1115 1115
1116 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); 1116 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1117 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1117 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1118 1118
1119 /* Unmask the IRQs we want to know about */ 1119 /* Unmask the IRQs we want to know about */