diff options
author | Dave Gerlach <d-gerlach@ti.com> | 2018-04-11 17:15:43 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2018-04-18 13:07:13 -0400 |
commit | 5692fceebeb7f11c07e2a990f7711a01ae437de2 (patch) | |
tree | a7a49eef9d98f4eda7fb47bde9edeeaefc85be6b /drivers/memory | |
parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) |
ARM: OMAP2+: Fix build when using split object directories
The sleep33xx and sleep43xx files should not depend on a header file
generated in drivers/memory. Remove this dependency and instead allow
both drivers/memory and arch/arm/mach-omap2 to generate all macros
needed in headers local to their own paths.
This fixes an issue where the build fail will when using O= to set a
split object directory and arch/arm/mach-omap2 is built before
drivers/memory with the following error:
.../drivers/memory/emif-asm-offsets.c:1:0: fatal error: can't open
drivers/memory/emif-asm-offsets.s for writing: No such file or directory
compilation terminated.
Fixes: 41d9d44d7258 ("ARM: OMAP2+: pm33xx-core: Add platform code needed for PM")
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r-- | drivers/memory/emif-asm-offsets.c | 72 |
1 files changed, 1 insertions, 71 deletions
diff --git a/drivers/memory/emif-asm-offsets.c b/drivers/memory/emif-asm-offsets.c index 71a89d5d3efd..db8043019ec6 100644 --- a/drivers/memory/emif-asm-offsets.c +++ b/drivers/memory/emif-asm-offsets.c | |||
@@ -16,77 +16,7 @@ | |||
16 | 16 | ||
17 | int main(void) | 17 | int main(void) |
18 | { | 18 | { |
19 | DEFINE(EMIF_SDCFG_VAL_OFFSET, | 19 | ti_emif_asm_offsets(); |
20 | offsetof(struct emif_regs_amx3, emif_sdcfg_val)); | ||
21 | DEFINE(EMIF_TIMING1_VAL_OFFSET, | ||
22 | offsetof(struct emif_regs_amx3, emif_timing1_val)); | ||
23 | DEFINE(EMIF_TIMING2_VAL_OFFSET, | ||
24 | offsetof(struct emif_regs_amx3, emif_timing2_val)); | ||
25 | DEFINE(EMIF_TIMING3_VAL_OFFSET, | ||
26 | offsetof(struct emif_regs_amx3, emif_timing3_val)); | ||
27 | DEFINE(EMIF_REF_CTRL_VAL_OFFSET, | ||
28 | offsetof(struct emif_regs_amx3, emif_ref_ctrl_val)); | ||
29 | DEFINE(EMIF_ZQCFG_VAL_OFFSET, | ||
30 | offsetof(struct emif_regs_amx3, emif_zqcfg_val)); | ||
31 | DEFINE(EMIF_PMCR_VAL_OFFSET, | ||
32 | offsetof(struct emif_regs_amx3, emif_pmcr_val)); | ||
33 | DEFINE(EMIF_PMCR_SHDW_VAL_OFFSET, | ||
34 | offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val)); | ||
35 | DEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET, | ||
36 | offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl)); | ||
37 | DEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET, | ||
38 | offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh)); | ||
39 | DEFINE(EMIF_COS_CONFIG_OFFSET, | ||
40 | offsetof(struct emif_regs_amx3, emif_cos_config)); | ||
41 | DEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET, | ||
42 | offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping)); | ||
43 | DEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET, | ||
44 | offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map)); | ||
45 | DEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET, | ||
46 | offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map)); | ||
47 | DEFINE(EMIF_OCP_CONFIG_VAL_OFFSET, | ||
48 | offsetof(struct emif_regs_amx3, emif_ocp_config_val)); | ||
49 | DEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET, | ||
50 | offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim)); | ||
51 | DEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET, | ||
52 | offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw)); | ||
53 | DEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET, | ||
54 | offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val)); | ||
55 | DEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET, | ||
56 | offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw)); | ||
57 | DEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET, | ||
58 | offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1)); | ||
59 | DEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET, | ||
60 | offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals)); | ||
61 | DEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3)); | ||
62 | |||
63 | BLANK(); | ||
64 | |||
65 | DEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET, | ||
66 | offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt)); | ||
67 | DEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET, | ||
68 | offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys)); | ||
69 | DEFINE(EMIF_PM_CONFIG_OFFSET, | ||
70 | offsetof(struct ti_emif_pm_data, ti_emif_sram_config)); | ||
71 | DEFINE(EMIF_PM_REGS_VIRT_OFFSET, | ||
72 | offsetof(struct ti_emif_pm_data, regs_virt)); | ||
73 | DEFINE(EMIF_PM_REGS_PHYS_OFFSET, | ||
74 | offsetof(struct ti_emif_pm_data, regs_phys)); | ||
75 | DEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data)); | ||
76 | |||
77 | BLANK(); | ||
78 | |||
79 | DEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET, | ||
80 | offsetof(struct ti_emif_pm_functions, save_context)); | ||
81 | DEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET, | ||
82 | offsetof(struct ti_emif_pm_functions, restore_context)); | ||
83 | DEFINE(EMIF_PM_ENTER_SR_OFFSET, | ||
84 | offsetof(struct ti_emif_pm_functions, enter_sr)); | ||
85 | DEFINE(EMIF_PM_EXIT_SR_OFFSET, | ||
86 | offsetof(struct ti_emif_pm_functions, exit_sr)); | ||
87 | DEFINE(EMIF_PM_ABORT_SR_OFFSET, | ||
88 | offsetof(struct ti_emif_pm_functions, abort_sr)); | ||
89 | DEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions)); | ||
90 | 20 | ||
91 | return 0; | 21 | return 0; |
92 | } | 22 | } |