diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-06-07 05:58:56 -0400 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2019-06-11 07:22:42 -0400 |
commit | 17c88892094973acd7176b794eff21abf24779fc (patch) | |
tree | f5358c57a2502181d188d773d955dfee429165db /drivers/irqchip | |
parent | ec93b94ac16a9ad1521ea1fcedc4747ae724a8aa (diff) |
irqchip/renesas-irqc: Use proper irq_chip name and parent
The irq_chip .name field should contain the device's class (not
instance) name, while .parent_device should point to the device itself.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-renesas-irqc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c index cde9f9c0687e..11abc09ef76c 100644 --- a/drivers/irqchip/irq-renesas-irqc.c +++ b/drivers/irqchip/irq-renesas-irqc.c | |||
@@ -176,7 +176,7 @@ static int irqc_probe(struct platform_device *pdev) | |||
176 | } | 176 | } |
177 | 177 | ||
178 | ret = irq_alloc_domain_generic_chips(p->irq_domain, p->number_of_irqs, | 178 | ret = irq_alloc_domain_generic_chips(p->irq_domain, p->number_of_irqs, |
179 | 1, name, handle_level_irq, | 179 | 1, "irqc", handle_level_irq, |
180 | 0, 0, IRQ_GC_INIT_NESTED_LOCK); | 180 | 0, 0, IRQ_GC_INIT_NESTED_LOCK); |
181 | if (ret) { | 181 | if (ret) { |
182 | dev_err(dev, "cannot allocate generic chip\n"); | 182 | dev_err(dev, "cannot allocate generic chip\n"); |
@@ -187,6 +187,7 @@ static int irqc_probe(struct platform_device *pdev) | |||
187 | p->gc->reg_base = p->cpu_int_base; | 187 | p->gc->reg_base = p->cpu_int_base; |
188 | p->gc->chip_types[0].regs.enable = IRQC_EN_SET; | 188 | p->gc->chip_types[0].regs.enable = IRQC_EN_SET; |
189 | p->gc->chip_types[0].regs.disable = IRQC_EN_STS; | 189 | p->gc->chip_types[0].regs.disable = IRQC_EN_STS; |
190 | p->gc->chip_types[0].chip.parent_device = dev; | ||
190 | p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; | 191 | p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; |
191 | p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; | 192 | p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; |
192 | p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type; | 193 | p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type; |