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authorPaul Burton <paul.burton@imgtec.com>2017-08-18 17:04:35 -0400
committerRalf Baechle <ralf@linux-mips.org>2017-09-04 07:53:15 -0400
commit07df8bfef8ce9536f93c957488a48d9d87d575c2 (patch)
treedbbdcb76c0861702d42c56000aa86bb006ff0c6e /drivers/irqchip
parentb2b2e584ceabeddbc5ea1965ca6ca435726f5de0 (diff)
irqchip: mips-gic: Use cpumask_first_and() in gic_set_affinity()
Currently in gic_set_affinity() we calculate a temporary cpumask holding the intersection of the provided cpumask & the CPUs that are online, then we call cpumask_first twice on it to find the first such CPU. Since we don't need the temporary cpumask for anything else & we only care about the first CPU that's both online & in the provided cpumask, we can instead use cpumask_first_and to find that CPU & drop the temporary mask. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17110/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-mips-gic.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 183c225b84de..8f64ac824d20 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -250,23 +250,23 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
250 bool force) 250 bool force)
251{ 251{
252 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); 252 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
253 cpumask_t tmp = CPU_MASK_NONE; 253 unsigned long flags;
254 unsigned long flags; 254 unsigned int cpu;
255 255
256 cpumask_and(&tmp, cpumask, cpu_online_mask); 256 cpu = cpumask_first_and(cpumask, cpu_online_mask);
257 if (cpumask_empty(&tmp)) 257 if (cpu >= NR_CPUS)
258 return -EINVAL; 258 return -EINVAL;
259 259
260 /* Assumption : cpumask refers to a single CPU */ 260 /* Assumption : cpumask refers to a single CPU */
261 spin_lock_irqsave(&gic_lock, flags); 261 spin_lock_irqsave(&gic_lock, flags);
262 262
263 /* Re-route this IRQ */ 263 /* Re-route this IRQ */
264 write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpumask_first(&tmp)))); 264 write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpu)));
265 265
266 /* Update the pcpu_masks */ 266 /* Update the pcpu_masks */
267 gic_clear_pcpu_masks(irq); 267 gic_clear_pcpu_masks(irq);
268 if (read_gic_mask(irq)) 268 if (read_gic_mask(irq))
269 set_bit(irq, per_cpu_ptr(pcpu_masks, cpumask_first(&tmp))); 269 set_bit(irq, per_cpu_ptr(pcpu_masks, cpu));
270 270
271 cpumask_copy(irq_data_get_affinity_mask(d), cpumask); 271 cpumask_copy(irq_data_get_affinity_mask(d), cpumask);
272 spin_unlock_irqrestore(&gic_lock, flags); 272 spin_unlock_irqrestore(&gic_lock, flags);