Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier

- Core pseudo-NMI handling code
- Allow the default irq domain to be retrieved
- A new interrupt controller for the Loongson LS1X platform
- Affinity support for the SiFive PLIC
- Better support for the iMX irqsteer driver
- NUMA aware memory allocations for GICv3
- A handful of other fixes (i8259, GICv3, PLIC)

1 files changed, 83 insertions, 32 deletions

diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c
index 5b3f1d735685..d1098f4da6a4 100644
--- a/drivers/irqchip/irq-imx-irqsteer.c
+++ b/drivers/irqchip/irq-imx-irqsteer.c
@@ -10,10 +10,11 @@
 #include <linux/irqchip/chained_irq.h>
 #include <linux/irqdomain.h>
 #include <linux/kernel.h>
+#include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/spinlock.h>
 
-#define CTRL_STRIDE_OFF(_t, _r) (_t * 8 * _r)
+#define CTRL_STRIDE_OFF(_t, _r) (_t * 4 * _r)
 #define CHANCTRL                0x0
 #define CHANMASK(n, t)          (CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
 #define CHANSET(n, t)           (CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
@@ -21,12 +22,15 @@
 #define CHAN_MINTDIS(t)         (CTRL_STRIDE_OFF(t, 3) + 0x4)
 #define CHAN_MASTRSTAT(t)       (CTRL_STRIDE_OFF(t, 3) + 0x8)
 
+#define CHAN_MAX_OUTPUT_INT     0x8
+
 struct irqsteer_data {
         void __iomem            *regs;
         struct clk              *ipg_clk;
-        int                     irq;
+        int                     irq[CHAN_MAX_OUTPUT_INT];
+        int                     irq_count;
         raw_spinlock_t          lock;
-        int                     irq_groups;
+        int                     reg_num;
         int                     channel;
         struct irq_domain       *domain;
         u32                     *saved_reg;
@@ -35,7 +39,7 @@ struct irqsteer_data {
 static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
                                       unsigned long irqnum)
 {
-        return (data->irq_groups * 2 - irqnum / 32 - 1);
+        return (data->reg_num - irqnum / 32 - 1);
 }
 
 static void imx_irqsteer_irq_unmask(struct irq_data *d)
@@ -46,9 +50,9 @@ static void imx_irqsteer_irq_unmask(struct irq_data *d)
         u32 val;
 
         raw_spin_lock_irqsave(&data->lock, flags);
-        val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
+        val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
         val |= BIT(d->hwirq % 32);
-        writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
+        writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
         raw_spin_unlock_irqrestore(&data->lock, flags);
 }
 
@@ -60,9 +64,9 @@ static void imx_irqsteer_irq_mask(struct irq_data *d)
         u32 val;
 
         raw_spin_lock_irqsave(&data->lock, flags);
-        val = readl_relaxed(data->regs + CHANMASK(idx, data->irq_groups));
+        val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
         val &= ~BIT(d->hwirq % 32);
-        writel_relaxed(val, data->regs + CHANMASK(idx, data->irq_groups));
+        writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
         raw_spin_unlock_irqrestore(&data->lock, flags);
 }
 
@@ -87,23 +91,47 @@ static const struct irq_domain_ops imx_irqsteer_domain_ops = {
         .xlate          = irq_domain_xlate_onecell,
 };
 
+static int imx_irqsteer_get_hwirq_base(struct irqsteer_data *data, u32 irq)
+{
+        int i;
+
+        for (i = 0; i < data->irq_count; i++) {
+                if (data->irq[i] == irq)
+                        return i * 64;
+        }
+
+        return -EINVAL;
+}
+
 static void imx_irqsteer_irq_handler(struct irq_desc *desc)
 {
         struct irqsteer_data *data = irq_desc_get_handler_data(desc);
-        int i;
+        int hwirq;
+        int irq, i;
 
         chained_irq_enter(irq_desc_get_chip(desc), desc);
 
-        for (i = 0; i < data->irq_groups * 64; i += 32) {
-                int idx = imx_irqsteer_get_reg_index(data, i);
+        irq = irq_desc_get_irq(desc);
+        hwirq = imx_irqsteer_get_hwirq_base(data, irq);
+        if (hwirq < 0) {
+                pr_warn("%s: unable to get hwirq base for irq %d\n",
+                        __func__, irq);
+                return;
+        }
+
+        for (i = 0; i < 2; i++, hwirq += 32) {
+                int idx = imx_irqsteer_get_reg_index(data, hwirq);
                 unsigned long irqmap;
                 int pos, virq;
 
+                if (hwirq >= data->reg_num * 32)
+                        break;
+
                 irqmap = readl_relaxed(data->regs +
-                                       CHANSTATUS(idx, data->irq_groups));
+                                       CHANSTATUS(idx, data->reg_num));
 
                 for_each_set_bit(pos, &irqmap, 32) {
-                        virq = irq_find_mapping(data->domain, pos + i);
+                        virq = irq_find_mapping(data->domain, pos + hwirq);
                         if (virq)
                                 generic_handle_irq(virq);
                 }
@@ -117,7 +145,8 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
         struct device_node *np = pdev->dev.of_node;
         struct irqsteer_data *data;
         struct resource *res;
-        int ret;
+        u32 irqs_num;
+        int i, ret;
 
         data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
         if (!data)
@@ -130,12 +159,6 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
                 return PTR_ERR(data->regs);
         }
 
-        data->irq = platform_get_irq(pdev, 0);
-        if (data->irq <= 0) {
-                dev_err(&pdev->dev, "failed to get irq\n");
-                return -ENODEV;
-        }
-
         data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
         if (IS_ERR(data->ipg_clk)) {
                 ret = PTR_ERR(data->ipg_clk);
@@ -146,12 +169,19 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
 
         raw_spin_lock_init(&data->lock);
 
-        of_property_read_u32(np, "fsl,irq-groups", &data->irq_groups);
+        of_property_read_u32(np, "fsl,num-irqs", &irqs_num);
         of_property_read_u32(np, "fsl,channel", &data->channel);
 
+        /*
+         * There is one output irq for each group of 64 inputs.
+         * One register bit map can represent 32 input interrupts.
+         */
+        data->irq_count = DIV_ROUND_UP(irqs_num, 64);
+        data->reg_num = irqs_num / 32;
+
         if (IS_ENABLED(CONFIG_PM_SLEEP)) {
                 data->saved_reg = devm_kzalloc(&pdev->dev,
-                                        sizeof(u32) * data->irq_groups * 2,
+                                        sizeof(u32) * data->reg_num,
                                         GFP_KERNEL);
                 if (!data->saved_reg)
                         return -ENOMEM;
@@ -166,27 +196,48 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
         /* steer all IRQs into configured channel */
         writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
 
-        data->domain = irq_domain_add_linear(np, data->irq_groups * 64,
+        data->domain = irq_domain_add_linear(np, data->reg_num * 32,
                                              &imx_irqsteer_domain_ops, data);
         if (!data->domain) {
                 dev_err(&pdev->dev, "failed to create IRQ domain\n");
-                clk_disable_unprepare(data->ipg_clk);
-                return -ENOMEM;
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        if (!data->irq_count || data->irq_count > CHAN_MAX_OUTPUT_INT) {
+                ret = -EINVAL;
+                goto out;
         }
 
-        irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
-                                         data);
+        for (i = 0; i < data->irq_count; i++) {
+                data->irq[i] = irq_of_parse_and_map(np, i);
+                if (!data->irq[i]) {
+                        ret = -EINVAL;
+                        goto out;
+                }
+
+                irq_set_chained_handler_and_data(data->irq[i],
+                                                 imx_irqsteer_irq_handler,
+                                                 data);
+        }
 
         platform_set_drvdata(pdev, data);
 
         return 0;
+out:
+        clk_disable_unprepare(data->ipg_clk);
+        return ret;
 }
 
 static int imx_irqsteer_remove(struct platform_device *pdev)
 {
         struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
+        int i;
+
+        for (i = 0; i < irqsteer_data->irq_count; i++)
+                irq_set_chained_handler_and_data(irqsteer_data->irq[i],
+                                                 NULL, NULL);
 
-        irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
         irq_domain_remove(irqsteer_data->domain);
 
         clk_disable_unprepare(irqsteer_data->ipg_clk);
@@ -199,9 +250,9 @@ static void imx_irqsteer_save_regs(struct irqsteer_data *data)
 {
         int i;
 
-        for (i = 0; i < data->irq_groups * 2; i++)
+        for (i = 0; i < data->reg_num; i++)
                 data->saved_reg[i] = readl_relaxed(data->regs +
-                                                CHANMASK(i, data->irq_groups));
+                                                CHANMASK(i, data->reg_num));
 }
 
 static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
@@ -209,9 +260,9 @@ static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
         int i;
 
         writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
-        for (i = 0; i < data->irq_groups * 2; i++)
+        for (i = 0; i < data->reg_num; i++)
                 writel_relaxed(data->saved_reg[i],
-                               data->regs + CHANMASK(i, data->irq_groups));
+                               data->regs + CHANMASK(i, data->reg_num));
 }
 
 static int imx_irqsteer_suspend(struct device *dev)