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authorMarc Zyngier <marc.zyngier@arm.com>2016-04-22 07:25:33 -0400
committerWill Deacon <will.deacon@arm.com>2016-04-25 10:14:00 -0400
commit25fc11aead380501d70b701e136e89d321277177 (patch)
treebef589bd1d1ab792413247e6752040f74226ab83 /drivers/irqchip/irq-gic.c
parente3661b128e53ee281e1e7c589a5b647890bd6d7c (diff)
irqchip/gic: Restore CPU interface checking
When introducing the whole CPU feature detection framework, we lost the capability to detect a mismatched GIC configuration (using the GICv2 MMIO interface, but having the system register interface enabled). In order to solve this, use the new this_cpu_has_cap() helper. Also move the check to the CPU interface path in order to catch systems where the first CPU has been correctly configured, but the secondaries are not. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
-rw-r--r--drivers/irqchip/irq-gic.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 282344b95ec2..095bb5b5c3f2 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -55,7 +55,7 @@
55 55
56static void gic_check_cpu_features(void) 56static void gic_check_cpu_features(void)
57{ 57{
58 WARN_TAINT_ONCE(cpus_have_cap(ARM64_HAS_SYSREG_GIC_CPUIF), 58 WARN_TAINT_ONCE(this_cpu_has_cap(ARM64_HAS_SYSREG_GIC_CPUIF),
59 TAINT_CPU_OUT_OF_SPEC, 59 TAINT_CPU_OUT_OF_SPEC,
60 "GICv3 system registers enabled, broken firmware!\n"); 60 "GICv3 system registers enabled, broken firmware!\n");
61} 61}
@@ -490,6 +490,7 @@ static void gic_cpu_init(struct gic_chip_data *gic)
490 * Get what the GIC says our CPU mask is. 490 * Get what the GIC says our CPU mask is.
491 */ 491 */
492 BUG_ON(cpu >= NR_GIC_CPU_IF); 492 BUG_ON(cpu >= NR_GIC_CPU_IF);
493 gic_check_cpu_features();
493 cpu_mask = gic_get_cpumask(gic); 494 cpu_mask = gic_get_cpumask(gic);
494 gic_cpu_map[cpu] = cpu_mask; 495 gic_cpu_map[cpu] = cpu_mask;
495 496
@@ -1021,8 +1022,6 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
1021 1022
1022 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR); 1023 BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
1023 1024
1024 gic_check_cpu_features();
1025
1026 gic = &gic_data[gic_nr]; 1025 gic = &gic_data[gic_nr];
1027 1026
1028 /* Initialize irq_chip */ 1027 /* Initialize irq_chip */