diff options
author | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-31 11:21:43 -0400 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-07-27 05:01:24 -0400 |
commit | 30800b3a1fb14c6f143db5616a4aaea9fef94af3 (patch) | |
tree | 48bcc72a292e8e87a2b7465ac7e6b35a8800c875 /drivers/irqchip/irq-gic-v3-its-pci-msi.c | |
parent | 12b2905af183c931bedcab4292c81d3a415e080f (diff) |
irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices
Allocating a minimum of 32 LPIs per PCI device, let's reduce it to
be just 1, as most devices do not need that many interrupts.
We still have to special-case DevID 0, as there is plenty of broken
HW around where the PCI RID is not presented as a DevID to the ITS,
and all the devices are presented as DevID 0. In this case, we keep
the 32 minimal allocation.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic-v3-its-pci-msi.c')
-rw-r--r-- | drivers/irqchip/irq-gic-v3-its-pci-msi.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c index 75c3cafabc6a..8d6d009d1d58 100644 --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c | |||
@@ -66,7 +66,7 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev, | |||
66 | { | 66 | { |
67 | struct pci_dev *pdev, *alias_dev; | 67 | struct pci_dev *pdev, *alias_dev; |
68 | struct msi_domain_info *msi_info; | 68 | struct msi_domain_info *msi_info; |
69 | int alias_count = 0; | 69 | int alias_count = 0, minnvec = 1; |
70 | 70 | ||
71 | if (!dev_is_pci(dev)) | 71 | if (!dev_is_pci(dev)) |
72 | return -EINVAL; | 72 | return -EINVAL; |
@@ -86,9 +86,17 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev, | |||
86 | /* ITS specific DeviceID, as the core ITS ignores dev. */ | 86 | /* ITS specific DeviceID, as the core ITS ignores dev. */ |
87 | info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev); | 87 | info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev); |
88 | 88 | ||
89 | /* Allocate at least 32 MSIs, and always as a power of 2 */ | 89 | /* |
90 | * Always allocate a power of 2, and special case device 0 for | ||
91 | * broken systems where the DevID is not wired (and all devices | ||
92 | * appear as DevID 0). For that reason, we generously allocate a | ||
93 | * minimum of 32 MSIs for DevID 0. If you want more because all | ||
94 | * your devices are aliasing to DevID 0, consider fixing your HW. | ||
95 | */ | ||
90 | nvec = max(nvec, alias_count); | 96 | nvec = max(nvec, alias_count); |
91 | nvec = max_t(int, 32, roundup_pow_of_two(nvec)); | 97 | if (!info->scratchpad[0].ul) |
98 | minnvec = 32; | ||
99 | nvec = max_t(int, minnvec, roundup_pow_of_two(nvec)); | ||
92 | return msi_info->ops->msi_prepare(domain->parent, dev, nvec, info); | 100 | return msi_info->ops->msi_prepare(domain->parent, dev, nvec, info); |
93 | } | 101 | } |
94 | 102 | ||