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authorRobin Murphy <robin.murphy@arm.com>2018-07-11 15:40:35 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-07-15 07:52:59 -0400
commitccff2dfaceaca4517432f5c149594215fe9098cc (patch)
treeb7cb5f2cb28ed1f5aff83ed395b7c2354ebd281a /drivers/hwtracing
parent434d611cddef1ceed32bf416a363992b01a3ff9a (diff)
coresight: tpiu: Fix disabling timeouts
Probing the TPIU driver under UBSan triggers an out-of-bounds shift warning in coresight_timeout(): ... [ 5.677530] UBSAN: Undefined behaviour in drivers/hwtracing/coresight/coresight.c:929:16 [ 5.685542] shift exponent 64 is too large for 64-bit type 'long unsigned int' ... On closer inspection things are exponentially out of whack because we're passing a bitmask where a bit number should be. Amusingly, it seems that both calls will find their expected values by sheer luck and appear to succeed: 1 << FFCR_FON_MAN ends up at bit 64 which whilst undefined evaluates as zero in practice, while 1 << FFSR_FT_STOPPED finds bit 2 (TCPresent) which apparently is usually tied high. Following the examples of other drivers, define separate FOO and FOO_BIT macros for masks vs. indices, and put things right. CC: Robert Walker <robert.walker@arm.com> CC: Mike Leach <mike.leach@linaro.org> CC: Mathieu Poirier <mathieu.poirier@linaro.org> Fixes: 11595db8e17f ("coresight: Fix disabling of CoreSight TPIU") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing')
-rw-r--r--drivers/hwtracing/coresight/coresight-tpiu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
index 01b7457fe8fc..459ef930d98c 100644
--- a/drivers/hwtracing/coresight/coresight-tpiu.c
+++ b/drivers/hwtracing/coresight/coresight-tpiu.c
@@ -40,8 +40,9 @@
40 40
41/** register definition **/ 41/** register definition **/
42/* FFSR - 0x300 */ 42/* FFSR - 0x300 */
43#define FFSR_FT_STOPPED BIT(1) 43#define FFSR_FT_STOPPED_BIT 1
44/* FFCR - 0x304 */ 44/* FFCR - 0x304 */
45#define FFCR_FON_MAN_BIT 6
45#define FFCR_FON_MAN BIT(6) 46#define FFCR_FON_MAN BIT(6)
46#define FFCR_STOP_FI BIT(12) 47#define FFCR_STOP_FI BIT(12)
47 48
@@ -86,9 +87,9 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
86 /* Generate manual flush */ 87 /* Generate manual flush */
87 writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); 88 writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
88 /* Wait for flush to complete */ 89 /* Wait for flush to complete */
89 coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN, 0); 90 coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
90 /* Wait for formatter to stop */ 91 /* Wait for formatter to stop */
91 coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED, 1); 92 coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
92 93
93 CS_LOCK(drvdata->base); 94 CS_LOCK(drvdata->base);
94} 95}