diff options
author | Dave Airlie <airlied@gmail.com> | 2014-07-02 17:55:32 -0400 |
---|---|---|
committer | Dave Airlie <airlied@gmail.com> | 2014-07-02 17:55:32 -0400 |
commit | e55a379827ed02c4982250fc815fed47def53a45 (patch) | |
tree | f3ad6a2b9e928381dd55e32b56b3b799874e570a /drivers/gpu | |
parent | 186026874cdb57e91cdd080150162f0380348824 (diff) | |
parent | 7dae77f8809a81b0dc5195debae8fd78cbbcc550 (diff) |
Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux
misc fixes, output fixes for 4k monitor, dpm lockup fixes
* 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: page table BOs are kernel allocations
drm/radeon/cik: fix typo in EOP packet
drm/radeon: Track the status of a page flip more explicitly
drm/radeon/dpm: fix vddci setup typo on cayman
drm/radeon/dpm: fix typo in vddci setup for eg/btc
drm/radeon: use RADEON_MAX_CRTCS, RADEON_MAX_AFMT_BLOCKS (v2)
drm/radeon: Use only one line for whole DPCD debug output
drm/radeon: add a module parameter to control deep color support
drm/radeon: enable bapm by default on desktop TN/RL boards
drm/radeon: enable bapm by default on KV/KB
drm/radeon: only apply bapm changes for AC power on ARUBA
drm/radeon: adjust default dispclk on DCE6 (v2)
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_dp.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cikd.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cypress_dpm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/kv_dpm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_vm.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/trinity_dpm.c | 10 |
14 files changed, 70 insertions, 26 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index c5b1f2da3954..35f4182c63b6 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
@@ -403,16 +403,18 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector) | |||
403 | { | 403 | { |
404 | struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; | 404 | struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; |
405 | u8 msg[DP_DPCD_SIZE]; | 405 | u8 msg[DP_DPCD_SIZE]; |
406 | int ret, i; | 406 | int ret; |
407 | |||
408 | char dpcd_hex_dump[DP_DPCD_SIZE * 3]; | ||
407 | 409 | ||
408 | ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg, | 410 | ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg, |
409 | DP_DPCD_SIZE); | 411 | DP_DPCD_SIZE); |
410 | if (ret > 0) { | 412 | if (ret > 0) { |
411 | memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); | 413 | memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); |
412 | DRM_DEBUG_KMS("DPCD: "); | 414 | |
413 | for (i = 0; i < DP_DPCD_SIZE; i++) | 415 | hex_dump_to_buffer(dig_connector->dpcd, sizeof(dig_connector->dpcd), |
414 | DRM_DEBUG_KMS("%02x ", msg[i]); | 416 | 32, 1, dpcd_hex_dump, sizeof(dpcd_hex_dump), false); |
415 | DRM_DEBUG_KMS("\n"); | 417 | DRM_DEBUG_KMS("DPCD: %s\n", dpcd_hex_dump); |
416 | 418 | ||
417 | radeon_dp_probe_oui(radeon_connector); | 419 | radeon_dp_probe_oui(radeon_connector); |
418 | 420 | ||
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h index ae88660f34ea..0c6e1b55d968 100644 --- a/drivers/gpu/drm/radeon/cikd.h +++ b/drivers/gpu/drm/radeon/cikd.h | |||
@@ -1752,12 +1752,12 @@ | |||
1752 | #define EOP_TC_WB_ACTION_EN (1 << 15) /* L2 */ | 1752 | #define EOP_TC_WB_ACTION_EN (1 << 15) /* L2 */ |
1753 | #define EOP_TCL1_ACTION_EN (1 << 16) | 1753 | #define EOP_TCL1_ACTION_EN (1 << 16) |
1754 | #define EOP_TC_ACTION_EN (1 << 17) /* L2 */ | 1754 | #define EOP_TC_ACTION_EN (1 << 17) /* L2 */ |
1755 | #define EOP_TCL2_VOLATILE (1 << 24) | ||
1755 | #define EOP_CACHE_POLICY(x) ((x) << 25) | 1756 | #define EOP_CACHE_POLICY(x) ((x) << 25) |
1756 | /* 0 - LRU | 1757 | /* 0 - LRU |
1757 | * 1 - Stream | 1758 | * 1 - Stream |
1758 | * 2 - Bypass | 1759 | * 2 - Bypass |
1759 | */ | 1760 | */ |
1760 | #define EOP_TCL2_VOLATILE (1 << 27) | ||
1761 | #define DATA_SEL(x) ((x) << 29) | 1761 | #define DATA_SEL(x) ((x) << 29) |
1762 | /* 0 - discard | 1762 | /* 0 - discard |
1763 | * 1 - send low 32bit data | 1763 | * 1 - send low 32bit data |
diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c index 5a9a5f4d7888..47d31e915758 100644 --- a/drivers/gpu/drm/radeon/cypress_dpm.c +++ b/drivers/gpu/drm/radeon/cypress_dpm.c | |||
@@ -1551,7 +1551,7 @@ int cypress_populate_smc_voltage_tables(struct radeon_device *rdev, | |||
1551 | 1551 | ||
1552 | table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDCI] = 0; | 1552 | table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDCI] = 0; |
1553 | table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDCI] = | 1553 | table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDCI] = |
1554 | cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); | 1554 | cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); |
1555 | } | 1555 | } |
1556 | 1556 | ||
1557 | return 0; | 1557 | return 0; |
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index 3f6e817d97ee..9ef8c38f2d66 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c | |||
@@ -2726,7 +2726,7 @@ int kv_dpm_init(struct radeon_device *rdev) | |||
2726 | pi->caps_sclk_ds = true; | 2726 | pi->caps_sclk_ds = true; |
2727 | pi->enable_auto_thermal_throttling = true; | 2727 | pi->enable_auto_thermal_throttling = true; |
2728 | pi->disable_nb_ps3_in_battery = false; | 2728 | pi->disable_nb_ps3_in_battery = false; |
2729 | pi->bapm_enable = false; | 2729 | pi->bapm_enable = true; |
2730 | pi->voltage_drop_t = 0; | 2730 | pi->voltage_drop_t = 0; |
2731 | pi->caps_sclk_throttle_low_notification = false; | 2731 | pi->caps_sclk_throttle_low_notification = false; |
2732 | pi->caps_fps = false; /* true? */ | 2732 | pi->caps_fps = false; /* true? */ |
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 004c931606c4..01fc4888e6fe 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c | |||
@@ -1315,7 +1315,7 @@ static void ni_populate_smc_voltage_tables(struct radeon_device *rdev, | |||
1315 | 1315 | ||
1316 | table->voltageMaskTable.highMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] = 0; | 1316 | table->voltageMaskTable.highMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] = 0; |
1317 | table->voltageMaskTable.lowMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] = | 1317 | table->voltageMaskTable.lowMask[NISLANDS_SMC_VOLTAGEMASK_VDDCI] = |
1318 | cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); | 1318 | cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); |
1319 | } | 1319 | } |
1320 | } | 1320 | } |
1321 | 1321 | ||
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 4b0bbf88d5c0..29d9cc04c04e 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -102,6 +102,7 @@ extern int radeon_runtime_pm; | |||
102 | extern int radeon_hard_reset; | 102 | extern int radeon_hard_reset; |
103 | extern int radeon_vm_size; | 103 | extern int radeon_vm_size; |
104 | extern int radeon_vm_block_size; | 104 | extern int radeon_vm_block_size; |
105 | extern int radeon_deep_color; | ||
105 | 106 | ||
106 | /* | 107 | /* |
107 | * Copy from radeon_drv.h so we don't have to include both and have conflicting | 108 | * Copy from radeon_drv.h so we don't have to include both and have conflicting |
@@ -749,10 +750,6 @@ union radeon_irq_stat_regs { | |||
749 | struct cik_irq_stat_regs cik; | 750 | struct cik_irq_stat_regs cik; |
750 | }; | 751 | }; |
751 | 752 | ||
752 | #define RADEON_MAX_HPD_PINS 7 | ||
753 | #define RADEON_MAX_CRTCS 6 | ||
754 | #define RADEON_MAX_AFMT_BLOCKS 7 | ||
755 | |||
756 | struct radeon_irq { | 753 | struct radeon_irq { |
757 | bool installed; | 754 | bool installed; |
758 | spinlock_t lock; | 755 | spinlock_t lock; |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 30844814c25a..173f378428a9 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1227,11 +1227,19 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
1227 | rdev->clock.default_dispclk = | 1227 | rdev->clock.default_dispclk = |
1228 | le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq); | 1228 | le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq); |
1229 | if (rdev->clock.default_dispclk == 0) { | 1229 | if (rdev->clock.default_dispclk == 0) { |
1230 | if (ASIC_IS_DCE5(rdev)) | 1230 | if (ASIC_IS_DCE6(rdev)) |
1231 | rdev->clock.default_dispclk = 60000; /* 600 Mhz */ | ||
1232 | else if (ASIC_IS_DCE5(rdev)) | ||
1231 | rdev->clock.default_dispclk = 54000; /* 540 Mhz */ | 1233 | rdev->clock.default_dispclk = 54000; /* 540 Mhz */ |
1232 | else | 1234 | else |
1233 | rdev->clock.default_dispclk = 60000; /* 600 Mhz */ | 1235 | rdev->clock.default_dispclk = 60000; /* 600 Mhz */ |
1234 | } | 1236 | } |
1237 | /* set a reasonable default for DP */ | ||
1238 | if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) { | ||
1239 | DRM_INFO("Changing default dispclk from %dMhz to 600Mhz\n", | ||
1240 | rdev->clock.default_dispclk / 100); | ||
1241 | rdev->clock.default_dispclk = 60000; | ||
1242 | } | ||
1235 | rdev->clock.dp_extclk = | 1243 | rdev->clock.dp_extclk = |
1236 | le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq); | 1244 | le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq); |
1237 | rdev->clock.current_dispclk = rdev->clock.default_dispclk; | 1245 | rdev->clock.current_dispclk = rdev->clock.default_dispclk; |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 1b9177ed181f..44831197e82e 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -199,6 +199,9 @@ int radeon_get_monitor_bpc(struct drm_connector *connector) | |||
199 | } | 199 | } |
200 | } | 200 | } |
201 | 201 | ||
202 | if ((radeon_deep_color == 0) && (bpc > 8)) | ||
203 | bpc = 8; | ||
204 | |||
202 | DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n", | 205 | DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n", |
203 | connector->name, connector->display_info.bpc, bpc); | 206 | connector->name, connector->display_info.bpc, bpc); |
204 | 207 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 8fc362aa6a1a..13896edcf0b6 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -285,7 +285,6 @@ static void radeon_unpin_work_func(struct work_struct *__work) | |||
285 | void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id) | 285 | void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id) |
286 | { | 286 | { |
287 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 287 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
288 | struct radeon_flip_work *work; | ||
289 | unsigned long flags; | 288 | unsigned long flags; |
290 | u32 update_pending; | 289 | u32 update_pending; |
291 | int vpos, hpos; | 290 | int vpos, hpos; |
@@ -295,8 +294,11 @@ void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id) | |||
295 | return; | 294 | return; |
296 | 295 | ||
297 | spin_lock_irqsave(&rdev->ddev->event_lock, flags); | 296 | spin_lock_irqsave(&rdev->ddev->event_lock, flags); |
298 | work = radeon_crtc->flip_work; | 297 | if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { |
299 | if (work == NULL) { | 298 | DRM_DEBUG_DRIVER("radeon_crtc->flip_status = %d != " |
299 | "RADEON_FLIP_SUBMITTED(%d)\n", | ||
300 | radeon_crtc->flip_status, | ||
301 | RADEON_FLIP_SUBMITTED); | ||
300 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); | 302 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); |
301 | return; | 303 | return; |
302 | } | 304 | } |
@@ -344,12 +346,17 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) | |||
344 | 346 | ||
345 | spin_lock_irqsave(&rdev->ddev->event_lock, flags); | 347 | spin_lock_irqsave(&rdev->ddev->event_lock, flags); |
346 | work = radeon_crtc->flip_work; | 348 | work = radeon_crtc->flip_work; |
347 | if (work == NULL) { | 349 | if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { |
350 | DRM_DEBUG_DRIVER("radeon_crtc->flip_status = %d != " | ||
351 | "RADEON_FLIP_SUBMITTED(%d)\n", | ||
352 | radeon_crtc->flip_status, | ||
353 | RADEON_FLIP_SUBMITTED); | ||
348 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); | 354 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); |
349 | return; | 355 | return; |
350 | } | 356 | } |
351 | 357 | ||
352 | /* Pageflip completed. Clean up. */ | 358 | /* Pageflip completed. Clean up. */ |
359 | radeon_crtc->flip_status = RADEON_FLIP_NONE; | ||
353 | radeon_crtc->flip_work = NULL; | 360 | radeon_crtc->flip_work = NULL; |
354 | 361 | ||
355 | /* wakeup userspace */ | 362 | /* wakeup userspace */ |
@@ -476,6 +483,7 @@ static void radeon_flip_work_func(struct work_struct *__work) | |||
476 | /* do the flip (mmio) */ | 483 | /* do the flip (mmio) */ |
477 | radeon_page_flip(rdev, radeon_crtc->crtc_id, base); | 484 | radeon_page_flip(rdev, radeon_crtc->crtc_id, base); |
478 | 485 | ||
486 | radeon_crtc->flip_status = RADEON_FLIP_SUBMITTED; | ||
479 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); | 487 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
480 | up_read(&rdev->exclusive_lock); | 488 | up_read(&rdev->exclusive_lock); |
481 | 489 | ||
@@ -544,7 +552,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, | |||
544 | /* We borrow the event spin lock for protecting flip_work */ | 552 | /* We borrow the event spin lock for protecting flip_work */ |
545 | spin_lock_irqsave(&crtc->dev->event_lock, flags); | 553 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
546 | 554 | ||
547 | if (radeon_crtc->flip_work) { | 555 | if (radeon_crtc->flip_status != RADEON_FLIP_NONE) { |
548 | DRM_DEBUG_DRIVER("flip queue: crtc already busy\n"); | 556 | DRM_DEBUG_DRIVER("flip queue: crtc already busy\n"); |
549 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); | 557 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
550 | drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base); | 558 | drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base); |
@@ -552,6 +560,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, | |||
552 | kfree(work); | 560 | kfree(work); |
553 | return -EBUSY; | 561 | return -EBUSY; |
554 | } | 562 | } |
563 | radeon_crtc->flip_status = RADEON_FLIP_PENDING; | ||
555 | radeon_crtc->flip_work = work; | 564 | radeon_crtc->flip_work = work; |
556 | 565 | ||
557 | /* update crtc fb */ | 566 | /* update crtc fb */ |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 6e3017413386..cb1421369e3a 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -175,6 +175,7 @@ int radeon_runtime_pm = -1; | |||
175 | int radeon_hard_reset = 0; | 175 | int radeon_hard_reset = 0; |
176 | int radeon_vm_size = 4096; | 176 | int radeon_vm_size = 4096; |
177 | int radeon_vm_block_size = 9; | 177 | int radeon_vm_block_size = 9; |
178 | int radeon_deep_color = 0; | ||
178 | 179 | ||
179 | MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); | 180 | MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); |
180 | module_param_named(no_wb, radeon_no_wb, int, 0444); | 181 | module_param_named(no_wb, radeon_no_wb, int, 0444); |
@@ -248,6 +249,9 @@ module_param_named(vm_size, radeon_vm_size, int, 0444); | |||
248 | MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); | 249 | MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); |
249 | module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); | 250 | module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); |
250 | 251 | ||
252 | MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); | ||
253 | module_param_named(deep_color, radeon_deep_color, int, 0444); | ||
254 | |||
251 | static struct pci_device_id pciidlist[] = { | 255 | static struct pci_device_id pciidlist[] = { |
252 | radeon_PCI_IDS | 256 | radeon_PCI_IDS |
253 | }; | 257 | }; |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index ad0e4b8cc7e3..0592ddb0904b 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -46,6 +46,10 @@ struct radeon_device; | |||
46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) | 46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) | 47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
48 | 48 | ||
49 | #define RADEON_MAX_HPD_PINS 7 | ||
50 | #define RADEON_MAX_CRTCS 6 | ||
51 | #define RADEON_MAX_AFMT_BLOCKS 7 | ||
52 | |||
49 | enum radeon_rmx_type { | 53 | enum radeon_rmx_type { |
50 | RMX_OFF, | 54 | RMX_OFF, |
51 | RMX_FULL, | 55 | RMX_FULL, |
@@ -233,8 +237,8 @@ struct radeon_mode_info { | |||
233 | struct card_info *atom_card_info; | 237 | struct card_info *atom_card_info; |
234 | enum radeon_connector_table connector_table; | 238 | enum radeon_connector_table connector_table; |
235 | bool mode_config_initialized; | 239 | bool mode_config_initialized; |
236 | struct radeon_crtc *crtcs[6]; | 240 | struct radeon_crtc *crtcs[RADEON_MAX_CRTCS]; |
237 | struct radeon_afmt *afmt[7]; | 241 | struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS]; |
238 | /* DVI-I properties */ | 242 | /* DVI-I properties */ |
239 | struct drm_property *coherent_mode_property; | 243 | struct drm_property *coherent_mode_property; |
240 | /* DAC enable load detect */ | 244 | /* DAC enable load detect */ |
@@ -302,6 +306,12 @@ struct radeon_atom_ss { | |||
302 | uint16_t amount; | 306 | uint16_t amount; |
303 | }; | 307 | }; |
304 | 308 | ||
309 | enum radeon_flip_status { | ||
310 | RADEON_FLIP_NONE, | ||
311 | RADEON_FLIP_PENDING, | ||
312 | RADEON_FLIP_SUBMITTED | ||
313 | }; | ||
314 | |||
305 | struct radeon_crtc { | 315 | struct radeon_crtc { |
306 | struct drm_crtc base; | 316 | struct drm_crtc base; |
307 | int crtc_id; | 317 | int crtc_id; |
@@ -327,6 +337,7 @@ struct radeon_crtc { | |||
327 | /* page flipping */ | 337 | /* page flipping */ |
328 | struct workqueue_struct *flip_queue; | 338 | struct workqueue_struct *flip_queue; |
329 | struct radeon_flip_work *flip_work; | 339 | struct radeon_flip_work *flip_work; |
340 | enum radeon_flip_status flip_status; | ||
330 | /* pll sharing */ | 341 | /* pll sharing */ |
331 | struct radeon_atom_ss ss; | 342 | struct radeon_atom_ss ss; |
332 | bool ss_enabled; | 343 | bool ss_enabled; |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 12c663e86ca1..e447e390d09a 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -73,8 +73,10 @@ void radeon_pm_acpi_event_handler(struct radeon_device *rdev) | |||
73 | rdev->pm.dpm.ac_power = true; | 73 | rdev->pm.dpm.ac_power = true; |
74 | else | 74 | else |
75 | rdev->pm.dpm.ac_power = false; | 75 | rdev->pm.dpm.ac_power = false; |
76 | if (rdev->asic->dpm.enable_bapm) | 76 | if (rdev->family == CHIP_ARUBA) { |
77 | radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); | 77 | if (rdev->asic->dpm.enable_bapm) |
78 | radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); | ||
79 | } | ||
78 | mutex_unlock(&rdev->pm.mutex); | 80 | mutex_unlock(&rdev->pm.mutex); |
79 | } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | 81 | } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
80 | if (rdev->pm.profile == PM_PROFILE_AUTO) { | 82 | if (rdev->pm.profile == PM_PROFILE_AUTO) { |
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 899d9126cad6..eecff6bbd341 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c | |||
@@ -495,7 +495,7 @@ int radeon_vm_bo_set_addr(struct radeon_device *rdev, | |||
495 | mutex_unlock(&vm->mutex); | 495 | mutex_unlock(&vm->mutex); |
496 | 496 | ||
497 | r = radeon_bo_create(rdev, RADEON_VM_PTE_COUNT * 8, | 497 | r = radeon_bo_create(rdev, RADEON_VM_PTE_COUNT * 8, |
498 | RADEON_GPU_PAGE_SIZE, false, | 498 | RADEON_GPU_PAGE_SIZE, true, |
499 | RADEON_GEM_DOMAIN_VRAM, NULL, &pt); | 499 | RADEON_GEM_DOMAIN_VRAM, NULL, &pt); |
500 | if (r) | 500 | if (r) |
501 | return r; | 501 | return r; |
@@ -992,7 +992,7 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm) | |||
992 | return -ENOMEM; | 992 | return -ENOMEM; |
993 | } | 993 | } |
994 | 994 | ||
995 | r = radeon_bo_create(rdev, pd_size, align, false, | 995 | r = radeon_bo_create(rdev, pd_size, align, true, |
996 | RADEON_GEM_DOMAIN_VRAM, NULL, | 996 | RADEON_GEM_DOMAIN_VRAM, NULL, |
997 | &vm->page_directory); | 997 | &vm->page_directory); |
998 | if (r) | 998 | if (r) |
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index 2a2822c03329..20da6ff183df 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c | |||
@@ -1874,7 +1874,15 @@ int trinity_dpm_init(struct radeon_device *rdev) | |||
1874 | for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) | 1874 | for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) |
1875 | pi->at[i] = TRINITY_AT_DFLT; | 1875 | pi->at[i] = TRINITY_AT_DFLT; |
1876 | 1876 | ||
1877 | pi->enable_bapm = false; | 1877 | /* There are stability issues reported on latops with |
1878 | * bapm installed when switching between AC and battery | ||
1879 | * power. At the same time, some desktop boards hang | ||
1880 | * if it's not enabled and dpm is enabled. | ||
1881 | */ | ||
1882 | if (rdev->flags & RADEON_IS_MOBILITY) | ||
1883 | pi->enable_bapm = false; | ||
1884 | else | ||
1885 | pi->enable_bapm = true; | ||
1878 | pi->enable_nbps_policy = true; | 1886 | pi->enable_nbps_policy = true; |
1879 | pi->enable_sclk_ds = true; | 1887 | pi->enable_sclk_ds = true; |
1880 | pi->enable_gfx_power_gating = true; | 1888 | pi->enable_gfx_power_gating = true; |