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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2019-03-19 08:17:02 -0400
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2019-03-21 04:49:04 -0400
commitff01e6971ecd9ba6a9c0538c46d713f38a751f11 (patch)
tree2d9ea57fe069f751141297e3d8a34e755e46da2c /drivers/gpu/drm
parent34965a52dcf91ffecd7f1a450e5abb104f742d9c (diff)
drm/fourcc: Fix conflicting Y41x definitions
There has unfortunately been a conflict with the following 3 commits: commit e9961ab95af81b8d29054361cd5f0c575102cf87 Author: Ayan Kumar Halder <ayan.halder@arm.com> Date: Fri Nov 9 17:21:12 2018 +0000 drm: Added a new format DRM_FORMAT_XVYU2101010 commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3 Author: Brian Starkey <brian.starkey@arm.com> Date: Fri Oct 5 10:27:00 2018 +0100 drm/fourcc: Add AFBC yuv fourccs for Mali and commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b Author: Swati Sharma <swati2.sharma@intel.com> Date: Mon Mar 4 17:26:33 2019 +0530 drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc Unfortunately gcc didn't warn about the redefinitions, because the double defines were the set to same value, and gcc apparently no longer warns about that. Fix this by using new XYVU for i915, without alpha, and making the Y41x definitions match msdn, with alpha. Fortunately we caught it early, and the conflict hasn't even landed in drm-next yet. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Brian Starkey <Brian.Starkey@arm.com> Cc: Swati Sharma <swati2.sharma@intel.com> Cc: Ayan Kumar Halder <ayan.halder@arm.com> Cc: malidp@foss.arm.com Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: Dave Airlie <airlied@linux.ie> Cc: Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190319121702.6814-1-maarten.lankhorst@linux.intel.com Acked-by: Jani Nikula <jani.nikula@intel.com> #irc Acked-by: Sean Paul <sean@poorly.run> Reviewed-by: Ayan Kumar halder <ayan.halder@arm.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/drm_fourcc.c12
-rw-r--r--drivers/gpu/drm/i915/intel_display.c18
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c30
3 files changed, 30 insertions, 30 deletions
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index b914b16db9b2..6ea55fb4526d 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
229 { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, 229 { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
230 { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, 230 { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
231 { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, 231 { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
232 { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
233 { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, 232 { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
234 { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
235 { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true }, 233 { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
236 { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
237 { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, 234 { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
238 { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, 235 { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
239 { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, 236 { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
240 { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, 237 { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
241 { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, 238 { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
242 { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, 239 { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
240 { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
241 { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
242 { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
243 { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1, 243 { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
244 .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 }, 244 .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
245 .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true }, 245 .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a5ad18c3bf44..94496488641c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
2690 case PLANE_CTL_FORMAT_Y216: 2690 case PLANE_CTL_FORMAT_Y216:
2691 return DRM_FORMAT_Y216; 2691 return DRM_FORMAT_Y216;
2692 case PLANE_CTL_FORMAT_Y410: 2692 case PLANE_CTL_FORMAT_Y410:
2693 return DRM_FORMAT_Y410; 2693 return DRM_FORMAT_XVYU2101010;
2694 case PLANE_CTL_FORMAT_Y412: 2694 case PLANE_CTL_FORMAT_Y412:
2695 return DRM_FORMAT_Y412; 2695 return DRM_FORMAT_XVYU12_16161616;
2696 case PLANE_CTL_FORMAT_Y416: 2696 case PLANE_CTL_FORMAT_Y416:
2697 return DRM_FORMAT_Y416; 2697 return DRM_FORMAT_XVYU16161616;
2698 default: 2698 default:
2699 case PLANE_CTL_FORMAT_XRGB_8888: 2699 case PLANE_CTL_FORMAT_XRGB_8888:
2700 if (rgb_order) { 2700 if (rgb_order) {
@@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
3648 return PLANE_CTL_FORMAT_Y212; 3648 return PLANE_CTL_FORMAT_Y212;
3649 case DRM_FORMAT_Y216: 3649 case DRM_FORMAT_Y216:
3650 return PLANE_CTL_FORMAT_Y216; 3650 return PLANE_CTL_FORMAT_Y216;
3651 case DRM_FORMAT_Y410: 3651 case DRM_FORMAT_XVYU2101010:
3652 return PLANE_CTL_FORMAT_Y410; 3652 return PLANE_CTL_FORMAT_Y410;
3653 case DRM_FORMAT_Y412: 3653 case DRM_FORMAT_XVYU12_16161616:
3654 return PLANE_CTL_FORMAT_Y412; 3654 return PLANE_CTL_FORMAT_Y412;
3655 case DRM_FORMAT_Y416: 3655 case DRM_FORMAT_XVYU16161616:
3656 return PLANE_CTL_FORMAT_Y416; 3656 return PLANE_CTL_FORMAT_Y416;
3657 default: 3657 default:
3658 MISSING_CASE(pixel_format); 3658 MISSING_CASE(pixel_format);
@@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
5216 case DRM_FORMAT_Y210: 5216 case DRM_FORMAT_Y210:
5217 case DRM_FORMAT_Y212: 5217 case DRM_FORMAT_Y212:
5218 case DRM_FORMAT_Y216: 5218 case DRM_FORMAT_Y216:
5219 case DRM_FORMAT_Y410: 5219 case DRM_FORMAT_XVYU2101010:
5220 case DRM_FORMAT_Y412: 5220 case DRM_FORMAT_XVYU12_16161616:
5221 case DRM_FORMAT_Y416: 5221 case DRM_FORMAT_XVYU16161616:
5222 break; 5222 break;
5223 default: 5223 default:
5224 DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n", 5224 DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9892c88ede1d..53174d579574 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
1821 DRM_FORMAT_Y210, 1821 DRM_FORMAT_Y210,
1822 DRM_FORMAT_Y212, 1822 DRM_FORMAT_Y212,
1823 DRM_FORMAT_Y216, 1823 DRM_FORMAT_Y216,
1824 DRM_FORMAT_Y410, 1824 DRM_FORMAT_XVYU2101010,
1825 DRM_FORMAT_Y412, 1825 DRM_FORMAT_XVYU12_16161616,
1826 DRM_FORMAT_Y416, 1826 DRM_FORMAT_XVYU16161616,
1827}; 1827};
1828 1828
1829static const uint32_t icl_hdr_plane_formats[] = { 1829static const uint32_t icl_hdr_plane_formats[] = {
@@ -1846,9 +1846,9 @@ static const uint32_t icl_hdr_plane_formats[] = {
1846 DRM_FORMAT_Y210, 1846 DRM_FORMAT_Y210,
1847 DRM_FORMAT_Y212, 1847 DRM_FORMAT_Y212,
1848 DRM_FORMAT_Y216, 1848 DRM_FORMAT_Y216,
1849 DRM_FORMAT_Y410, 1849 DRM_FORMAT_XVYU2101010,
1850 DRM_FORMAT_Y412, 1850 DRM_FORMAT_XVYU12_16161616,
1851 DRM_FORMAT_Y416, 1851 DRM_FORMAT_XVYU16161616,
1852}; 1852};
1853 1853
1854static const u32 skl_planar_formats[] = { 1854static const u32 skl_planar_formats[] = {
@@ -1906,9 +1906,9 @@ static const uint32_t icl_planar_formats[] = {
1906 DRM_FORMAT_Y210, 1906 DRM_FORMAT_Y210,
1907 DRM_FORMAT_Y212, 1907 DRM_FORMAT_Y212,
1908 DRM_FORMAT_Y216, 1908 DRM_FORMAT_Y216,
1909 DRM_FORMAT_Y410, 1909 DRM_FORMAT_XVYU2101010,
1910 DRM_FORMAT_Y412, 1910 DRM_FORMAT_XVYU12_16161616,
1911 DRM_FORMAT_Y416, 1911 DRM_FORMAT_XVYU16161616,
1912}; 1912};
1913 1913
1914static const uint32_t icl_hdr_planar_formats[] = { 1914static const uint32_t icl_hdr_planar_formats[] = {
@@ -1935,9 +1935,9 @@ static const uint32_t icl_hdr_planar_formats[] = {
1935 DRM_FORMAT_Y210, 1935 DRM_FORMAT_Y210,
1936 DRM_FORMAT_Y212, 1936 DRM_FORMAT_Y212,
1937 DRM_FORMAT_Y216, 1937 DRM_FORMAT_Y216,
1938 DRM_FORMAT_Y410, 1938 DRM_FORMAT_XVYU2101010,
1939 DRM_FORMAT_Y412, 1939 DRM_FORMAT_XVYU12_16161616,
1940 DRM_FORMAT_Y416, 1940 DRM_FORMAT_XVYU16161616,
1941}; 1941};
1942 1942
1943static const u64 skl_plane_format_modifiers_noccs[] = { 1943static const u64 skl_plane_format_modifiers_noccs[] = {
@@ -2085,9 +2085,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
2085 case DRM_FORMAT_Y210: 2085 case DRM_FORMAT_Y210:
2086 case DRM_FORMAT_Y212: 2086 case DRM_FORMAT_Y212:
2087 case DRM_FORMAT_Y216: 2087 case DRM_FORMAT_Y216:
2088 case DRM_FORMAT_Y410: 2088 case DRM_FORMAT_XVYU2101010:
2089 case DRM_FORMAT_Y412: 2089 case DRM_FORMAT_XVYU12_16161616:
2090 case DRM_FORMAT_Y416: 2090 case DRM_FORMAT_XVYU16161616:
2091 if (modifier == I915_FORMAT_MOD_Yf_TILED) 2091 if (modifier == I915_FORMAT_MOD_Yf_TILED)
2092 return true; 2092 return true;
2093 /* fall through */ 2093 /* fall through */