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authorJulia Cartwright <julia@ni.com>2017-03-21 18:43:09 -0400
committerLinus Walleij <linus.walleij@linaro.org>2017-03-28 05:13:59 -0400
commitea38ce081d155534494bac5df2bb0d343fb1679b (patch)
treee76970c32b86f621a9a2bbd53ba8369e261ca7c4 /drivers/gpio
parent3906e8089af3225a0a22c12cc3cf10be4630976e (diff)
gpio: pci-idio-16: make use of raw_spinlock variants
The pci-idio-16 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-pci-idio-16.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c
index 269ab628634b..7de4f6a2cb49 100644
--- a/drivers/gpio/gpio-pci-idio-16.c
+++ b/drivers/gpio/gpio-pci-idio-16.c
@@ -59,7 +59,7 @@ struct idio_16_gpio_reg {
59 */ 59 */
60struct idio_16_gpio { 60struct idio_16_gpio {
61 struct gpio_chip chip; 61 struct gpio_chip chip;
62 spinlock_t lock; 62 raw_spinlock_t lock;
63 struct idio_16_gpio_reg __iomem *reg; 63 struct idio_16_gpio_reg __iomem *reg;
64 unsigned long irq_mask; 64 unsigned long irq_mask;
65}; 65};
@@ -121,7 +121,7 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset,
121 } else 121 } else
122 base = &idio16gpio->reg->out0_7; 122 base = &idio16gpio->reg->out0_7;
123 123
124 spin_lock_irqsave(&idio16gpio->lock, flags); 124 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
125 125
126 if (value) 126 if (value)
127 out_state = ioread8(base) | mask; 127 out_state = ioread8(base) | mask;
@@ -130,7 +130,7 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset,
130 130
131 iowrite8(out_state, base); 131 iowrite8(out_state, base);
132 132
133 spin_unlock_irqrestore(&idio16gpio->lock, flags); 133 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
134} 134}
135 135
136static void idio_16_gpio_set_multiple(struct gpio_chip *chip, 136static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
@@ -140,7 +140,7 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
140 unsigned long flags; 140 unsigned long flags;
141 unsigned int out_state; 141 unsigned int out_state;
142 142
143 spin_lock_irqsave(&idio16gpio->lock, flags); 143 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
144 144
145 /* process output lines 0-7 */ 145 /* process output lines 0-7 */
146 if (*mask & 0xFF) { 146 if (*mask & 0xFF) {
@@ -160,7 +160,7 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
160 iowrite8(out_state, &idio16gpio->reg->out8_15); 160 iowrite8(out_state, &idio16gpio->reg->out8_15);
161 } 161 }
162 162
163 spin_unlock_irqrestore(&idio16gpio->lock, flags); 163 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
164} 164}
165 165
166static void idio_16_irq_ack(struct irq_data *data) 166static void idio_16_irq_ack(struct irq_data *data)
@@ -177,11 +177,11 @@ static void idio_16_irq_mask(struct irq_data *data)
177 idio16gpio->irq_mask &= ~mask; 177 idio16gpio->irq_mask &= ~mask;
178 178
179 if (!idio16gpio->irq_mask) { 179 if (!idio16gpio->irq_mask) {
180 spin_lock_irqsave(&idio16gpio->lock, flags); 180 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
181 181
182 iowrite8(0, &idio16gpio->reg->irq_ctl); 182 iowrite8(0, &idio16gpio->reg->irq_ctl);
183 183
184 spin_unlock_irqrestore(&idio16gpio->lock, flags); 184 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
185 } 185 }
186} 186}
187 187
@@ -196,11 +196,11 @@ static void idio_16_irq_unmask(struct irq_data *data)
196 idio16gpio->irq_mask |= mask; 196 idio16gpio->irq_mask |= mask;
197 197
198 if (!prev_irq_mask) { 198 if (!prev_irq_mask) {
199 spin_lock_irqsave(&idio16gpio->lock, flags); 199 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
200 200
201 ioread8(&idio16gpio->reg->irq_ctl); 201 ioread8(&idio16gpio->reg->irq_ctl);
202 202
203 spin_unlock_irqrestore(&idio16gpio->lock, flags); 203 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
204 } 204 }
205} 205}
206 206
@@ -229,11 +229,11 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
229 struct gpio_chip *const chip = &idio16gpio->chip; 229 struct gpio_chip *const chip = &idio16gpio->chip;
230 int gpio; 230 int gpio;
231 231
232 spin_lock(&idio16gpio->lock); 232 raw_spin_lock(&idio16gpio->lock);
233 233
234 irq_status = ioread8(&idio16gpio->reg->irq_status); 234 irq_status = ioread8(&idio16gpio->reg->irq_status);
235 235
236 spin_unlock(&idio16gpio->lock); 236 raw_spin_unlock(&idio16gpio->lock);
237 237
238 /* Make sure our device generated IRQ */ 238 /* Make sure our device generated IRQ */
239 if (!(irq_status & 0x3) || !(irq_status & 0x4)) 239 if (!(irq_status & 0x3) || !(irq_status & 0x4))
@@ -242,12 +242,12 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
242 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) 242 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
243 generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio)); 243 generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));
244 244
245 spin_lock(&idio16gpio->lock); 245 raw_spin_lock(&idio16gpio->lock);
246 246
247 /* Clear interrupt */ 247 /* Clear interrupt */
248 iowrite8(0, &idio16gpio->reg->in0_7); 248 iowrite8(0, &idio16gpio->reg->in0_7);
249 249
250 spin_unlock(&idio16gpio->lock); 250 raw_spin_unlock(&idio16gpio->lock);
251 251
252 return IRQ_HANDLED; 252 return IRQ_HANDLED;
253} 253}
@@ -302,7 +302,7 @@ static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id *id)
302 idio16gpio->chip.set = idio_16_gpio_set; 302 idio16gpio->chip.set = idio_16_gpio_set;
303 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple; 303 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
304 304
305 spin_lock_init(&idio16gpio->lock); 305 raw_spin_lock_init(&idio16gpio->lock);
306 306
307 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); 307 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio);
308 if (err) { 308 if (err) {