diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-02-01 13:31:17 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-02-01 13:31:17 -0500 |
commit | f6cff79f1d122f78a4b35bf4b2f0112afcd89ea4 (patch) | |
tree | cf3a38576f9adbb3860982c25f72aebed2bb541a /drivers/fpga/fpga-region.c | |
parent | 47fcc0360cfb3fe82e4daddacad3c1cd80b0b75d (diff) | |
parent | 9ff6576e124b1227c27c1da43fe5f8ee908263e0 (diff) |
Merge tag 'char-misc-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here is the big pull request for char/misc drivers for 4.16-rc1.
There's a lot of stuff in here. Three new driver subsystems were added
for various types of hardware busses:
- siox
- slimbus
- soundwire
as well as a new vboxguest subsystem for the VirtualBox hypervisor
drivers.
There's also big updates from the FPGA subsystem, lots of Android
binder fixes, the usual handful of hyper-v updates, and lots of other
smaller driver updates.
All of these have been in linux-next for a long time, with no reported
issues"
* tag 'char-misc-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (155 commits)
char: lp: use true or false for boolean values
android: binder: use VM_ALLOC to get vm area
android: binder: Use true and false for boolean values
lkdtm: fix handle_irq_event symbol for INT_HW_IRQ_EN
EISA: Delete error message for a failed memory allocation in eisa_probe()
EISA: Whitespace cleanup
misc: remove AVR32 dependencies
virt: vbox: Add error mapping for VERR_INVALID_NAME and VERR_NO_MORE_FILES
soundwire: Fix a signedness bug
uio_hv_generic: fix new type mismatch warnings
uio_hv_generic: fix type mismatch warnings
auxdisplay: img-ascii-lcd: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
uio_hv_generic: add rescind support
uio_hv_generic: check that host supports monitor page
uio_hv_generic: create send and receive buffers
uio: document uio_hv_generic regions
doc: fix documentation about uio_hv_generic
vmbus: add monitor_id and subchannel_id to sysfs per channel
vmbus: fix ABI documentation
uio_hv_generic: use ISR callback method
...
Diffstat (limited to 'drivers/fpga/fpga-region.c')
-rw-r--r-- | drivers/fpga/fpga-region.c | 464 |
1 files changed, 46 insertions, 418 deletions
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c index d9ab7c75b14f..edab2a2e03ef 100644 --- a/drivers/fpga/fpga-region.c +++ b/drivers/fpga/fpga-region.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * FPGA Region - Device Tree support for FPGA programming under Linux | 2 | * FPGA Region - Device Tree support for FPGA programming under Linux |
3 | * | 3 | * |
4 | * Copyright (C) 2013-2016 Altera Corporation | 4 | * Copyright (C) 2013-2016 Altera Corporation |
5 | * Copyright (C) 2017 Intel Corporation | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 8 | * under the terms and conditions of the GNU General Public License, |
@@ -18,61 +19,30 @@ | |||
18 | 19 | ||
19 | #include <linux/fpga/fpga-bridge.h> | 20 | #include <linux/fpga/fpga-bridge.h> |
20 | #include <linux/fpga/fpga-mgr.h> | 21 | #include <linux/fpga/fpga-mgr.h> |
22 | #include <linux/fpga/fpga-region.h> | ||
21 | #include <linux/idr.h> | 23 | #include <linux/idr.h> |
22 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
23 | #include <linux/list.h> | 25 | #include <linux/list.h> |
24 | #include <linux/module.h> | 26 | #include <linux/module.h> |
25 | #include <linux/of_platform.h> | ||
26 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
27 | #include <linux/spinlock.h> | 28 | #include <linux/spinlock.h> |
28 | 29 | ||
29 | /** | ||
30 | * struct fpga_region - FPGA Region structure | ||
31 | * @dev: FPGA Region device | ||
32 | * @mutex: enforces exclusive reference to region | ||
33 | * @bridge_list: list of FPGA bridges specified in region | ||
34 | * @info: fpga image specific information | ||
35 | */ | ||
36 | struct fpga_region { | ||
37 | struct device dev; | ||
38 | struct mutex mutex; /* for exclusive reference to region */ | ||
39 | struct list_head bridge_list; | ||
40 | struct fpga_image_info *info; | ||
41 | }; | ||
42 | |||
43 | #define to_fpga_region(d) container_of(d, struct fpga_region, dev) | ||
44 | |||
45 | static DEFINE_IDA(fpga_region_ida); | 30 | static DEFINE_IDA(fpga_region_ida); |
46 | static struct class *fpga_region_class; | 31 | static struct class *fpga_region_class; |
47 | 32 | ||
48 | static const struct of_device_id fpga_region_of_match[] = { | 33 | struct fpga_region *fpga_region_class_find( |
49 | { .compatible = "fpga-region", }, | 34 | struct device *start, const void *data, |
50 | {}, | 35 | int (*match)(struct device *, const void *)) |
51 | }; | ||
52 | MODULE_DEVICE_TABLE(of, fpga_region_of_match); | ||
53 | |||
54 | static int fpga_region_of_node_match(struct device *dev, const void *data) | ||
55 | { | ||
56 | return dev->of_node == data; | ||
57 | } | ||
58 | |||
59 | /** | ||
60 | * fpga_region_find - find FPGA region | ||
61 | * @np: device node of FPGA Region | ||
62 | * Caller will need to put_device(®ion->dev) when done. | ||
63 | * Returns FPGA Region struct or NULL | ||
64 | */ | ||
65 | static struct fpga_region *fpga_region_find(struct device_node *np) | ||
66 | { | 36 | { |
67 | struct device *dev; | 37 | struct device *dev; |
68 | 38 | ||
69 | dev = class_find_device(fpga_region_class, NULL, np, | 39 | dev = class_find_device(fpga_region_class, start, data, match); |
70 | fpga_region_of_node_match); | ||
71 | if (!dev) | 40 | if (!dev) |
72 | return NULL; | 41 | return NULL; |
73 | 42 | ||
74 | return to_fpga_region(dev); | 43 | return to_fpga_region(dev); |
75 | } | 44 | } |
45 | EXPORT_SYMBOL_GPL(fpga_region_class_find); | ||
76 | 46 | ||
77 | /** | 47 | /** |
78 | * fpga_region_get - get an exclusive reference to a fpga region | 48 | * fpga_region_get - get an exclusive reference to a fpga region |
@@ -94,15 +64,13 @@ static struct fpga_region *fpga_region_get(struct fpga_region *region) | |||
94 | } | 64 | } |
95 | 65 | ||
96 | get_device(dev); | 66 | get_device(dev); |
97 | of_node_get(dev->of_node); | ||
98 | if (!try_module_get(dev->parent->driver->owner)) { | 67 | if (!try_module_get(dev->parent->driver->owner)) { |
99 | of_node_put(dev->of_node); | ||
100 | put_device(dev); | 68 | put_device(dev); |
101 | mutex_unlock(®ion->mutex); | 69 | mutex_unlock(®ion->mutex); |
102 | return ERR_PTR(-ENODEV); | 70 | return ERR_PTR(-ENODEV); |
103 | } | 71 | } |
104 | 72 | ||
105 | dev_dbg(®ion->dev, "get\n"); | 73 | dev_dbg(dev, "get\n"); |
106 | 74 | ||
107 | return region; | 75 | return region; |
108 | } | 76 | } |
@@ -116,403 +84,99 @@ static void fpga_region_put(struct fpga_region *region) | |||
116 | { | 84 | { |
117 | struct device *dev = ®ion->dev; | 85 | struct device *dev = ®ion->dev; |
118 | 86 | ||
119 | dev_dbg(®ion->dev, "put\n"); | 87 | dev_dbg(dev, "put\n"); |
120 | 88 | ||
121 | module_put(dev->parent->driver->owner); | 89 | module_put(dev->parent->driver->owner); |
122 | of_node_put(dev->of_node); | ||
123 | put_device(dev); | 90 | put_device(dev); |
124 | mutex_unlock(®ion->mutex); | 91 | mutex_unlock(®ion->mutex); |
125 | } | 92 | } |
126 | 93 | ||
127 | /** | 94 | /** |
128 | * fpga_region_get_manager - get exclusive reference for FPGA manager | ||
129 | * @region: FPGA region | ||
130 | * | ||
131 | * Get FPGA Manager from "fpga-mgr" property or from ancestor region. | ||
132 | * | ||
133 | * Caller should call fpga_mgr_put() when done with manager. | ||
134 | * | ||
135 | * Return: fpga manager struct or IS_ERR() condition containing error code. | ||
136 | */ | ||
137 | static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region) | ||
138 | { | ||
139 | struct device *dev = ®ion->dev; | ||
140 | struct device_node *np = dev->of_node; | ||
141 | struct device_node *mgr_node; | ||
142 | struct fpga_manager *mgr; | ||
143 | |||
144 | of_node_get(np); | ||
145 | while (np) { | ||
146 | if (of_device_is_compatible(np, "fpga-region")) { | ||
147 | mgr_node = of_parse_phandle(np, "fpga-mgr", 0); | ||
148 | if (mgr_node) { | ||
149 | mgr = of_fpga_mgr_get(mgr_node); | ||
150 | of_node_put(np); | ||
151 | return mgr; | ||
152 | } | ||
153 | } | ||
154 | np = of_get_next_parent(np); | ||
155 | } | ||
156 | of_node_put(np); | ||
157 | |||
158 | return ERR_PTR(-EINVAL); | ||
159 | } | ||
160 | |||
161 | /** | ||
162 | * fpga_region_get_bridges - create a list of bridges | ||
163 | * @region: FPGA region | ||
164 | * @overlay: device node of the overlay | ||
165 | * | ||
166 | * Create a list of bridges including the parent bridge and the bridges | ||
167 | * specified by "fpga-bridges" property. Note that the | ||
168 | * fpga_bridges_enable/disable/put functions are all fine with an empty list | ||
169 | * if that happens. | ||
170 | * | ||
171 | * Caller should call fpga_bridges_put(®ion->bridge_list) when | ||
172 | * done with the bridges. | ||
173 | * | ||
174 | * Return 0 for success (even if there are no bridges specified) | ||
175 | * or -EBUSY if any of the bridges are in use. | ||
176 | */ | ||
177 | static int fpga_region_get_bridges(struct fpga_region *region, | ||
178 | struct device_node *overlay) | ||
179 | { | ||
180 | struct device *dev = ®ion->dev; | ||
181 | struct device_node *region_np = dev->of_node; | ||
182 | struct device_node *br, *np, *parent_br = NULL; | ||
183 | int i, ret; | ||
184 | |||
185 | /* If parent is a bridge, add to list */ | ||
186 | ret = fpga_bridge_get_to_list(region_np->parent, region->info, | ||
187 | ®ion->bridge_list); | ||
188 | if (ret == -EBUSY) | ||
189 | return ret; | ||
190 | |||
191 | if (!ret) | ||
192 | parent_br = region_np->parent; | ||
193 | |||
194 | /* If overlay has a list of bridges, use it. */ | ||
195 | if (of_parse_phandle(overlay, "fpga-bridges", 0)) | ||
196 | np = overlay; | ||
197 | else | ||
198 | np = region_np; | ||
199 | |||
200 | for (i = 0; ; i++) { | ||
201 | br = of_parse_phandle(np, "fpga-bridges", i); | ||
202 | if (!br) | ||
203 | break; | ||
204 | |||
205 | /* If parent bridge is in list, skip it. */ | ||
206 | if (br == parent_br) | ||
207 | continue; | ||
208 | |||
209 | /* If node is a bridge, get it and add to list */ | ||
210 | ret = fpga_bridge_get_to_list(br, region->info, | ||
211 | ®ion->bridge_list); | ||
212 | |||
213 | /* If any of the bridges are in use, give up */ | ||
214 | if (ret == -EBUSY) { | ||
215 | fpga_bridges_put(®ion->bridge_list); | ||
216 | return -EBUSY; | ||
217 | } | ||
218 | } | ||
219 | |||
220 | return 0; | ||
221 | } | ||
222 | |||
223 | /** | ||
224 | * fpga_region_program_fpga - program FPGA | 95 | * fpga_region_program_fpga - program FPGA |
225 | * @region: FPGA region | 96 | * @region: FPGA region |
226 | * @firmware_name: name of FPGA image firmware file | 97 | * Program an FPGA using fpga image info (region->info). |
227 | * @overlay: device node of the overlay | ||
228 | * Program an FPGA using information in the device tree. | ||
229 | * Function assumes that there is a firmware-name property. | ||
230 | * Return 0 for success or negative error code. | 98 | * Return 0 for success or negative error code. |
231 | */ | 99 | */ |
232 | static int fpga_region_program_fpga(struct fpga_region *region, | 100 | int fpga_region_program_fpga(struct fpga_region *region) |
233 | const char *firmware_name, | ||
234 | struct device_node *overlay) | ||
235 | { | 101 | { |
236 | struct fpga_manager *mgr; | 102 | struct device *dev = ®ion->dev; |
103 | struct fpga_image_info *info = region->info; | ||
237 | int ret; | 104 | int ret; |
238 | 105 | ||
239 | region = fpga_region_get(region); | 106 | region = fpga_region_get(region); |
240 | if (IS_ERR(region)) { | 107 | if (IS_ERR(region)) { |
241 | pr_err("failed to get fpga region\n"); | 108 | dev_err(dev, "failed to get FPGA region\n"); |
242 | return PTR_ERR(region); | 109 | return PTR_ERR(region); |
243 | } | 110 | } |
244 | 111 | ||
245 | mgr = fpga_region_get_manager(region); | 112 | ret = fpga_mgr_lock(region->mgr); |
246 | if (IS_ERR(mgr)) { | 113 | if (ret) { |
247 | pr_err("failed to get fpga region manager\n"); | 114 | dev_err(dev, "FPGA manager is busy\n"); |
248 | ret = PTR_ERR(mgr); | ||
249 | goto err_put_region; | 115 | goto err_put_region; |
250 | } | 116 | } |
251 | 117 | ||
252 | ret = fpga_region_get_bridges(region, overlay); | 118 | /* |
253 | if (ret) { | 119 | * In some cases, we already have a list of bridges in the |
254 | pr_err("failed to get fpga region bridges\n"); | 120 | * fpga region struct. Or we don't have any bridges. |
255 | goto err_put_mgr; | 121 | */ |
122 | if (region->get_bridges) { | ||
123 | ret = region->get_bridges(region); | ||
124 | if (ret) { | ||
125 | dev_err(dev, "failed to get fpga region bridges\n"); | ||
126 | goto err_unlock_mgr; | ||
127 | } | ||
256 | } | 128 | } |
257 | 129 | ||
258 | ret = fpga_bridges_disable(®ion->bridge_list); | 130 | ret = fpga_bridges_disable(®ion->bridge_list); |
259 | if (ret) { | 131 | if (ret) { |
260 | pr_err("failed to disable region bridges\n"); | 132 | dev_err(dev, "failed to disable bridges\n"); |
261 | goto err_put_br; | 133 | goto err_put_br; |
262 | } | 134 | } |
263 | 135 | ||
264 | ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name); | 136 | ret = fpga_mgr_load(region->mgr, info); |
265 | if (ret) { | 137 | if (ret) { |
266 | pr_err("failed to load fpga image\n"); | 138 | dev_err(dev, "failed to load FPGA image\n"); |
267 | goto err_put_br; | 139 | goto err_put_br; |
268 | } | 140 | } |
269 | 141 | ||
270 | ret = fpga_bridges_enable(®ion->bridge_list); | 142 | ret = fpga_bridges_enable(®ion->bridge_list); |
271 | if (ret) { | 143 | if (ret) { |
272 | pr_err("failed to enable region bridges\n"); | 144 | dev_err(dev, "failed to enable region bridges\n"); |
273 | goto err_put_br; | 145 | goto err_put_br; |
274 | } | 146 | } |
275 | 147 | ||
276 | fpga_mgr_put(mgr); | 148 | fpga_mgr_unlock(region->mgr); |
277 | fpga_region_put(region); | 149 | fpga_region_put(region); |
278 | 150 | ||
279 | return 0; | 151 | return 0; |
280 | 152 | ||
281 | err_put_br: | 153 | err_put_br: |
282 | fpga_bridges_put(®ion->bridge_list); | 154 | if (region->get_bridges) |
283 | err_put_mgr: | 155 | fpga_bridges_put(®ion->bridge_list); |
284 | fpga_mgr_put(mgr); | 156 | err_unlock_mgr: |
157 | fpga_mgr_unlock(region->mgr); | ||
285 | err_put_region: | 158 | err_put_region: |
286 | fpga_region_put(region); | 159 | fpga_region_put(region); |
287 | 160 | ||
288 | return ret; | 161 | return ret; |
289 | } | 162 | } |
163 | EXPORT_SYMBOL_GPL(fpga_region_program_fpga); | ||
290 | 164 | ||
291 | /** | 165 | int fpga_region_register(struct device *dev, struct fpga_region *region) |
292 | * child_regions_with_firmware | ||
293 | * @overlay: device node of the overlay | ||
294 | * | ||
295 | * If the overlay adds child FPGA regions, they are not allowed to have | ||
296 | * firmware-name property. | ||
297 | * | ||
298 | * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name. | ||
299 | */ | ||
300 | static int child_regions_with_firmware(struct device_node *overlay) | ||
301 | { | ||
302 | struct device_node *child_region; | ||
303 | const char *child_firmware_name; | ||
304 | int ret = 0; | ||
305 | |||
306 | of_node_get(overlay); | ||
307 | |||
308 | child_region = of_find_matching_node(overlay, fpga_region_of_match); | ||
309 | while (child_region) { | ||
310 | if (!of_property_read_string(child_region, "firmware-name", | ||
311 | &child_firmware_name)) { | ||
312 | ret = -EINVAL; | ||
313 | break; | ||
314 | } | ||
315 | child_region = of_find_matching_node(child_region, | ||
316 | fpga_region_of_match); | ||
317 | } | ||
318 | |||
319 | of_node_put(child_region); | ||
320 | |||
321 | if (ret) | ||
322 | pr_err("firmware-name not allowed in child FPGA region: %pOF", | ||
323 | child_region); | ||
324 | |||
325 | return ret; | ||
326 | } | ||
327 | |||
328 | /** | ||
329 | * fpga_region_notify_pre_apply - pre-apply overlay notification | ||
330 | * | ||
331 | * @region: FPGA region that the overlay was applied to | ||
332 | * @nd: overlay notification data | ||
333 | * | ||
334 | * Called after when an overlay targeted to a FPGA Region is about to be | ||
335 | * applied. Function will check the properties that will be added to the FPGA | ||
336 | * region. If the checks pass, it will program the FPGA. | ||
337 | * | ||
338 | * The checks are: | ||
339 | * The overlay must add either firmware-name or external-fpga-config property | ||
340 | * to the FPGA Region. | ||
341 | * | ||
342 | * firmware-name : program the FPGA | ||
343 | * external-fpga-config : FPGA is already programmed | ||
344 | * encrypted-fpga-config : FPGA bitstream is encrypted | ||
345 | * | ||
346 | * The overlay can add other FPGA regions, but child FPGA regions cannot have a | ||
347 | * firmware-name property since those regions don't exist yet. | ||
348 | * | ||
349 | * If the overlay that breaks the rules, notifier returns an error and the | ||
350 | * overlay is rejected before it goes into the main tree. | ||
351 | * | ||
352 | * Returns 0 for success or negative error code for failure. | ||
353 | */ | ||
354 | static int fpga_region_notify_pre_apply(struct fpga_region *region, | ||
355 | struct of_overlay_notify_data *nd) | ||
356 | { | 166 | { |
357 | const char *firmware_name = NULL; | ||
358 | struct fpga_image_info *info; | ||
359 | int ret; | ||
360 | |||
361 | info = devm_kzalloc(®ion->dev, sizeof(*info), GFP_KERNEL); | ||
362 | if (!info) | ||
363 | return -ENOMEM; | ||
364 | |||
365 | region->info = info; | ||
366 | |||
367 | /* Reject overlay if child FPGA Regions have firmware-name property */ | ||
368 | ret = child_regions_with_firmware(nd->overlay); | ||
369 | if (ret) | ||
370 | return ret; | ||
371 | |||
372 | /* Read FPGA region properties from the overlay */ | ||
373 | if (of_property_read_bool(nd->overlay, "partial-fpga-config")) | ||
374 | info->flags |= FPGA_MGR_PARTIAL_RECONFIG; | ||
375 | |||
376 | if (of_property_read_bool(nd->overlay, "external-fpga-config")) | ||
377 | info->flags |= FPGA_MGR_EXTERNAL_CONFIG; | ||
378 | |||
379 | if (of_property_read_bool(nd->overlay, "encrypted-fpga-config")) | ||
380 | info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM; | ||
381 | |||
382 | of_property_read_string(nd->overlay, "firmware-name", &firmware_name); | ||
383 | |||
384 | of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us", | ||
385 | &info->enable_timeout_us); | ||
386 | |||
387 | of_property_read_u32(nd->overlay, "region-freeze-timeout-us", | ||
388 | &info->disable_timeout_us); | ||
389 | |||
390 | of_property_read_u32(nd->overlay, "config-complete-timeout-us", | ||
391 | &info->config_complete_timeout_us); | ||
392 | |||
393 | /* If FPGA was externally programmed, don't specify firmware */ | ||
394 | if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) { | ||
395 | pr_err("error: specified firmware and external-fpga-config"); | ||
396 | return -EINVAL; | ||
397 | } | ||
398 | |||
399 | /* FPGA is already configured externally. We're done. */ | ||
400 | if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) | ||
401 | return 0; | ||
402 | |||
403 | /* If we got this far, we should be programming the FPGA */ | ||
404 | if (!firmware_name) { | ||
405 | pr_err("should specify firmware-name or external-fpga-config\n"); | ||
406 | return -EINVAL; | ||
407 | } | ||
408 | |||
409 | return fpga_region_program_fpga(region, firmware_name, nd->overlay); | ||
410 | } | ||
411 | |||
412 | /** | ||
413 | * fpga_region_notify_post_remove - post-remove overlay notification | ||
414 | * | ||
415 | * @region: FPGA region that was targeted by the overlay that was removed | ||
416 | * @nd: overlay notification data | ||
417 | * | ||
418 | * Called after an overlay has been removed if the overlay's target was a | ||
419 | * FPGA region. | ||
420 | */ | ||
421 | static void fpga_region_notify_post_remove(struct fpga_region *region, | ||
422 | struct of_overlay_notify_data *nd) | ||
423 | { | ||
424 | fpga_bridges_disable(®ion->bridge_list); | ||
425 | fpga_bridges_put(®ion->bridge_list); | ||
426 | devm_kfree(®ion->dev, region->info); | ||
427 | region->info = NULL; | ||
428 | } | ||
429 | |||
430 | /** | ||
431 | * of_fpga_region_notify - reconfig notifier for dynamic DT changes | ||
432 | * @nb: notifier block | ||
433 | * @action: notifier action | ||
434 | * @arg: reconfig data | ||
435 | * | ||
436 | * This notifier handles programming a FPGA when a "firmware-name" property is | ||
437 | * added to a fpga-region. | ||
438 | * | ||
439 | * Returns NOTIFY_OK or error if FPGA programming fails. | ||
440 | */ | ||
441 | static int of_fpga_region_notify(struct notifier_block *nb, | ||
442 | unsigned long action, void *arg) | ||
443 | { | ||
444 | struct of_overlay_notify_data *nd = arg; | ||
445 | struct fpga_region *region; | ||
446 | int ret; | ||
447 | |||
448 | switch (action) { | ||
449 | case OF_OVERLAY_PRE_APPLY: | ||
450 | pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__); | ||
451 | break; | ||
452 | case OF_OVERLAY_POST_APPLY: | ||
453 | pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__); | ||
454 | return NOTIFY_OK; /* not for us */ | ||
455 | case OF_OVERLAY_PRE_REMOVE: | ||
456 | pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__); | ||
457 | return NOTIFY_OK; /* not for us */ | ||
458 | case OF_OVERLAY_POST_REMOVE: | ||
459 | pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__); | ||
460 | break; | ||
461 | default: /* should not happen */ | ||
462 | return NOTIFY_OK; | ||
463 | } | ||
464 | |||
465 | region = fpga_region_find(nd->target); | ||
466 | if (!region) | ||
467 | return NOTIFY_OK; | ||
468 | |||
469 | ret = 0; | ||
470 | switch (action) { | ||
471 | case OF_OVERLAY_PRE_APPLY: | ||
472 | ret = fpga_region_notify_pre_apply(region, nd); | ||
473 | break; | ||
474 | |||
475 | case OF_OVERLAY_POST_REMOVE: | ||
476 | fpga_region_notify_post_remove(region, nd); | ||
477 | break; | ||
478 | } | ||
479 | |||
480 | put_device(®ion->dev); | ||
481 | |||
482 | if (ret) | ||
483 | return notifier_from_errno(ret); | ||
484 | |||
485 | return NOTIFY_OK; | ||
486 | } | ||
487 | |||
488 | static struct notifier_block fpga_region_of_nb = { | ||
489 | .notifier_call = of_fpga_region_notify, | ||
490 | }; | ||
491 | |||
492 | static int fpga_region_probe(struct platform_device *pdev) | ||
493 | { | ||
494 | struct device *dev = &pdev->dev; | ||
495 | struct device_node *np = dev->of_node; | ||
496 | struct fpga_region *region; | ||
497 | int id, ret = 0; | 167 | int id, ret = 0; |
498 | 168 | ||
499 | region = kzalloc(sizeof(*region), GFP_KERNEL); | ||
500 | if (!region) | ||
501 | return -ENOMEM; | ||
502 | |||
503 | id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL); | 169 | id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL); |
504 | if (id < 0) { | 170 | if (id < 0) |
505 | ret = id; | 171 | return id; |
506 | goto err_kfree; | ||
507 | } | ||
508 | 172 | ||
509 | mutex_init(®ion->mutex); | 173 | mutex_init(®ion->mutex); |
510 | INIT_LIST_HEAD(®ion->bridge_list); | 174 | INIT_LIST_HEAD(®ion->bridge_list); |
511 | |||
512 | device_initialize(®ion->dev); | 175 | device_initialize(®ion->dev); |
176 | region->dev.groups = region->groups; | ||
513 | region->dev.class = fpga_region_class; | 177 | region->dev.class = fpga_region_class; |
514 | region->dev.parent = dev; | 178 | region->dev.parent = dev; |
515 | region->dev.of_node = np; | 179 | region->dev.of_node = dev->of_node; |
516 | region->dev.id = id; | 180 | region->dev.id = id; |
517 | dev_set_drvdata(dev, region); | 181 | dev_set_drvdata(dev, region); |
518 | 182 | ||
@@ -524,44 +188,27 @@ static int fpga_region_probe(struct platform_device *pdev) | |||
524 | if (ret) | 188 | if (ret) |
525 | goto err_remove; | 189 | goto err_remove; |
526 | 190 | ||
527 | of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev); | ||
528 | |||
529 | dev_info(dev, "FPGA Region probed\n"); | ||
530 | |||
531 | return 0; | 191 | return 0; |
532 | 192 | ||
533 | err_remove: | 193 | err_remove: |
534 | ida_simple_remove(&fpga_region_ida, id); | 194 | ida_simple_remove(&fpga_region_ida, id); |
535 | err_kfree: | ||
536 | kfree(region); | ||
537 | |||
538 | return ret; | 195 | return ret; |
539 | } | 196 | } |
197 | EXPORT_SYMBOL_GPL(fpga_region_register); | ||
540 | 198 | ||
541 | static int fpga_region_remove(struct platform_device *pdev) | 199 | int fpga_region_unregister(struct fpga_region *region) |
542 | { | 200 | { |
543 | struct fpga_region *region = platform_get_drvdata(pdev); | ||
544 | |||
545 | device_unregister(®ion->dev); | 201 | device_unregister(®ion->dev); |
546 | 202 | ||
547 | return 0; | 203 | return 0; |
548 | } | 204 | } |
549 | 205 | EXPORT_SYMBOL_GPL(fpga_region_unregister); | |
550 | static struct platform_driver fpga_region_driver = { | ||
551 | .probe = fpga_region_probe, | ||
552 | .remove = fpga_region_remove, | ||
553 | .driver = { | ||
554 | .name = "fpga-region", | ||
555 | .of_match_table = of_match_ptr(fpga_region_of_match), | ||
556 | }, | ||
557 | }; | ||
558 | 206 | ||
559 | static void fpga_region_dev_release(struct device *dev) | 207 | static void fpga_region_dev_release(struct device *dev) |
560 | { | 208 | { |
561 | struct fpga_region *region = to_fpga_region(dev); | 209 | struct fpga_region *region = to_fpga_region(dev); |
562 | 210 | ||
563 | ida_simple_remove(&fpga_region_ida, region->dev.id); | 211 | ida_simple_remove(&fpga_region_ida, region->dev.id); |
564 | kfree(region); | ||
565 | } | 212 | } |
566 | 213 | ||
567 | /** | 214 | /** |
@@ -570,36 +217,17 @@ static void fpga_region_dev_release(struct device *dev) | |||
570 | */ | 217 | */ |
571 | static int __init fpga_region_init(void) | 218 | static int __init fpga_region_init(void) |
572 | { | 219 | { |
573 | int ret; | ||
574 | |||
575 | fpga_region_class = class_create(THIS_MODULE, "fpga_region"); | 220 | fpga_region_class = class_create(THIS_MODULE, "fpga_region"); |
576 | if (IS_ERR(fpga_region_class)) | 221 | if (IS_ERR(fpga_region_class)) |
577 | return PTR_ERR(fpga_region_class); | 222 | return PTR_ERR(fpga_region_class); |
578 | 223 | ||
579 | fpga_region_class->dev_release = fpga_region_dev_release; | 224 | fpga_region_class->dev_release = fpga_region_dev_release; |
580 | 225 | ||
581 | ret = of_overlay_notifier_register(&fpga_region_of_nb); | ||
582 | if (ret) | ||
583 | goto err_class; | ||
584 | |||
585 | ret = platform_driver_register(&fpga_region_driver); | ||
586 | if (ret) | ||
587 | goto err_plat; | ||
588 | |||
589 | return 0; | 226 | return 0; |
590 | |||
591 | err_plat: | ||
592 | of_overlay_notifier_unregister(&fpga_region_of_nb); | ||
593 | err_class: | ||
594 | class_destroy(fpga_region_class); | ||
595 | ida_destroy(&fpga_region_ida); | ||
596 | return ret; | ||
597 | } | 227 | } |
598 | 228 | ||
599 | static void __exit fpga_region_exit(void) | 229 | static void __exit fpga_region_exit(void) |
600 | { | 230 | { |
601 | platform_driver_unregister(&fpga_region_driver); | ||
602 | of_overlay_notifier_unregister(&fpga_region_of_nb); | ||
603 | class_destroy(fpga_region_class); | 231 | class_destroy(fpga_region_class); |
604 | ida_destroy(&fpga_region_ida); | 232 | ida_destroy(&fpga_region_ida); |
605 | } | 233 | } |
@@ -608,5 +236,5 @@ subsys_initcall(fpga_region_init); | |||
608 | module_exit(fpga_region_exit); | 236 | module_exit(fpga_region_exit); |
609 | 237 | ||
610 | MODULE_DESCRIPTION("FPGA Region"); | 238 | MODULE_DESCRIPTION("FPGA Region"); |
611 | MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>"); | 239 | MODULE_AUTHOR("Alan Tull <atull@kernel.org>"); |
612 | MODULE_LICENSE("GPL v2"); | 240 | MODULE_LICENSE("GPL v2"); |