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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2018-08-27 11:35:55 -0400
committerChanwoo Choi <cw00.choi@samsung.com>2018-08-27 22:21:15 -0400
commita4722503fadf0ed6219153da7ed6fa6cb4da98ec (patch)
treeb4ec289708276dc3123c646660048d39e6063c13 /drivers/extcon/extcon-intel-cht-wc.c
parent001d3eccf9fc9b598b155f94b5f727ee825252d9 (diff)
extcon: cht-wc: Correct USBID bit field handling
USBID is 2-bit bit field according to specification. Make it clear. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'drivers/extcon/extcon-intel-cht-wc.c')
-rw-r--r--drivers/extcon/extcon-intel-cht-wc.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c
index 71b1126dbb0b..ad1fd70e4023 100644
--- a/drivers/extcon/extcon-intel-cht-wc.c
+++ b/drivers/extcon/extcon-intel-cht-wc.c
@@ -62,8 +62,11 @@
62#define CHT_WC_PWRSRC_VBUS BIT(0) 62#define CHT_WC_PWRSRC_VBUS BIT(0)
63#define CHT_WC_PWRSRC_DC BIT(1) 63#define CHT_WC_PWRSRC_DC BIT(1)
64#define CHT_WC_PWRSRC_BATT BIT(2) 64#define CHT_WC_PWRSRC_BATT BIT(2)
65#define CHT_WC_PWRSRC_ID_GND BIT(3) 65#define CHT_WC_PWRSRC_USBID_MASK GENMASK(4, 3)
66#define CHT_WC_PWRSRC_ID_FLOAT BIT(4) 66#define CHT_WC_PWRSRC_USBID_SHIFT 3
67#define CHT_WC_PWRSRC_RID_ACA 0
68#define CHT_WC_PWRSRC_RID_GND 1
69#define CHT_WC_PWRSRC_RID_FLOAT 2
67 70
68#define CHT_WC_VBUS_GPIO_CTLO 0x6e2d 71#define CHT_WC_VBUS_GPIO_CTLO 0x6e2d
69#define CHT_WC_VBUS_GPIO_CTLO_OUTPUT BIT(0) 72#define CHT_WC_VBUS_GPIO_CTLO_OUTPUT BIT(0)
@@ -104,16 +107,20 @@ struct cht_wc_extcon_data {
104 107
105static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts) 108static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
106{ 109{
107 if (pwrsrc_sts & CHT_WC_PWRSRC_ID_GND) 110 switch ((pwrsrc_sts & CHT_WC_PWRSRC_USBID_MASK) >> CHT_WC_PWRSRC_USBID_SHIFT) {
111 case CHT_WC_PWRSRC_RID_GND:
108 return USB_ID_GND; 112 return USB_ID_GND;
109 if (pwrsrc_sts & CHT_WC_PWRSRC_ID_FLOAT) 113 case CHT_WC_PWRSRC_RID_FLOAT:
110 return USB_ID_FLOAT; 114 return USB_ID_FLOAT;
111 115 case CHT_WC_PWRSRC_RID_ACA:
112 /* 116 default:
113 * Once we have iio support for the gpadc we should read the USBID 117 /*
114 * gpadc channel here and determine ACA role based on that. 118 * Once we have IIO support for the GPADC we should read
115 */ 119 * the USBID GPADC channel here and determine ACA role
116 return USB_ID_FLOAT; 120 * based on that.
121 */
122 return USB_ID_FLOAT;
123 }
117} 124}
118 125
119static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext, 126static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext,
@@ -292,6 +299,7 @@ static int cht_wc_extcon_probe(struct platform_device *pdev)
292{ 299{
293 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); 300 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
294 struct cht_wc_extcon_data *ext; 301 struct cht_wc_extcon_data *ext;
302 unsigned long mask = ~(CHT_WC_PWRSRC_VBUS | CHT_WC_PWRSRC_USBID_MASK);
295 int irq, ret; 303 int irq, ret;
296 304
297 irq = platform_get_irq(pdev, 0); 305 irq = platform_get_irq(pdev, 0);
@@ -352,9 +360,7 @@ static int cht_wc_extcon_probe(struct platform_device *pdev)
352 } 360 }
353 361
354 /* Unmask irqs */ 362 /* Unmask irqs */
355 ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ_MASK, 363 ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ_MASK, mask);
356 (int)~(CHT_WC_PWRSRC_VBUS | CHT_WC_PWRSRC_ID_GND |
357 CHT_WC_PWRSRC_ID_FLOAT));
358 if (ret) { 364 if (ret) {
359 dev_err(ext->dev, "Error writing irq-mask: %d\n", ret); 365 dev_err(ext->dev, "Error writing irq-mask: %d\n", ret);
360 goto disable_sw_control; 366 goto disable_sw_control;