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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-01-07 06:07:36 -0500
committerVinod Koul <vkoul@kernel.org>2019-01-07 07:27:13 -0500
commitd7dba6be0f31ae61f5f3296aa130f45d57d30f74 (patch)
treedf576295bc172e3c5ebcd22e2176411ad8997c51 /drivers/dma/dw
parent87fe9ae84d7ba61df1f272e26df174e73b15cd74 (diff)
dmaengine: dw: Remove misleading is_private property
The commit a9ddb575d6d6 ("dmaengine: dw_dmac: Enhance device tree support") introduces is_private property in uncertain understanding what does it mean. First of all, documentation defines DMA_PRIVATE capability as Documentation/crypto/async-tx-api.txt: The DMA_PRIVATE capability flag is used to tag dma devices that should not be used by the general-purpose allocator. It can be set at initialization time if it is known that a channel will always be private. Alternatively, it is set when dma_request_channel() finds an unused "public" channel. A couple caveats to note when implementing a driver and consumer: 1/ Once a channel has been privately allocated it will no longer be considered by the general-purpose allocator even after a call to dma_release_channel(). 2/ Since capabilities are specified at the device level a dma_device with multiple channels will either have all channels public, or all channels private. Documentation/driver-api/dmaengine/provider.rst: - DMA_PRIVATE The devices only supports slave transfers, and as such isn't available for async transfers. The capability had been introduced by the commit 59b5ec21446b ("dmaengine: introduce dma_request_channel and private channels") and some code didn't changed from that times ever. Taking into consideration above and the fact that on all known platforms Synopsys DesignWare DMA engine is attached to serve slave transfers, the DMA_PRIVATE capability must be enabled for this device unconditionally. Otherwise, as rightfully noticed in drivers/dma/at_xdmac.c: /* * Without DMA_PRIVATE the driver is not able to allocate more than * one channel, second allocation fails in private_candidate. */ because of of a caveats mentioned in above documentation excerpts. So, remove conditional around DMA_PRIVATE followed by removal leftovers. If someone wonders, DMA_PRIVATE can be not used if and only if the all channels of the DMA controller are supposed to serve memory-to-memory like operations. For example, EP93xx has two controllers, one of which can only perform memory-to-memory transfers Note, this change doesn't affect dmatest to be able to test such controllers. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (maintainer:SERIAL DRIVERS) Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/dw')
-rw-r--r--drivers/dma/dw/core.c4
-rw-r--r--drivers/dma/dw/pci.c1
-rw-r--r--drivers/dma/dw/platform.c3
3 files changed, 1 insertions, 7 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index dc053e62f894..e25503986680 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1227,7 +1227,6 @@ int dw_dma_probe(struct dw_dma_chip *chip)
1227 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); 1227 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE);
1228 1228
1229 /* Fill platform data with the default values */ 1229 /* Fill platform data with the default values */
1230 pdata->is_private = true;
1231 pdata->is_memcpy = true; 1230 pdata->is_memcpy = true;
1232 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING; 1231 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
1233 pdata->chan_priority = CHAN_PRIORITY_ASCENDING; 1232 pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
@@ -1340,8 +1339,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
1340 1339
1341 /* Set capabilities */ 1340 /* Set capabilities */
1342 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); 1341 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
1343 if (pdata->is_private) 1342 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
1344 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
1345 if (pdata->is_memcpy) 1343 if (pdata->is_memcpy)
1346 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); 1344 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
1347 1345
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index 313ba10c6224..570498faadc3 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -17,7 +17,6 @@
17 17
18static struct dw_dma_platform_data mrfld_pdata = { 18static struct dw_dma_platform_data mrfld_pdata = {
19 .nr_channels = 8, 19 .nr_channels = 8,
20 .is_private = true,
21 .is_memcpy = true, 20 .is_memcpy = true,
22 .is_idma32 = true, 21 .is_idma32 = true,
23 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 22 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 31ff8113c3de..6dd8cd1820c1 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -128,9 +128,6 @@ dw_dma_parse_dt(struct platform_device *pdev)
128 pdata->nr_masters = nr_masters; 128 pdata->nr_masters = nr_masters;
129 pdata->nr_channels = nr_channels; 129 pdata->nr_channels = nr_channels;
130 130
131 if (of_property_read_bool(np, "is_private"))
132 pdata->is_private = true;
133
134 /* 131 /*
135 * All known devices, which use DT for configuration, support 132 * All known devices, which use DT for configuration, support
136 * memory-to-memory transfers. So enable it by default. 133 * memory-to-memory transfers. So enable it by default.