summaryrefslogtreecommitdiffstats
path: root/drivers/crypto/omap-sham.c
diff options
context:
space:
mode:
authorLokesh Vutla <lokeshvutla@ti.com>2013-07-26 02:59:14 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2013-07-31 20:54:00 -0400
commiteaef7e3f3f82923ea175ce4859908bb0d70072f3 (patch)
treea3ae6c376b3df708236b29241d970abb077bc8d1 /drivers/crypto/omap-sham.c
parent9e01d0c6f63a59cc756c0028e17effdbadee7227 (diff)
crypto: omap-sham - Add SHA384 and SHA512 Support
Adding support for SHA348 and SHA512 in addition to MD5, SHA1, SHA224 SHA256 that the omap sha module supports. In order to add the support - Removed hard coded register offsets and passing offsets from pdata - Updating Flag offsets so that they can be used for SHA256 and SHA512 - Adding the algo info. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/omap-sham.c')
-rw-r--r--drivers/crypto/omap-sham.c245
1 files changed, 202 insertions, 43 deletions
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 4bb67652c200..f73b1e0fa5e8 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -44,7 +44,6 @@
44#include <crypto/hash.h> 44#include <crypto/hash.h>
45#include <crypto/internal/hash.h> 45#include <crypto/internal/hash.h>
46 46
47#define SHA1_MD5_BLOCK_SIZE SHA1_BLOCK_SIZE
48#define MD5_DIGEST_SIZE 16 47#define MD5_DIGEST_SIZE 16
49 48
50#define DST_MAXBURST 16 49#define DST_MAXBURST 16
@@ -54,7 +53,7 @@
54#define SHA_REG_DIN(dd, x) ((dd)->pdata->din_ofs + ((x) * 0x04)) 53#define SHA_REG_DIN(dd, x) ((dd)->pdata->din_ofs + ((x) * 0x04))
55#define SHA_REG_DIGCNT(dd) ((dd)->pdata->digcnt_ofs) 54#define SHA_REG_DIGCNT(dd) ((dd)->pdata->digcnt_ofs)
56 55
57#define SHA_REG_ODIGEST(x) (0x00 + ((x) * 0x04)) 56#define SHA_REG_ODIGEST(dd, x) ((dd)->pdata->odigest_ofs + (x * 0x04))
58 57
59#define SHA_REG_CTRL 0x18 58#define SHA_REG_CTRL 0x18
60#define SHA_REG_CTRL_LENGTH (0xFFFFFFFF << 5) 59#define SHA_REG_CTRL_LENGTH (0xFFFFFFFF << 5)
@@ -75,18 +74,21 @@
75#define SHA_REG_SYSSTATUS(dd) ((dd)->pdata->sysstatus_ofs) 74#define SHA_REG_SYSSTATUS(dd) ((dd)->pdata->sysstatus_ofs)
76#define SHA_REG_SYSSTATUS_RESETDONE (1 << 0) 75#define SHA_REG_SYSSTATUS_RESETDONE (1 << 0)
77 76
78#define SHA_REG_MODE 0x44 77#define SHA_REG_MODE(dd) ((dd)->pdata->mode_ofs)
79#define SHA_REG_MODE_HMAC_OUTER_HASH (1 << 7) 78#define SHA_REG_MODE_HMAC_OUTER_HASH (1 << 7)
80#define SHA_REG_MODE_HMAC_KEY_PROC (1 << 5) 79#define SHA_REG_MODE_HMAC_KEY_PROC (1 << 5)
81#define SHA_REG_MODE_CLOSE_HASH (1 << 4) 80#define SHA_REG_MODE_CLOSE_HASH (1 << 4)
82#define SHA_REG_MODE_ALGO_CONSTANT (1 << 3) 81#define SHA_REG_MODE_ALGO_CONSTANT (1 << 3)
83#define SHA_REG_MODE_ALGO_MASK (3 << 1)
84#define SHA_REG_MODE_ALGO_MD5_128 (0 << 1)
85#define SHA_REG_MODE_ALGO_SHA1_160 (1 << 1)
86#define SHA_REG_MODE_ALGO_SHA2_224 (2 << 1)
87#define SHA_REG_MODE_ALGO_SHA2_256 (3 << 1)
88 82
89#define SHA_REG_LENGTH 0x48 83#define SHA_REG_MODE_ALGO_MASK (7 << 0)
84#define SHA_REG_MODE_ALGO_MD5_128 (0 << 1)
85#define SHA_REG_MODE_ALGO_SHA1_160 (1 << 1)
86#define SHA_REG_MODE_ALGO_SHA2_224 (2 << 1)
87#define SHA_REG_MODE_ALGO_SHA2_256 (3 << 1)
88#define SHA_REG_MODE_ALGO_SHA2_384 (1 << 0)
89#define SHA_REG_MODE_ALGO_SHA2_512 (3 << 0)
90
91#define SHA_REG_LENGTH(dd) ((dd)->pdata->length_ofs)
90 92
91#define SHA_REG_IRQSTATUS 0x118 93#define SHA_REG_IRQSTATUS 0x118
92#define SHA_REG_IRQSTATUS_CTX_RDY (1 << 3) 94#define SHA_REG_IRQSTATUS_CTX_RDY (1 << 3)
@@ -117,18 +119,16 @@
117#define FLAGS_SG 17 119#define FLAGS_SG 17
118 120
119#define FLAGS_MODE_SHIFT 18 121#define FLAGS_MODE_SHIFT 18
120#define FLAGS_MODE_MASK (SHA_REG_MODE_ALGO_MASK \ 122#define FLAGS_MODE_MASK (SHA_REG_MODE_ALGO_MASK << FLAGS_MODE_SHIFT)
121 << (FLAGS_MODE_SHIFT - 1)) 123#define FLAGS_MODE_MD5 (SHA_REG_MODE_ALGO_MD5_128 << FLAGS_MODE_SHIFT)
122#define FLAGS_MODE_MD5 (SHA_REG_MODE_ALGO_MD5_128 \ 124#define FLAGS_MODE_SHA1 (SHA_REG_MODE_ALGO_SHA1_160 << FLAGS_MODE_SHIFT)
123 << (FLAGS_MODE_SHIFT - 1)) 125#define FLAGS_MODE_SHA224 (SHA_REG_MODE_ALGO_SHA2_224 << FLAGS_MODE_SHIFT)
124#define FLAGS_MODE_SHA1 (SHA_REG_MODE_ALGO_SHA1_160 \ 126#define FLAGS_MODE_SHA256 (SHA_REG_MODE_ALGO_SHA2_256 << FLAGS_MODE_SHIFT)
125 << (FLAGS_MODE_SHIFT - 1)) 127#define FLAGS_MODE_SHA384 (SHA_REG_MODE_ALGO_SHA2_384 << FLAGS_MODE_SHIFT)
126#define FLAGS_MODE_SHA224 (SHA_REG_MODE_ALGO_SHA2_224 \ 128#define FLAGS_MODE_SHA512 (SHA_REG_MODE_ALGO_SHA2_512 << FLAGS_MODE_SHIFT)
127 << (FLAGS_MODE_SHIFT - 1)) 129
128#define FLAGS_MODE_SHA256 (SHA_REG_MODE_ALGO_SHA2_256 \ 130#define FLAGS_HMAC 21
129 << (FLAGS_MODE_SHIFT - 1)) 131#define FLAGS_ERROR 22
130#define FLAGS_HMAC 20
131#define FLAGS_ERROR 21
132 132
133#define OP_UPDATE 1 133#define OP_UPDATE 1
134#define OP_FINAL 2 134#define OP_FINAL 2
@@ -145,7 +145,7 @@ struct omap_sham_reqctx {
145 unsigned long flags; 145 unsigned long flags;
146 unsigned long op; 146 unsigned long op;
147 147
148 u8 digest[SHA256_DIGEST_SIZE] OMAP_ALIGNED; 148 u8 digest[SHA512_DIGEST_SIZE] OMAP_ALIGNED;
149 size_t digcnt; 149 size_t digcnt;
150 size_t bufcnt; 150 size_t bufcnt;
151 size_t buflen; 151 size_t buflen;
@@ -162,8 +162,8 @@ struct omap_sham_reqctx {
162 162
163struct omap_sham_hmac_ctx { 163struct omap_sham_hmac_ctx {
164 struct crypto_shash *shash; 164 struct crypto_shash *shash;
165 u8 ipad[SHA1_MD5_BLOCK_SIZE] OMAP_ALIGNED; 165 u8 ipad[SHA512_BLOCK_SIZE] OMAP_ALIGNED;
166 u8 opad[SHA1_MD5_BLOCK_SIZE] OMAP_ALIGNED; 166 u8 opad[SHA512_BLOCK_SIZE] OMAP_ALIGNED;
167}; 167};
168 168
169struct omap_sham_ctx { 169struct omap_sham_ctx {
@@ -205,6 +205,8 @@ struct omap_sham_pdata {
205 u32 rev_ofs; 205 u32 rev_ofs;
206 u32 mask_ofs; 206 u32 mask_ofs;
207 u32 sysstatus_ofs; 207 u32 sysstatus_ofs;
208 u32 mode_ofs;
209 u32 length_ofs;
208 210
209 u32 major_mask; 211 u32 major_mask;
210 u32 major_shift; 212 u32 major_shift;
@@ -306,9 +308,9 @@ static void omap_sham_copy_hash_omap4(struct ahash_request *req, int out)
306 for (i = 0; i < dd->pdata->digest_size / sizeof(u32); i++) { 308 for (i = 0; i < dd->pdata->digest_size / sizeof(u32); i++) {
307 if (out) 309 if (out)
308 opad[i] = omap_sham_read(dd, 310 opad[i] = omap_sham_read(dd,
309 SHA_REG_ODIGEST(i)); 311 SHA_REG_ODIGEST(dd, i));
310 else 312 else
311 omap_sham_write(dd, SHA_REG_ODIGEST(i), 313 omap_sham_write(dd, SHA_REG_ODIGEST(dd, i),
312 opad[i]); 314 opad[i]);
313 } 315 }
314 } 316 }
@@ -342,6 +344,12 @@ static void omap_sham_copy_ready_hash(struct ahash_request *req)
342 case FLAGS_MODE_SHA256: 344 case FLAGS_MODE_SHA256:
343 d = SHA256_DIGEST_SIZE / sizeof(u32); 345 d = SHA256_DIGEST_SIZE / sizeof(u32);
344 break; 346 break;
347 case FLAGS_MODE_SHA384:
348 d = SHA384_DIGEST_SIZE / sizeof(u32);
349 break;
350 case FLAGS_MODE_SHA512:
351 d = SHA512_DIGEST_SIZE / sizeof(u32);
352 break;
345 default: 353 default:
346 d = 0; 354 d = 0;
347 } 355 }
@@ -404,6 +412,30 @@ static int omap_sham_poll_irq_omap2(struct omap_sham_dev *dd)
404 return omap_sham_wait(dd, SHA_REG_CTRL, SHA_REG_CTRL_INPUT_READY); 412 return omap_sham_wait(dd, SHA_REG_CTRL, SHA_REG_CTRL_INPUT_READY);
405} 413}
406 414
415static int get_block_size(struct omap_sham_reqctx *ctx)
416{
417 int d;
418
419 switch (ctx->flags & FLAGS_MODE_MASK) {
420 case FLAGS_MODE_MD5:
421 case FLAGS_MODE_SHA1:
422 d = SHA1_BLOCK_SIZE;
423 break;
424 case FLAGS_MODE_SHA224:
425 case FLAGS_MODE_SHA256:
426 d = SHA256_BLOCK_SIZE;
427 break;
428 case FLAGS_MODE_SHA384:
429 case FLAGS_MODE_SHA512:
430 d = SHA512_BLOCK_SIZE;
431 break;
432 default:
433 d = 0;
434 }
435
436 return d;
437}
438
407static void omap_sham_write_n(struct omap_sham_dev *dd, u32 offset, 439static void omap_sham_write_n(struct omap_sham_dev *dd, u32 offset,
408 u32 *value, int count) 440 u32 *value, int count)
409{ 441{
@@ -422,20 +454,24 @@ static void omap_sham_write_ctrl_omap4(struct omap_sham_dev *dd, size_t length,
422 * CLOSE_HASH only for the last one. Note that flags mode bits 454 * CLOSE_HASH only for the last one. Note that flags mode bits
423 * correspond to algorithm encoding in mode register. 455 * correspond to algorithm encoding in mode register.
424 */ 456 */
425 val = (ctx->flags & FLAGS_MODE_MASK) >> (FLAGS_MODE_SHIFT - 1); 457 val = (ctx->flags & FLAGS_MODE_MASK) >> (FLAGS_MODE_SHIFT);
426 if (!ctx->digcnt) { 458 if (!ctx->digcnt) {
427 struct crypto_ahash *tfm = crypto_ahash_reqtfm(dd->req); 459 struct crypto_ahash *tfm = crypto_ahash_reqtfm(dd->req);
428 struct omap_sham_ctx *tctx = crypto_ahash_ctx(tfm); 460 struct omap_sham_ctx *tctx = crypto_ahash_ctx(tfm);
429 struct omap_sham_hmac_ctx *bctx = tctx->base; 461 struct omap_sham_hmac_ctx *bctx = tctx->base;
462 int bs, nr_dr;
430 463
431 val |= SHA_REG_MODE_ALGO_CONSTANT; 464 val |= SHA_REG_MODE_ALGO_CONSTANT;
432 465
433 if (ctx->flags & BIT(FLAGS_HMAC)) { 466 if (ctx->flags & BIT(FLAGS_HMAC)) {
467 bs = get_block_size(ctx);
468 nr_dr = bs / (2 * sizeof(u32));
434 val |= SHA_REG_MODE_HMAC_KEY_PROC; 469 val |= SHA_REG_MODE_HMAC_KEY_PROC;
435 omap_sham_write_n(dd, SHA_REG_ODIGEST(0), 470 omap_sham_write_n(dd, SHA_REG_ODIGEST(dd, 0),
436 (u32 *)bctx->ipad, 471 (u32 *)bctx->ipad, nr_dr);
437 SHA1_BLOCK_SIZE / sizeof(u32)); 472 omap_sham_write_n(dd, SHA_REG_IDIGEST(dd, 0),
438 ctx->digcnt += SHA1_BLOCK_SIZE; 473 (u32 *)bctx->ipad + nr_dr, nr_dr);
474 ctx->digcnt += bs;
439 } 475 }
440 } 476 }
441 477
@@ -451,7 +487,7 @@ static void omap_sham_write_ctrl_omap4(struct omap_sham_dev *dd, size_t length,
451 SHA_REG_MODE_HMAC_KEY_PROC; 487 SHA_REG_MODE_HMAC_KEY_PROC;
452 488
453 dev_dbg(dd->dev, "ctrl: %08x, flags: %08lx\n", val, ctx->flags); 489 dev_dbg(dd->dev, "ctrl: %08x, flags: %08lx\n", val, ctx->flags);
454 omap_sham_write_mask(dd, SHA_REG_MODE, val, mask); 490 omap_sham_write_mask(dd, SHA_REG_MODE(dd), val, mask);
455 omap_sham_write(dd, SHA_REG_IRQENA, SHA_REG_IRQENA_OUTPUT_RDY); 491 omap_sham_write(dd, SHA_REG_IRQENA, SHA_REG_IRQENA_OUTPUT_RDY);
456 omap_sham_write_mask(dd, SHA_REG_MASK(dd), 492 omap_sham_write_mask(dd, SHA_REG_MASK(dd),
457 SHA_REG_MASK_IT_EN | 493 SHA_REG_MASK_IT_EN |
@@ -461,7 +497,7 @@ static void omap_sham_write_ctrl_omap4(struct omap_sham_dev *dd, size_t length,
461 497
462static void omap_sham_trigger_omap4(struct omap_sham_dev *dd, size_t length) 498static void omap_sham_trigger_omap4(struct omap_sham_dev *dd, size_t length)
463{ 499{
464 omap_sham_write(dd, SHA_REG_LENGTH, length); 500 omap_sham_write(dd, SHA_REG_LENGTH(dd), length);
465} 501}
466 502
467static int omap_sham_poll_irq_omap4(struct omap_sham_dev *dd) 503static int omap_sham_poll_irq_omap4(struct omap_sham_dev *dd)
@@ -666,14 +702,14 @@ static int omap_sham_update_dma_slow(struct omap_sham_dev *dd)
666/* Start address alignment */ 702/* Start address alignment */
667#define SG_AA(sg) (IS_ALIGNED(sg->offset, sizeof(u32))) 703#define SG_AA(sg) (IS_ALIGNED(sg->offset, sizeof(u32)))
668/* SHA1 block size alignment */ 704/* SHA1 block size alignment */
669#define SG_SA(sg) (IS_ALIGNED(sg->length, SHA1_MD5_BLOCK_SIZE)) 705#define SG_SA(sg, bs) (IS_ALIGNED(sg->length, bs))
670 706
671static int omap_sham_update_dma_start(struct omap_sham_dev *dd) 707static int omap_sham_update_dma_start(struct omap_sham_dev *dd)
672{ 708{
673 struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req); 709 struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
674 unsigned int length, final, tail; 710 unsigned int length, final, tail;
675 struct scatterlist *sg; 711 struct scatterlist *sg;
676 int ret; 712 int ret, bs;
677 713
678 if (!ctx->total) 714 if (!ctx->total)
679 return 0; 715 return 0;
@@ -694,23 +730,24 @@ static int omap_sham_update_dma_start(struct omap_sham_dev *dd)
694 ctx->digcnt, ctx->bufcnt, ctx->total); 730 ctx->digcnt, ctx->bufcnt, ctx->total);
695 731
696 sg = ctx->sg; 732 sg = ctx->sg;
733 bs = get_block_size(ctx);
697 734
698 if (!SG_AA(sg)) 735 if (!SG_AA(sg))
699 return omap_sham_update_dma_slow(dd); 736 return omap_sham_update_dma_slow(dd);
700 737
701 if (!sg_is_last(sg) && !SG_SA(sg)) 738 if (!sg_is_last(sg) && !SG_SA(sg, bs))
702 /* size is not SHA1_BLOCK_SIZE aligned */ 739 /* size is not BLOCK_SIZE aligned */
703 return omap_sham_update_dma_slow(dd); 740 return omap_sham_update_dma_slow(dd);
704 741
705 length = min(ctx->total, sg->length); 742 length = min(ctx->total, sg->length);
706 743
707 if (sg_is_last(sg)) { 744 if (sg_is_last(sg)) {
708 if (!(ctx->flags & BIT(FLAGS_FINUP))) { 745 if (!(ctx->flags & BIT(FLAGS_FINUP))) {
709 /* not last sg must be SHA1_MD5_BLOCK_SIZE aligned */ 746 /* not last sg must be BLOCK_SIZE aligned */
710 tail = length & (SHA1_MD5_BLOCK_SIZE - 1); 747 tail = length & (bs - 1);
711 /* without finup() we need one block to close hash */ 748 /* without finup() we need one block to close hash */
712 if (!tail) 749 if (!tail)
713 tail = SHA1_MD5_BLOCK_SIZE; 750 tail = bs;
714 length -= tail; 751 length -= tail;
715 } 752 }
716 } 753 }
@@ -773,6 +810,7 @@ static int omap_sham_init(struct ahash_request *req)
773 struct omap_sham_ctx *tctx = crypto_ahash_ctx(tfm); 810 struct omap_sham_ctx *tctx = crypto_ahash_ctx(tfm);
774 struct omap_sham_reqctx *ctx = ahash_request_ctx(req); 811 struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
775 struct omap_sham_dev *dd = NULL, *tmp; 812 struct omap_sham_dev *dd = NULL, *tmp;
813 int bs = 0;
776 814
777 spin_lock_bh(&sham.lock); 815 spin_lock_bh(&sham.lock);
778 if (!tctx->dd) { 816 if (!tctx->dd) {
@@ -796,15 +834,27 @@ static int omap_sham_init(struct ahash_request *req)
796 switch (crypto_ahash_digestsize(tfm)) { 834 switch (crypto_ahash_digestsize(tfm)) {
797 case MD5_DIGEST_SIZE: 835 case MD5_DIGEST_SIZE:
798 ctx->flags |= FLAGS_MODE_MD5; 836 ctx->flags |= FLAGS_MODE_MD5;
837 bs = SHA1_BLOCK_SIZE;
799 break; 838 break;
800 case SHA1_DIGEST_SIZE: 839 case SHA1_DIGEST_SIZE:
801 ctx->flags |= FLAGS_MODE_SHA1; 840 ctx->flags |= FLAGS_MODE_SHA1;
841 bs = SHA1_BLOCK_SIZE;
802 break; 842 break;
803 case SHA224_DIGEST_SIZE: 843 case SHA224_DIGEST_SIZE:
804 ctx->flags |= FLAGS_MODE_SHA224; 844 ctx->flags |= FLAGS_MODE_SHA224;
845 bs = SHA224_BLOCK_SIZE;
805 break; 846 break;
806 case SHA256_DIGEST_SIZE: 847 case SHA256_DIGEST_SIZE:
807 ctx->flags |= FLAGS_MODE_SHA256; 848 ctx->flags |= FLAGS_MODE_SHA256;
849 bs = SHA256_BLOCK_SIZE;
850 break;
851 case SHA384_DIGEST_SIZE:
852 ctx->flags |= FLAGS_MODE_SHA384;
853 bs = SHA384_BLOCK_SIZE;
854 break;
855 case SHA512_DIGEST_SIZE:
856 ctx->flags |= FLAGS_MODE_SHA512;
857 bs = SHA512_BLOCK_SIZE;
808 break; 858 break;
809 } 859 }
810 860
@@ -816,8 +866,8 @@ static int omap_sham_init(struct ahash_request *req)
816 if (!test_bit(FLAGS_AUTO_XOR, &dd->flags)) { 866 if (!test_bit(FLAGS_AUTO_XOR, &dd->flags)) {
817 struct omap_sham_hmac_ctx *bctx = tctx->base; 867 struct omap_sham_hmac_ctx *bctx = tctx->base;
818 868
819 memcpy(ctx->buffer, bctx->ipad, SHA1_MD5_BLOCK_SIZE); 869 memcpy(ctx->buffer, bctx->ipad, bs);
820 ctx->bufcnt = SHA1_MD5_BLOCK_SIZE; 870 ctx->bufcnt = bs;
821 } 871 }
822 872
823 ctx->flags |= BIT(FLAGS_HMAC); 873 ctx->flags |= BIT(FLAGS_HMAC);
@@ -1006,6 +1056,7 @@ static int omap_sham_enqueue(struct ahash_request *req, unsigned int op)
1006static int omap_sham_update(struct ahash_request *req) 1056static int omap_sham_update(struct ahash_request *req)
1007{ 1057{
1008 struct omap_sham_reqctx *ctx = ahash_request_ctx(req); 1058 struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
1059 int bs = get_block_size(ctx);
1009 1060
1010 if (!req->nbytes) 1061 if (!req->nbytes)
1011 return 0; 1062 return 0;
@@ -1023,7 +1074,7 @@ static int omap_sham_update(struct ahash_request *req)
1023 */ 1074 */
1024 omap_sham_append_sg(ctx); 1075 omap_sham_append_sg(ctx);
1025 return 0; 1076 return 0;
1026 } else if (ctx->bufcnt + ctx->total <= SHA1_MD5_BLOCK_SIZE) { 1077 } else if (ctx->bufcnt + ctx->total <= bs) {
1027 /* 1078 /*
1028 * faster to use CPU for short transfers 1079 * faster to use CPU for short transfers
1029 */ 1080 */
@@ -1214,6 +1265,16 @@ static int omap_sham_cra_md5_init(struct crypto_tfm *tfm)
1214 return omap_sham_cra_init_alg(tfm, "md5"); 1265 return omap_sham_cra_init_alg(tfm, "md5");
1215} 1266}
1216 1267
1268static int omap_sham_cra_sha384_init(struct crypto_tfm *tfm)
1269{
1270 return omap_sham_cra_init_alg(tfm, "sha384");
1271}
1272
1273static int omap_sham_cra_sha512_init(struct crypto_tfm *tfm)
1274{
1275 return omap_sham_cra_init_alg(tfm, "sha512");
1276}
1277
1217static void omap_sham_cra_exit(struct crypto_tfm *tfm) 1278static void omap_sham_cra_exit(struct crypto_tfm *tfm)
1218{ 1279{
1219 struct omap_sham_ctx *tctx = crypto_tfm_ctx(tfm); 1280 struct omap_sham_ctx *tctx = crypto_tfm_ctx(tfm);
@@ -1422,6 +1483,101 @@ static struct ahash_alg algs_sha224_sha256[] = {
1422}, 1483},
1423}; 1484};
1424 1485
1486static struct ahash_alg algs_sha384_sha512[] = {
1487{
1488 .init = omap_sham_init,
1489 .update = omap_sham_update,
1490 .final = omap_sham_final,
1491 .finup = omap_sham_finup,
1492 .digest = omap_sham_digest,
1493 .halg.digestsize = SHA384_DIGEST_SIZE,
1494 .halg.base = {
1495 .cra_name = "sha384",
1496 .cra_driver_name = "omap-sha384",
1497 .cra_priority = 100,
1498 .cra_flags = CRYPTO_ALG_TYPE_AHASH |
1499 CRYPTO_ALG_ASYNC |
1500 CRYPTO_ALG_NEED_FALLBACK,
1501 .cra_blocksize = SHA384_BLOCK_SIZE,
1502 .cra_ctxsize = sizeof(struct omap_sham_ctx),
1503 .cra_alignmask = 0,
1504 .cra_module = THIS_MODULE,
1505 .cra_init = omap_sham_cra_init,
1506 .cra_exit = omap_sham_cra_exit,
1507 }
1508},
1509{
1510 .init = omap_sham_init,
1511 .update = omap_sham_update,
1512 .final = omap_sham_final,
1513 .finup = omap_sham_finup,
1514 .digest = omap_sham_digest,
1515 .halg.digestsize = SHA512_DIGEST_SIZE,
1516 .halg.base = {
1517 .cra_name = "sha512",
1518 .cra_driver_name = "omap-sha512",
1519 .cra_priority = 100,
1520 .cra_flags = CRYPTO_ALG_TYPE_AHASH |
1521 CRYPTO_ALG_ASYNC |
1522 CRYPTO_ALG_NEED_FALLBACK,
1523 .cra_blocksize = SHA512_BLOCK_SIZE,
1524 .cra_ctxsize = sizeof(struct omap_sham_ctx),
1525 .cra_alignmask = 0,
1526 .cra_module = THIS_MODULE,
1527 .cra_init = omap_sham_cra_init,
1528 .cra_exit = omap_sham_cra_exit,
1529 }
1530},
1531{
1532 .init = omap_sham_init,
1533 .update = omap_sham_update,
1534 .final = omap_sham_final,
1535 .finup = omap_sham_finup,
1536 .digest = omap_sham_digest,
1537 .setkey = omap_sham_setkey,
1538 .halg.digestsize = SHA384_DIGEST_SIZE,
1539 .halg.base = {
1540 .cra_name = "hmac(sha384)",
1541 .cra_driver_name = "omap-hmac-sha384",
1542 .cra_priority = 100,
1543 .cra_flags = CRYPTO_ALG_TYPE_AHASH |
1544 CRYPTO_ALG_ASYNC |
1545 CRYPTO_ALG_NEED_FALLBACK,
1546 .cra_blocksize = SHA384_BLOCK_SIZE,
1547 .cra_ctxsize = sizeof(struct omap_sham_ctx) +
1548 sizeof(struct omap_sham_hmac_ctx),
1549 .cra_alignmask = OMAP_ALIGN_MASK,
1550 .cra_module = THIS_MODULE,
1551 .cra_init = omap_sham_cra_sha384_init,
1552 .cra_exit = omap_sham_cra_exit,
1553 }
1554},
1555{
1556 .init = omap_sham_init,
1557 .update = omap_sham_update,
1558 .final = omap_sham_final,
1559 .finup = omap_sham_finup,
1560 .digest = omap_sham_digest,
1561 .setkey = omap_sham_setkey,
1562 .halg.digestsize = SHA512_DIGEST_SIZE,
1563 .halg.base = {
1564 .cra_name = "hmac(sha512)",
1565 .cra_driver_name = "omap-hmac-sha512",
1566 .cra_priority = 100,
1567 .cra_flags = CRYPTO_ALG_TYPE_AHASH |
1568 CRYPTO_ALG_ASYNC |
1569 CRYPTO_ALG_NEED_FALLBACK,
1570 .cra_blocksize = SHA512_BLOCK_SIZE,
1571 .cra_ctxsize = sizeof(struct omap_sham_ctx) +
1572 sizeof(struct omap_sham_hmac_ctx),
1573 .cra_alignmask = OMAP_ALIGN_MASK,
1574 .cra_module = THIS_MODULE,
1575 .cra_init = omap_sham_cra_sha512_init,
1576 .cra_exit = omap_sham_cra_exit,
1577 }
1578},
1579};
1580
1425static void omap_sham_done_task(unsigned long data) 1581static void omap_sham_done_task(unsigned long data)
1426{ 1582{
1427 struct omap_sham_dev *dd = (struct omap_sham_dev *)data; 1583 struct omap_sham_dev *dd = (struct omap_sham_dev *)data;
@@ -1548,11 +1704,14 @@ static const struct omap_sham_pdata omap_sham_pdata_omap4 = {
1548 .poll_irq = omap_sham_poll_irq_omap4, 1704 .poll_irq = omap_sham_poll_irq_omap4,
1549 .intr_hdlr = omap_sham_irq_omap4, 1705 .intr_hdlr = omap_sham_irq_omap4,
1550 .idigest_ofs = 0x020, 1706 .idigest_ofs = 0x020,
1707 .odigest_ofs = 0x0,
1551 .din_ofs = 0x080, 1708 .din_ofs = 0x080,
1552 .digcnt_ofs = 0x040, 1709 .digcnt_ofs = 0x040,
1553 .rev_ofs = 0x100, 1710 .rev_ofs = 0x100,
1554 .mask_ofs = 0x110, 1711 .mask_ofs = 0x110,
1555 .sysstatus_ofs = 0x114, 1712 .sysstatus_ofs = 0x114,
1713 .mode_ofs = 0x44,
1714 .length_ofs = 0x48,
1556 .major_mask = 0x0700, 1715 .major_mask = 0x0700,
1557 .major_shift = 8, 1716 .major_shift = 8,
1558 .minor_mask = 0x003f, 1717 .minor_mask = 0x003f,
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 09:02:04 -0500