diff options
author | Omar Sandoval <osandov@fb.com> | 2018-10-11 15:20:48 -0400 |
---|---|---|
committer | Jens Axboe <axboe@kernel.dk> | 2018-10-16 11:49:57 -0400 |
commit | 3e6b8c3c4b14f4f0c4a74027156eb31544c0b0da (patch) | |
tree | b090c27d99f7cb06eb38a51b2275ea8e951b59f9 /drivers/block | |
parent | 21b07f35544af5e2c11f079057e8fb4263d35dd3 (diff) |
ataflop: fold headers into C file
atafd.h and atafdreg.h are only used from ataflop.c, so merge them in
there.
Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Diffstat (limited to 'drivers/block')
-rw-r--r-- | drivers/block/ataflop.c | 83 |
1 files changed, 81 insertions, 2 deletions
diff --git a/drivers/block/ataflop.c b/drivers/block/ataflop.c index dfb2c2622e5a..17df631c5d85 100644 --- a/drivers/block/ataflop.c +++ b/drivers/block/ataflop.c | |||
@@ -71,8 +71,6 @@ | |||
71 | #include <linux/completion.h> | 71 | #include <linux/completion.h> |
72 | #include <linux/wait.h> | 72 | #include <linux/wait.h> |
73 | 73 | ||
74 | #include <asm/atafd.h> | ||
75 | #include <asm/atafdreg.h> | ||
76 | #include <asm/atariints.h> | 74 | #include <asm/atariints.h> |
77 | #include <asm/atari_stdma.h> | 75 | #include <asm/atari_stdma.h> |
78 | #include <asm/atari_stram.h> | 76 | #include <asm/atari_stram.h> |
@@ -85,6 +83,87 @@ static DEFINE_MUTEX(ataflop_mutex); | |||
85 | static struct request *fd_request; | 83 | static struct request *fd_request; |
86 | static int fdc_queue; | 84 | static int fdc_queue; |
87 | 85 | ||
86 | /* | ||
87 | * WD1772 stuff | ||
88 | */ | ||
89 | |||
90 | /* register codes */ | ||
91 | |||
92 | #define FDCSELREG_STP (0x80) /* command/status register */ | ||
93 | #define FDCSELREG_TRA (0x82) /* track register */ | ||
94 | #define FDCSELREG_SEC (0x84) /* sector register */ | ||
95 | #define FDCSELREG_DTA (0x86) /* data register */ | ||
96 | |||
97 | /* register names for FDC_READ/WRITE macros */ | ||
98 | |||
99 | #define FDCREG_CMD 0 | ||
100 | #define FDCREG_STATUS 0 | ||
101 | #define FDCREG_TRACK 2 | ||
102 | #define FDCREG_SECTOR 4 | ||
103 | #define FDCREG_DATA 6 | ||
104 | |||
105 | /* command opcodes */ | ||
106 | |||
107 | #define FDCCMD_RESTORE (0x00) /* - */ | ||
108 | #define FDCCMD_SEEK (0x10) /* | */ | ||
109 | #define FDCCMD_STEP (0x20) /* | TYP 1 Commands */ | ||
110 | #define FDCCMD_STIN (0x40) /* | */ | ||
111 | #define FDCCMD_STOT (0x60) /* - */ | ||
112 | #define FDCCMD_RDSEC (0x80) /* - TYP 2 Commands */ | ||
113 | #define FDCCMD_WRSEC (0xa0) /* - " */ | ||
114 | #define FDCCMD_RDADR (0xc0) /* - */ | ||
115 | #define FDCCMD_RDTRA (0xe0) /* | TYP 3 Commands */ | ||
116 | #define FDCCMD_WRTRA (0xf0) /* - */ | ||
117 | #define FDCCMD_FORCI (0xd0) /* - TYP 4 Command */ | ||
118 | |||
119 | /* command modifier bits */ | ||
120 | |||
121 | #define FDCCMDADD_SR6 (0x00) /* step rate settings */ | ||
122 | #define FDCCMDADD_SR12 (0x01) | ||
123 | #define FDCCMDADD_SR2 (0x02) | ||
124 | #define FDCCMDADD_SR3 (0x03) | ||
125 | #define FDCCMDADD_V (0x04) /* verify */ | ||
126 | #define FDCCMDADD_H (0x08) /* wait for spin-up */ | ||
127 | #define FDCCMDADD_U (0x10) /* update track register */ | ||
128 | #define FDCCMDADD_M (0x10) /* multiple sector access */ | ||
129 | #define FDCCMDADD_E (0x04) /* head settling flag */ | ||
130 | #define FDCCMDADD_P (0x02) /* precompensation off */ | ||
131 | #define FDCCMDADD_A0 (0x01) /* DAM flag */ | ||
132 | |||
133 | /* status register bits */ | ||
134 | |||
135 | #define FDCSTAT_MOTORON (0x80) /* motor on */ | ||
136 | #define FDCSTAT_WPROT (0x40) /* write protected (FDCCMD_WR*) */ | ||
137 | #define FDCSTAT_SPINUP (0x20) /* motor speed stable (Type I) */ | ||
138 | #define FDCSTAT_DELDAM (0x20) /* sector has deleted DAM (Type II+III) */ | ||
139 | #define FDCSTAT_RECNF (0x10) /* record not found */ | ||
140 | #define FDCSTAT_CRC (0x08) /* CRC error */ | ||
141 | #define FDCSTAT_TR00 (0x04) /* Track 00 flag (Type I) */ | ||
142 | #define FDCSTAT_LOST (0x04) /* Lost Data (Type II+III) */ | ||
143 | #define FDCSTAT_IDX (0x02) /* Index status (Type I) */ | ||
144 | #define FDCSTAT_DRQ (0x02) /* DRQ status (Type II+III) */ | ||
145 | #define FDCSTAT_BUSY (0x01) /* FDC is busy */ | ||
146 | |||
147 | |||
148 | /* PSG Port A Bit Nr 0 .. Side Sel .. 0 -> Side 1 1 -> Side 2 */ | ||
149 | #define DSKSIDE (0x01) | ||
150 | |||
151 | #define DSKDRVNONE (0x06) | ||
152 | #define DSKDRV0 (0x02) | ||
153 | #define DSKDRV1 (0x04) | ||
154 | |||
155 | /* step rates */ | ||
156 | #define FDCSTEP_6 0x00 | ||
157 | #define FDCSTEP_12 0x01 | ||
158 | #define FDCSTEP_2 0x02 | ||
159 | #define FDCSTEP_3 0x03 | ||
160 | |||
161 | struct atari_format_descr { | ||
162 | int track; /* to be formatted */ | ||
163 | int head; /* "" "" */ | ||
164 | int sect_offset; /* offset of first sector */ | ||
165 | }; | ||
166 | |||
88 | /* Disk types: DD, HD, ED */ | 167 | /* Disk types: DD, HD, ED */ |
89 | static struct atari_disk_type { | 168 | static struct atari_disk_type { |
90 | const char *name; | 169 | const char *name; |