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authorVineela Tummalapalli <vineela.tummalapalli@intel.com>2019-11-04 06:22:01 -0500
committerThomas Gleixner <tglx@linutronix.de>2019-11-04 06:22:01 -0500
commitdb4d30fbb71b47e4ecb11c4efa5d8aad4b03dfae (patch)
tree3159a64521ee62ee31d9af775a7e31eb4c8f2e48 /drivers/base/cpu.c
parentca8888d7ae6fa18454c9e4f192c56bc6c8ca9b33 (diff)
x86/bugs: Add ITLB_MULTIHIT bug infrastructure
Some processors may incur a machine check error possibly resulting in an unrecoverable CPU lockup when an instruction fetch encounters a TLB multi-hit in the instruction TLB. This can occur when the page size is changed along with either the physical address or cache type. The relevant erratum can be found here: https://bugzilla.kernel.org/show_bug.cgi?id=205195 There are other processors affected for which the erratum does not fully disclose the impact. This issue affects both bare-metal x86 page tables and EPT. It can be mitigated by either eliminating the use of large pages or by using careful TLB invalidations when changing the page size in the page tables. Just like Spectre, Meltdown, L1TF and MDS, a new bit has been allocated in MSR_IA32_ARCH_CAPABILITIES (PSCHANGE_MC_NO) and will be set on CPUs which are mitigated against this issue. Signed-off-by: Vineela Tummalapalli <vineela.tummalapalli@intel.com> Co-developed-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/base/cpu.c')
-rw-r--r--drivers/base/cpu.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 0fccd8c0312e..6265871a4af2 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -561,6 +561,12 @@ ssize_t __weak cpu_show_tsx_async_abort(struct device *dev,
561 return sprintf(buf, "Not affected\n"); 561 return sprintf(buf, "Not affected\n");
562} 562}
563 563
564ssize_t __weak cpu_show_itlb_multihit(struct device *dev,
565 struct device_attribute *attr, char *buf)
566{
567 return sprintf(buf, "Not affected\n");
568}
569
564static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL); 570static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
565static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL); 571static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
566static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL); 572static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL);
@@ -568,6 +574,7 @@ static DEVICE_ATTR(spec_store_bypass, 0444, cpu_show_spec_store_bypass, NULL);
568static DEVICE_ATTR(l1tf, 0444, cpu_show_l1tf, NULL); 574static DEVICE_ATTR(l1tf, 0444, cpu_show_l1tf, NULL);
569static DEVICE_ATTR(mds, 0444, cpu_show_mds, NULL); 575static DEVICE_ATTR(mds, 0444, cpu_show_mds, NULL);
570static DEVICE_ATTR(tsx_async_abort, 0444, cpu_show_tsx_async_abort, NULL); 576static DEVICE_ATTR(tsx_async_abort, 0444, cpu_show_tsx_async_abort, NULL);
577static DEVICE_ATTR(itlb_multihit, 0444, cpu_show_itlb_multihit, NULL);
571 578
572static struct attribute *cpu_root_vulnerabilities_attrs[] = { 579static struct attribute *cpu_root_vulnerabilities_attrs[] = {
573 &dev_attr_meltdown.attr, 580 &dev_attr_meltdown.attr,
@@ -577,6 +584,7 @@ static struct attribute *cpu_root_vulnerabilities_attrs[] = {
577 &dev_attr_l1tf.attr, 584 &dev_attr_l1tf.attr,
578 &dev_attr_mds.attr, 585 &dev_attr_mds.attr,
579 &dev_attr_tsx_async_abort.attr, 586 &dev_attr_tsx_async_abort.attr,
587 &dev_attr_itlb_multihit.attr,
580 NULL 588 NULL
581}; 589};
582 590