Merge 3.8-rc5 into driver-core-next

This resolves a gpio driver merge issue pointed out in linux-next.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

3 files changed, 14 insertions, 0 deletions

diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c
index 00a783661d0b..46f80e2c92f7 100644
--- a/drivers/acpi/apei/apei-base.c
+++ b/drivers/acpi/apei/apei-base.c
@@ -590,6 +590,9 @@ static int apei_check_gar(struct acpi_generic_address *reg, u64 *paddr,
         if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 &&
             *access_bit_width < 32)
                 *access_bit_width = 32;
+        else if (bit_width == 64 && bit_offset == 0 && (*paddr & 0x07) == 0 &&
+            *access_bit_width < 64)
+                *access_bit_width = 64;
 
         if ((bit_width + bit_offset) > *access_bit_width) {
                 pr_warning(FW_BUG APEI_PFX
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index f1a5da44591d..ed9a1cc690be 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -958,6 +958,9 @@ static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
                 return -EINVAL;
         }
 
+        if (!dev)
+                return -EINVAL;
+
         dev->cpu = pr->id;
 
         if (max_cstate == 0)
@@ -1149,6 +1152,7 @@ int acpi_processor_cst_has_changed(struct acpi_processor *pr)
                 }
 
                 /* Populate Updated C-state information */
+                acpi_processor_get_power_info(pr);
                 acpi_processor_setup_cpuidle_states(pr);
 
                 /* Enable all cpuidle devices */
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 836bfe069042..53e7ac9403a7 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -340,6 +340,13 @@ static void amd_fixup_frequency(struct acpi_processor_px *px, int i)
         if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
             || boot_cpu_data.x86 == 0x11) {
                 rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
+                /*
+                 * MSR C001_0064+:
+                 * Bit 63: PstateEn. Read-write. If set, the P-state is valid.
+                 */
+                if (!(hi & BIT(31)))
+                        return;
+
                 fid = lo & 0x3f;
                 did = (lo >> 6) & 7;
                 if (boot_cpu_data.x86 == 0x10)